ec2257 ec ii lab - 2014
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EC2257 4th semester manualTRANSCRIPT
EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ELECTRONICS AND COMMUNICATION ENGINEERING
ANNA UNIVERSITY- CHENNAI
REGULATION 2008
II YEAR/IV SEMESTER
EC 2257- ELECTRONICS CIRCIUITS II AND
SIMULATION LAB
LAB MANUAL
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 2
Preface
This laboratory manual is prepared by the Department of Electronics and communication
engineering for Electronics Circuits II and Simulation Lab (EC 2257). This lab manual can be used
as instructional book for students, staff and instructors to assist in performing and understanding the
experiments. In the first part of the manual, experiments as per syllabus are described and in the
second part of the manual, experiments that are beyond the syllabus but expected for university
laboratory examination are displayed. This manual will be available in electronic form from
Acknowledgement
We would like to express our profound gratitude and deep regards to the support offered
by the Chairman Shri. A.Srinivasan. We also take this opportunity to express a deep sense of
gratitude to our Principal Dr.B.Karthikeyan,M.E, Ph.D, for his valuable information and
guidance, which helped us in completing this task through various stages. We extend our hearty
thanks to our head of the department Prof.B. Revathi @ Ponmozhi, M.E, (Ph.D), for her
constant encouragement and constructive comments.
Finally the valuable comments from fellow faculty and assistance provided by the
department are highly acknowledged.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 3
CONTENTS
S.No TOPIC PAGE NO
1. System Requirements 4
2. Syllabus 5
3. List of Experiments
1 Design and Analysis of Current Series Feedback Amplifier 6
2 Design and Analysis of Voltage Shunt Feedback Amplifier 12
3 Design and Analysis of RC phase shift Oscillator 18
4 Design and Analysis of Wein Bridge Oscillator 23
5 Design and Analysis of Hartley Oscillator 27
6 Design and Analysis of Colpitts Oscillator 32
7 Design and Analysis of Class-C Tuned Amplifier 36
8 Design and Analysis of Collector coupled Astable Multivibrator 41
9 Design and Analysis of Monostable Multivibrator 45
10 Design and Analysis of Bistable Multivibrator 49
11 Design and Analysis of Wave Shaping Circuits. 53
12 Simulation of Differential Amplifier. 66
13 Simulation of Astable Multivibrator 69
14 Simulation of Monostable Multivibrator 74
15 Simulation of Bistable Multivibrator 77
16 Simulation of Active Filters. 80
17 Simulation of Digital to Analog Converter 85
18 Simulation of Analog Multiplier. 88
19 Simulation of CMOS NOT/NAND/NOR gates. 91
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 4
1. SYSTEM REQUIREMENTS
HARDWARE REQUIREMENTS
Processors - 2.0 GHz or Higher
RAM - 256 MB or Higher
Hard Disk - 20 GB or Higher
Operating System - Windows 2000/XP/NT
SOFTWARE REQUIREMENTS
SPICE (OrCad 9.2 Release)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 5
SYLLABUS
EC 2257- ELECTRONICS CIRCUITS II AND SIMULATION LAB
DESIGN OF FOLLOWING CIRCUITS
1. Series and Shunt feedback amplifiers:
2. Frequency response, Input and output impedance calculation
3. RC Phase shift oscillator, Wien Bridge Oscillator
4. Hartley Oscillator, Colpitts Oscillator
5. Tuned Class C Amplifier
6. Integrators, Differentiators, Clippers and Clampers
7. Astable, Monostable and Bistable multivibrators
SIMULATION USING PSPICE:
1. Differential amplifier
2. Active filters: Butterworth 2nd order LPF, HPF (Magnitude & Phase Response)
3. Astable, Monostable and Bistable multivibrator - Transistor bias
4. D/A and A/D converters (Successive approximation)
5. Analog multiplier
6. CMOS Inverter, NAND and NOR
LIST OF EQUIPMENTS AND COMPONENTS FOR A BATCH OF 30 STUDENTS (3 per Batch)
S.No Name of the equipments / Components Quantity Required Remarks
1 Variable DC Power Supply 8 (0-30V) 2 Fixed Power Supply 4 + / - 12V 3 CRO 6 30MHZ 4 Multimeter 6 Digital 5 Multimeter 2 Analog 6 Function Generator 6 1 MHz 7 Digital LCR Meter 1 8 PC with SPICE Simulation Software 6
Consumables (Minimum of 25 Nos. each) 9 BC107, BF195, 2N2222, BC147
10 Resistors 1/4 Watt Assorted 11 Capacitors
12 Inductors
13 Diodes, Zener Diodes 14 Bread Boards
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 6
EX NO: 01 DESIGN AND ANALYSIS OF CURRENT SERIES FEEDBACK
AMPLIFIER DATE :
Aim:
To design and test the current-series feedback amplifier and to calculate the following
parameters with and without feedback.
1. Mid band gain.
2. Bandwidth and cut-off frequencies.
3. Input and output impedance.
Components & Equipment required:
S.NO APPARATUS RANGE QUANTITY
1. Power supply (0-30)V
1
2. Function generator (0-20M)Hz
1
3. CRO 1
4. Transistor BC107
1
5. Resistors
6. Capacitors
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 7
Circuit diagram:
(i) Without feedback:
(ii) With feedback:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 8
Theory: The current series feedback amplifier is characterized by having shunt sampling and
series mixing. In amplifiers, there is a sampling network, which samples the output and gives to
the feedback network. The feedback signal is mixed with input signal by either shunt or series
mixing technique. Due to shunt sampling the output resistance increases by a factor of ‘D’ and
the input resistance is also increased by the same factor due to series mixing. This is basically
transconductance amplifier. Its input is voltage which is amplified as current.
Design:
(i) Without feedback:
VCC = 12V;
IC = 1mA;
fL = 50Hz;
S = 2;
RL = 4.7KΩ;
hfe = re = 26mV / IC = 26Ω;
hie = hfe re = VCE= Vcc/2 (transistor Active) = VE = IERE = Vcc/10
Applying KVL to output loop, we get
VCC = ICRC + VCE + IERE
RC = ?
Since IB is very small when compare with IC,
IC ≈ IE
RE = VE / IE = ?
S = 1+ RB / RE = 2
RB = ?
VB = VCC R2 / (R1 + R2)
RB = R1 || R2
R1 = ? R2 =?
XCi = Zi / 10 = (hie || RB) / 10 = ?
Ci = 1 / (2πf XCi) = ?
Xco = (RC || RL)/10 =?
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 9
Co = 1 / (2πf XCo) = ?
XCE = RE/10 = ?
CE = 1 / (2πf XCE) ?
(ii) With feedback (Remove the Emitter Capacitor, CE):
Feedback factor, β = -RE =
Gm = -hfe / (hie + RE) =
Desensitivity factor, D = 1 + β Gm =
Transconductance with feedback, Gmf = Gm / D =
Input impedance with feedback, Zif = Zi D
Output impedance with feedback, Z0f = Z0 D
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in regular steps and
note down the corresponding output voltage.
3. Plot the graph: Gain (dB) Vs Frequency
4. Calculate the bandwidth from the graph.
5. Calculate the input and output impedance.
6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).
Tabular column:
(i) Without feedback:
Vi=
S.No Frequency (Hz)
Output Voltage
(V0) (volts)
Gain = V0/Vi
Gain = 20
log(V0/Vi) (dB)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 10
(iii) With feedback:
Vi=
Model graph: (frequency response)
S.No Frequency (Hz)
Output Voltage
(V0) (volts)
Gain = V0/Vi
Gain = 20
log(V0/Vi) (dB)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 11
Result: Thus the current series feedback amplifier is designed and constructed and the following
parameters are calculated.
1. Define feedback?
A portion of the output signal is taken from the output of the amplifier and is
combined with the normal input signal. This is known as feedback.
2. Define positive feedback?
If the feedback signal is in phase with input signal, then the net effect of the
feedback will increase the input signal given to the amplifier. This type of feedback is
said to be positive or regenerative feedback.
3. Define negative feedback?
If the feedback signal is out of phase with the input signal then the input
voltage applied to the basic amplifier is decreased and correspondingly the output is
decreased. This type of feedback is known as negative or degenerative feedback.
4. Define sensitivity?
Sensitivity is defined as the ratio of percentage change in voltage gain with
feedback to the percentage change in voltage gain without feedback.
5. What are the types of feedback? i. Voltage-series feedback ii. Voltage-shunt series
iii.Current- series feedback iv.Current-shunt feedback
Theoretical
Practical
With feedback
Without
feedback
With feedback Without
feedback
Input
impedance
Output
impedance
Gain
(midband)
Bandwidth
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 12
EX NO: 02
DESIGN AND ANALYSIS OF VOLTAGE SHUNT FEEDBACK
AMPLIFIER DATE :
Aim:
To design and test the voltage-shunt feedback amplifier and to calculate the following
parameters with and without feedback.
1. Mid band gain.
2. Bandwidth and cut-off frequencies.
3. Input and output impedance.
Components & Equipment required:
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. Function generator
(0-20M)Hz
1
3. CRO
1
4. Transistor
BC107
1
5. Resistors
6. Capacitors
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 13
Circuit Diagram:
(i) Without Feedback:
(ii) With Feedback:
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ISSUE: 01 REVISION: 00 14
Theory:
In voltage shunt feedback amplifier, the feedback signal voltage is given to the base of
the transistor in shunt through the base resistor RB. This shunt connection tends to decrease the
input resistance and the voltage feedback tends to decrease the output resistance. In the circuit
RB appears directly across the input base terminal and output collector terminal. A part of output
is feedback to input through RB and increase in IC decreases IB. Thus negative feedback exists
in the circuit. So this circuit is also called voltage feedback bias circuit. This feedback amplifier
is known a transresistance amplifier. It amplifies the input current to required voltage levels. The
feedback path consists of a resistor and a capacitor.
Design
(i) Without Feedback:
VCC = 12V;
IC = 1mA;
AV = 30;
Rf = 2.5KΩ;
S = 2;
hfe = ;
β=1/ Rf = 0.0004
re = 26mV / IC = 26Ω;
hie = hfe re =
VCE= Vcc/2 (transistor Active) =
VE = IERE = Vcc/10 =
Applying KVL to output loop, we get VCC = ICRC + VCE + IERE
RC =
Since IB is very small when compare with IC, IC ≈IE
RE = VE / IE =
S = 1+ RB / RE
RB =
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ISSUE: 01 REVISION: 00 15
VB = VCC R2 / (R1 + R2)
RB = R1 || R2
R1 = R2 =
(ii) With feedback:
RO = RC || Rf =
Ri = (RB || hie ) Rf =
Rm = -(hfe (RB || Rf) (RC || Rf)) / ((RB || Rf) + hie) =
Desensitivity factor, D = 1 + β Rm
Rif = Ri / D =
Rof = Ro / D =
Rmf = Rm / D =
XCi = Rif /10 =
Ci = 1 / (2πf XCi) =
Xco = Rof /10 =
Co = 1 / (2πf XCo) =
RE’ = RE || ((RB + hie) / (1+hfe))
XCE = RE’/10 =
CE = 1 / (2πf XCE) =
XCf = Rf/10
Cf = 1 / (2πf XCf) =
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Keeping the input voltage constant, vary the frequency from 50Hz to 3MHz in regular steps
and note down the corresponding output voltage.
3. Plot the graph: Gain (dB) Vs Frequency
4. Calculate the bandwidth from the graph.
5. Calculate the input and output impedance.
6. Remove Emitter Capacitance, and follow the same procedures (1 to 5).
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 16
Tabular Column:
(i) Without Feedback:
Vi=10mV
(ii) With Feedback:
Vi=10mV
Model graph: (frequency response)
Frequency (Hz)
Vo (Volts)
Gain = V0/Vi
Gain = 20
log(V0/Vi) (dB)
Frequency (Hz)
Vo (Volts)
Gain = V0/Vi
Gain = 20
log(V0/Vi) (dB)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 17
Result: Thus the voltage shunt feedback amplifier is designed and constructed and the following
parameters are calculated.
1. Give an example for voltage-series feedback.
The Common collector or Emitter follower amplifier is an example for
voltage series feedback.
2. Give the properties of negative feedback.
i. Negative feedback reduces the gain
ii. Distortion is very much reduced
3. Define voltage shunt feedback.
A fraction of output voltage is supplied in parallel with the input voltage through the feedback
network. The feedback signal is proportional to the output voltage
4.Define voltage series feedback.
The input to the feedback network is in parallel with the output of the amplifier. A fraction of the
output voltage through the feedback network is applied in series with the input voltage of the amplifier.
5.Define current shunt feedback.
The shunt connection at the input reduce the input resistance and the series connection at the
output increase the output resistance is called current shunt feedback
Theoretical
Practical
With feedback
Without
feedback
With feedback Without
feedback
Input
impedance
Output
impedance
Gain
(midband)
Bandwidth
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 18
Aim: To design and construct a RC phase shift oscillator for the given frequency (f0).
Components & Equipment required:
EX NO: 03
DESIGN AND ANALYSIS OF RC PHASE SHIFT OSCILLATOR DATE :
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. Function generator
(0-20M)Hz
1
3. CRO
1
4. Transistor
BC107
1
5. Resistors
6. Capacitors
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 19
Circuit Diagram:
Theory: In the RC phase shift oscillator, the required phase shift of 180˚ in the feedback loop
from the output to input is obtained by using R and C components, instead of tank circuit. Here a
common emitter amplifier is used in forward path followed by three sections of RC phase
network in the reverse path with the output of the last section being returned to the input of the
amplifier. The phase shift Ф is given by each RC section Ф=tanˉ1 (1/ωrc). In practice R-value is
adjusted such that Ф becomes 60˚. If the value of R and C are chosen such that the given
frequency for the phase shift of each RC section is 60˚. Therefore at a specific frequency the total
phase shift from base to transistor’s around circuit and back to base is exactly 360˚ or 0˚. Thus
the Barkhausen criterion for oscillation is satisfied
Design:
VCC = 12V; IC = 1mA; C = 0.01μF; fo = ; S = 2; hfe =
re = 26mV / IC = 26√Ω;
hie = hfe re =
VCE= Vcc/2 (transistor Active) =
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 20
VE = IERE = Vcc/10
Applying KVL to output loop, we get
VCC = ICRC + VCE + IERE
RC =
Since IB is very small when compare with IC,
IC ≈ IE
RE = VE / IE =
S = 1+ RB / RE = 2
RB = VB = VBE + VE =
VB = VCC R2 / (R1 + R2)
RB = R1 || R2
R1 = R2 =
Gain formula is given by,
Effective load resistance is given by, Rleff = Rc || RL
RL =
XCi = [hie+(1+hfe)RE] || RB/10 =
Ci = 1 / (2πf XCi) =
Xco = Rleff /10 =
Co = 1 / (2πf XCo) =
CE = RE/10 =
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ISSUE: 01 REVISION: 00 21
CE = 1 / (2πf XCE) =
Feedback Network:
f0 = ;
C = 0.01μf;
R =
Procedure:
1. Connections are made as per the circuit diagram.
2. Switch on the power supply and observe the output on the CRO (sine wave).
3. Note down the practical frequency and compare with its theoretical frequency.
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 22
Tabular Column:
Result: Thus RC phase shift oscillator is designed and constructed and the output sine wave
frequency is calculated as
Theoretical Practical
Frequency
1. What is Oscillator circuit?
A circuit with an active device is used to produce an alternating current is called
an oscillator circuit.
2.What are the different types of oscillators?
1. sinusoidal oscillator 2, Relaxation oscillator 3. Negative resistance oscillator 4. Feedback
oscillator 5. LC oscillator 6. RC Phase shift oscillator.
3. What are the conditions for oscillations?
The magnitude of loop gain must be unity. Total phase shift around closed loop is zero.
4.Define frequency oscillation.
When the signal level increases, the gain of the amplifier is decrease at a particular value
of output, the gain of the amplifier is reduced exactly equal to 1/β then the output voltage remain
constant at frequency is called frequency oscillation.
5. What is the application of RF phase shift oscillator?
It is used for amplification, phase shifting and oscillation.
AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 23
EX NO: 04
DESIGN AND ANALYSIS OF WIEN BRIDGE OSCILLATOR DATE :
Aim: To design a wien bridge oscillator and to draw its output waveform.
Components & Equipment required:
s.no Name of the component Range Quantity
1 Op-amp IC741 1
2 CRO - 1
3 Capacitor 2.88uF,0.01uF,0.08uF 5
4 Resistor 15k,8.8k,12k,1.18k 7
5 Power supply - 1
6 Bread Board - 1
7 Connecting wires - As
required
Theory:
The wein bridge oscillator is a standard circuit for generating low frequencies in the range of 10
Hz to about 1MHz.The method used for getting +ve feedback in wein bridge oscillator is to use
two stages of an RC-coupled amplifier. Since one stage of the RC-coupled amplifier introduces a
phase shift of 180 deg, two stages will introduces a phase shift of 360 deg. At the frequency of
oscillations f the +ve feedback network shown in fig makes the input & output in the phase. The
frequency of oscillations is given as f =1/2π√R1C1R2C2 In addition to the positive feedback
Design:
Select appropriate transistor and note down its specification such as
Vce(max),IcQ(max),hfe(min)) and hfe(max) and VBE(SAT). Here the transistor is allowed to
work in the active region.Assume Vcc,VceQ,IcQ,Vcc. where
Vcc=VcEQ+IcQ(Rc+RE),determine Rc.Assuming appropriate stability factor and hence I2
current flowing through the biasing resistor R2 and determine R1 and R2.
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ISSUE: 01 REVISION: 00 24
R2=SXRE
Vcc[(R2/R1)+R2]=VRE +VBE(sat)
VR1+VR2=Vcc
Using the condition for sustained oscillation hfe>4k+23+29/k,where k=Rc/R. compute C
for designed desired frequency f1 using formula for frequency of oscillation.
F=1/2𝜋 𝑅1𝑅2𝐶1𝐶2
Compute Cin,Xcin<=Zin/10, where Xcin is the impedance offered by the coupling
capacitor for the frequency of interest and Zin is the input resistance at the transistor.Compute
CE,the impadance XCE<=RE/10.
Procedure:
1. Connections are made as per the circuit diagram
2. Feed the output of the oscillator to a C.R.O by making adjustments in the Potentiometer
connected in the +ve feedback loop, try to obtain a stable sine Wave.
3. Measure the time period of the waveform obtained on CRO. & calculate the Frequency of
oscillations.
4. Repeat the procedure for different values of capacitance
Circuit Diagram:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 25
design:
F=1/2πRC
R=1/2πFC
Given F=1KHZ
Assume, C=0.1μF,
R=1.5kΩ.
R3/R4=2.
Assume
R3=1kΩ,R4= 500Ω
R=R1=R2=1.5kΩ
C=C1=C2=0.1μF
Tabulation:
AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 26
Result:
Thus a Wien bridge oscillator is designed and the output waveform is drawn.
1. Define Oscillator
A circuit with an active device is used to produce an alternating current is called
an oscillator circuit.
2. What is a tuned amplifier?
The amplifier with a circuit that is capable of amplifying a signal over a narrow band of
frequencies are called tuned amplifiers.
3. What happens to the circuit above and below resonance?
Above resonance the circuit acts as capacitive and below resonance the circuit acts as
inductive.
4. What are the different coil losses?
Hysteresis loss , Copper loss ,Eddy current loss
5. What is Q factor?
It is the ratio of reactance to resistance.
Theoretical Practical
Frequency
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 27
EX NO: 05
DESIGN AND ANALYSIS OF HARTELY OSCILLATOR DATE :
Aim: To design and construct the given oscillator for the given frequency (fO).
Components & Equipment required:
Theory:
Hartley oscillator is a type of sine wave generator. The oscillator derives its initial output
from the noise signals present in the circuit. After considerable time, it gains strength and
thereby producing sustained oscillations. Hartley Oscillator have two major parts namely –
amplifier part and feedback part. The amplifier part has a typically CE amplifier with voltage
divider bias. In the feedback path, there is a LCL network. The feedback network generally
provides a fraction of output as feedback.
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. Function generator
(0-20M)Hz
1
3. CRO
1
4. Transistor
BC107
1
5. Resistors
6. Capacitors
7. DIB
8. DCB
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 28
Circuit Diagram:
Design:
Given Specifications,
Vcc=12V, S=6, VRE=3V, hfe=300, fc=12kHz, VBE(sat)=0.7, IcQ=1.6mA.
Let L1=100uH, L1/L2=hfe, L2=?
i)VcEQ=Vcc/2=6V
ii)VRE=ICQ.RE=1.6x10 -3
.RE=3
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 29
RE=1.857kΩ.
Vcc=VCEQ+ICQ (RC+RE)
12= 6+1.6x10 -3
(RC+1.875x10 3)
RC=1.875kΩ
iii)R2=SxRE=11.25kΩ
iv)Vcc(R2/(R1+R2)=VRE+VBE(sat)
R1=25.29kΩ
L1/L2=hfe=300
Assume, L1=100μH,
L2=0.33 μH.
f=1/2π (𝐿1 + 𝐿2)𝐶
C=0.1753μF.
CE=1/(2πfcXcE)=0.0707 μF.
Zin=R1||R2||hie=2.997kΩ
Xcin=Zin/10
Cin=1/(2𝜋fcXcin)=0.0442 μF.
Procedure:
1. Connections are made as per the circuit diagram.
2. Switch on the power supply and observe the output on the CRO (sine wave).
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 30
3. Note down the practical frequency and compare with its theoretical frequency.
Model Graph:
Tabulation:
AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)
Result: Thus Hartley oscillator is designed and constructed and the output sine wave frequency
is calculated as
Theoretical Practical
Frequency
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 31
1. What is dissipation factor?
It is referred as the total loss within a component i.e1/Q
2. What is the classification of tuned amplifiers?
Single tuned
Double tuned
Stagger tuned
3. What is a single tuned amplifier?
An amplifier circuit that uses a single parallel tuned circuit as a load is called single
tuned amplifier.
4. What are the advantages of tuned amplifiers?
They amplify defined frequencies.
Signal to noise ratio at output is good
They are suited for radio transmitters and receivers
5. What are the disadvantages of tuned amplifiers?
The circuit is bulky and costly
The design is complex.
They are not suited to amplify audio frequencies.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 32
EX NO: 06
DESIGN AND ANALYSIS OF COLPITTS OSCILLATOR DATE :
Aim: To design and construct the given oscillator at the given operating frequency.
Components & Equipment required:
Theory:
A Colpitts oscillator is the electrical dual of a Hartley oscillator. In the Colpitts circuit,
two capacitors and one inductor determine the frequency of oscillation. The oscillator derives its
initial output from the noise signals present in the circuit. After considerable time, it gains
strength and thereby producing sustained oscillations. It has two major parts namely – amplifier
part and feedback part. The amplifier part has a typically CE amplifier with voltage divider bias.
In the feedback path, there is a CLC network. The feedback network generally provides a
fraction of output as feedback.
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. Function generator
(0-20M)Hz
1
3. CRO
1
4. Transistor
BC107
1
5. Resistors
6. Capacitors
7. DIB
8. DCB
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 33
Circuit Diagram:
Design:
Vcc=8V, S=6, VRE=3V, hfe=300, fc=12kHz, VBE(sat)=0.7, IcQ=1.8mA.
Let L1=100uH,L1/L2=hfe,L2=?
i)VcEQ=Vcc/2
ii)Vcc=VcEQ+IcQ.RE,VRE=ICQ.RE=IE.RE
RE=VRE/VCQ
iii)R2=S.RE
iv)Vcc(R2/(R1+R2)=VRE+VBE(sat)
re’=(26x10-3
)/ICQ
R1=Vcc.R2/(R1+R2) -R2
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 34
v)Cin=1/(2𝜋fcXcin);Xcin=Zin/10
Zin=R1||R2||hie
vi)CE=1/(2πfcXcE)
XcE=RE/10
vii)fc=1/2π (𝐿𝐶𝑒𝑞,Ceq=C1||C2
viii)Vcc=VcEQ+ICQ(Rc+RE)
Procedure:
1. Rig up the circuit as per the circuit diagrams (both oscillators).
2. Switches on the power supply and observe the output on the CRO (sine wave).
3. Note down the practical frequency and compare with its theoretical frequency.
Model Graph:
Tabulation:
AMPLITUDE(V) TIME(ms) FREQUENCY(HZ)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 35
Result: Thus Colpitts oscillator is designed and constructed and the output sine wave frequency
is calculated as
1. What is neutralization?
The effect of collector to base capacitance of the transistor is neutralized by
introducing a signal that cancels the signal coupled through collector base capacitance.
This process is called neutralization.
2. What are double tuned amplifiers?
The amplifiers having two parallel resonant circuit in its load are called double tuned
amplifiers.
3. What is a stagger tuned amplifier?
It is a circuit in which two single tuned cascaded amplifiers having certain bandwidth are
taken and their resonant frequencies are adjusted that they are separated by an amount
equal to the bandwidth of each stage. Since resonant frequencies are displaced it is called
stagger tuned amplifier.
4. What are the advantages of stagger tuned amplifier?
The advantage of stagger tuned amplifier is to have better flat, wideband characteristics.
5. What are the different types of neutralization?
1. Hazeltine neutralization
2. Rice neutralization
Theoretical Practical
Frequency
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 36
EX NO: 07
DESIGN AND ANALYSIS OF FREQUENCY RESPONSE OF CLASS C
SINGLE TUNED AMPLIFIER DATE :
Aim: To design and construct a single tuned amplifier and to plot the frequency response.
Components & Equipment required:
Theory:
The amplifier is said to be class c amplifier if the Q Point and the input signal are selected
such that the output signal is obtained for less than a half cycle, for a full input cycle Due to such
a selection of the Q point, transistor remains active for less than a half cycle .Hence only that
much Part is reproduced at the output for remaining cycle of the input cycle the transistor
remains cut off and no signal is produced at the output. The total Angle during which current
flows is less than 180.This angle is called the conduction angle, Qc.
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. Function generator
(0-20M)Hz
1
3. CRO
1
4. Transistor
BC107
1
5. Resistors
6. Capacitors
7. DIB
8. DCB
7. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 37
Circuit Diagram:
Design:
VCC = 12V; IC = 1mA; fo = ; S = 2; hfe =
Q = 5; L = 1Mh
re = 26mV / IC = 26Ω;
hie = hfe re =
VCE= Vcc/2 (transistor Active) =
VE = IERE = Vcc/10
Applying KVL to output loop, we get VCC = ICRC + VCE + IERE
RC =
Since IB is very small when compare with IC, IC ≈ IE
RE = VE / IE =
S = 1+ RB / RE = 2
RB =
VB = VBE + VE =
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 38
VB = VCC R2 / (R1 + R2)
RB = R1 || R2
R1 = R2 = RL =
XCi = [hie+(1+hfe)RE] || RB/10 =
Ci = 1 / (2πf XCi) =
Xco = (RC||RL) /10 =
Co = 1 / (2πf XCo) =
XCE = RE/10 =
CE = 1 / (2πf XCE) =
Q = RL /ωL
RL =
C =
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Set Vi = 50 mV (say), using the signal generator.
3. Keeping the input voltage constant, vary the frequency from 0Hz to3MHz in regular steps and
note down the corresponding output voltage.
4. Plot the graph: Gain (dB) Vs Frequency
Tabular Column:
Vi = 50 mV
Frequency (Hz)
Vo (Volts)
Gain = 20
log(V0/Vi) (dB)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 39
Model Graph: (Frequency Response)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 40
Result: Thus single tuned amplifier is designed and constructed for the given operating
frequency and the frequency response is plotted.
1. What is rice neutralization?
It uses center tapped coil in the base circuit. The signal voltages at the end of tuned base
coil are equal and out of phase.
2. What is unloaded Q?
It is the ratio of stored energy to the dissipated energy in a reactor or resonator.
3. What are the applications of mixer circuit?
Used in radio receivers. Used to translate signal frequency to some lower frequency
4. What is up converter?
When the mixer circuit is used to translate signal to high frequency, then it is called up
converter.
5. What is an amplifier?
An amplifier is a device which produces a large electrical output of similar
characteristics to that of the input parameters.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 41
EX NO: 08
DESIGN AND ANALYSIS OF ASTABLE MULTIVIBRATOR DATE :
Aim: To design and construct an astable multivibrator using transistor and to plot the output
waveform.
Components / Equipments Required:
Circuit Diagram:
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. CRO
(0-20M)Hz
1
3. Transistor
BC107
2
4. Resistors
4.9KΩ, 1.6MΩ
2 each
5. Capacitors
0.45nF
2
6. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 42
Theory:
Astable multivibrator is also known as free running multivibrator. It is rectangular wave
shaping circuit having non-stable states. This circuit does not need an external trigger to change
state. It consists of two similar NPN transistors. They are capacitor coupled. It has 2 quasi-stable
states. It switches between the two states without any applications of input trigger pulses. Thus it
produces a square wave output without any input trigger. The time period of the output square
wave is given by, T = 1.38RC.
Design Procedure:
VCC = 10V; IC = 2mA;VCE (sat) = 0.2V; f = 1KHz; hfe =
RC =( VCC - VCE (sat) )/ IC =(12 – 0.2 )/ 0.002 = 5.9kΩ.
R ≤hfe RC = 315 * 5.9 * 103 = 1.85MΩ
R = 1.5MΩ.
T = 1.38RC
C = T / (1.38R) = (1 * 10-3
) / (1.38 * 1.5 * 106)= 0.48nF
Procedure:
1. Connections are made as per the circuit diagram.
2. Switch on the power supply.
3. Note down the output TON, TOFF and output voltage from CRO.
4. Plot the output waveform in the graph.
Tabular Column:
Amplitude (V) TON (ms) TOFF (ms) Frequency(HZ)
VO1
VO2
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 43
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 44
RESULT: Thus the astable multivibrator is designed and constructed using transistor and its
output waveform is plotted.
1, What is a Multivibrator?
The electronic circuit which are used to generate non sinusoidal waveforms are
called Multivibrators.
2, Name the types of Multivibrators?
Bistable Multivibrator, Monostable Multivibrator, Astable Multivibrator
3, How many stable states do bistable Multivibrator have?
Two stable states.
4, When will the circuit change from stable state in bistable Multivibrator ?
when an external trigger pulse is applied, the circuit changes from one stable state
to another.
5. What are the different names of bistable Multivibrator?
Eccles Jordan circuit, trigger circuit, scale-of-2 toggle circuit, flip-flop and binary.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 45
Aim: To design and construct monostable multivibrator using transistor and to plot the output
waveform.
Components / Equipments Required:
Circuit Diagram:
EX NO: 09
DESIGN AND ANALYSIS OF MONOSTABLE MULTIVIBRATOR DATE :
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. CRO
(0-20M)Hz
1
3. Transistor
BC107
2
4. Resistors
4.9KΩ, 1.6MΩ
2 each
5. Capacitors
0.45nF
2
6. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 46
Theory:
Monostable multivibrator has two states which are (i) quasi-stable state and (ii) stable
state. When a trigger input is given to the monostable multivibrator, it switches between two
states. It has resistor coupling with one transistor. The other transistor has capacitive coupling.
The capacitor is used to increase the speed of switching. The resistor R2 is used to provide
negative voltage to the base so that Q1 is OFF and Q2 is ON. Thus an output square wave is
obtained from monostable multivibrator.
Design Procedure:
VCC = 12V; VBB = -2V; IC = 2mA; VCE (sat) = 0.2V; f = 1KHz; hfe =
RC =( VCC - VCE (sat) )/ IC =(12 – 0.2 )/ 0.002 = 5.9kΩ.
IB2(min) = IC2 / hfe =
Select IB2 > IB2(min)
IB2 =
R=( VCC - VCE (sat) )/ IB2
T = 0.69RC
C = T / 0.69R =
VBBR1 = VCE (sat) R2
R2 =10R1 (since, VBB = 2V and VCE (sat) = 0.2V)
Let R1 = 10KΩ, then R2 = 100KΩ
Choose C1 = 25pF.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 47
Procedure:
1. Connections are made as per the circuit diagram.
2. Switch on the power supply
3. Observe the output at collector terminals.
4. Trigger Monostable with pulse and note down the output TON, TOFF and voltage from CRO.
5. Plot the waveform in the graph.
Tabular Column:
Width (ms) Input Output
TON(ms) TOFF(ms) Voltage(V) TON(ms) TOFF(ms) Voltage(V)
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 48
Result: Thus the monostable multivibrator is designed and constructed using transistor and its
output waveform is plotted.
1. What are the applications of bistable Multivibrator?
It is used in the performance of many digital operations such as counting and storing of the
Binary information. It also finds applications in the generation and processing of pulse – type waveforms.
2. What are the other names of monostable Multivibrator?
One-shot, Single-shot, a single-cycle, a single swing, a single step Multivibrator, Univibrator.
3. Why is monostable Multivibrator called gatting circuit?
The circuit is used to generate the rectangular waveform and hence can be used to
gate other Circuits hence called gating circuit.
4.Why is monostable Multivibrator called delay circuit?
The time between the transition from quasi-stable state to stable state can be predetermined and
hence it can be used to introduce time delays with the help of fast transition. Due to this application is
Called delay circuit.
5.What is the main characteristics of Astable Multivibrator?
The Astable Multivibrator automatically makes the successive transitions from
one quasi- stable State to other without any external triggering pulse.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 49
EX NO: 10
DESIGN AND ANALYSIS OF BISTABLE MULTIVIBRATOR DATE :
Aim: To design a bistable multivibrator and to plot its output waveform.
Components / Equipments Required:
Circuit Diagram:
S.NO APPARATUS RANGE QUANTITY
1. Power supply
(0-30)V
1
2. CRO
(0-20M)Hz
1
3. Transistor
BC107
2
4. Resistors
4.9KΩ, 1.6MΩ
2 each
5. Capacitors
0.45nF
2
6. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 50
Theory:
The bistable multivibrator has two stable states. The multivibrator can exist indefinitely
in either of the twostable states. It requires an external trigger pulse to change from one stable
state to another. The circuit remains in one stable state until an external trigger pulse is applied.
The bistable multivibrator is used for the performance of many digital operations such as
counting and storing of binary information. The multivibrator also finds an applications in
generation and pulse type waveform.
Design:
VCC =12V; VBB = -12V; IC = 2mA; VCE (sat) = 0.2V; VBE (sat) = 0.7V
R2 = 1.8MΩ
Let R1 = 10KΩ, C1 = C2 = 50pF
Procedure:
1. Connections are made as per the circuit diagram.
2. Set the input trigger using trigger pulse generator.
3. Note the output waveform from CRO and plot the graph.
Tabular Column:
Input
Voltage
(V) Width (ms)
Input Output
TON(ms) TOFF(ms) Voltage(V) TON(ms) TOFF(ms) Voltage(V)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 51
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 52
Result: Thus bistable multivibrator has been constructed and its output waveforms are studied
1.What is the other name of Astable Multivibrator- why is it called so?
As it does not require any external pulse for transition, it is called free running Multivibrator.
2, What are the two types of transister bistable Multivibrator?
i. Fixed bias transistor circuit
ii. Self bias transistor circuit.
3. Why does one of the transistor start conducting ahead of other?
The characteristic of both the transistors are never identical hence after giving
supply one of the Transistors start conducting ahead of the other.
4. What are the two stable states of bistable Multivibrator?
i. Q1 OFF (cut off) and Q2 ON (Saturation)
ii. Q2 OFF (Cut off) and Q1 On (Saturation)
5. What finally decides the shape of the waveform for bistable multivibrator?
The spacing of the triggering pulses
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 53
EX NO: 11
DESIGN AND ANALYSIS OF WAVE SHAPING CIRCUITS
(Differentiator, Integrator, Clipper and Clamper) DATE :
Aim: To design and implement different wave shaping circuits (Differentiator, Integrator,
Clipper and Clamper).
Components / Equipments Required:
Theory:
(i) Differentiator: The high pass RC network acts as a differentiator whose output voltage
depends upon the differential of input voltage. Its output voltage of the differentiator can be
expressed as,
Vout = d/dt .Vin
(ii) Integrator: The low pass RC network acts as an integrator whose output voltage depends
upon the integration of input voltage. Its output voltage of the integrator can be expressed as,
Vout = ∫ Vin dt
S.NO APPARATUS RANGE QUANTITY
1. Function / Pulse generator
(0 – 3M)Hz
1
2. CRO
(0-20M)Hz
1
4. Resistors
1KΩ / 100KΩ
1
5. Capacitors
0.1μF
1
6. Connecting wires
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 54
(iii) Clipper: This circuit is basically a rectifier circuit, which clips the input waveform
according to the required specification. The diode acts as a clipper. There are several clippers
like positive clipper, negative clipper, etc. Depending upon the connection of diode it can be
classified as series and shunt.
(iv) Clamper: The clamper circuit is a type of wave shaping circuit in which the DC level of the
input signal is altered. The DC voltage is varied accordingly and it is classified as positive
clamper or negative clamper accordingly.
Circuit Diagram:
(i) Differentiator:
(ii) Integrator:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 55
(iii) Clipper:
(a) Series Positive Clipper:
(b) Shunt Positive Clipper:
(c) Series Negative Clipper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 56
(d) Shunt Negative Clipper:
(e) Positive Biased Series Positive Clipper:
(f) Positive Biased Shunt Positive Clipper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 57
(g) Positive Biased Series Negative Clipper:
(h) Positive Biased Shunt Negative Clipper:
(i) Negative Biased Series Positive Clipper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 58
(j) Negative Biased Shunt Positive Clipper:
(k) Negative Biased Series Negative Clipper:
(l) Negative Biased Shunt Negative Clipper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 59
(m) Combinational Clipper
(iv) Clamper:
(a) Positive Clamper:
(b) Negative Clamper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 60
Design:
(i) Differentiator:
f = 1KHz
т = RC = 1ms
If C = 0.1μF
Then R = 10KΩ
For T << т, Choose R = 1KΩ and
For T >> т, Choose R = 100KΩ
(ii) Integrator:
f = 1KHz
т = RC = 1ms
If C = 0.1μF
Then R = 10KΩ
For T << т, Choose R = 1KΩ and
For T >> т, Choose R = 100KΩ
Procedure:
1. Connect the circuit as per the circuit diagram.
2. Set Vin = 5V and f = 1KHz.
3. Observe the Output waveform and plot the graph.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 61
Model Graph:
(i) Differentiator
(ii) Integrator
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 62
(iii) Clipper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 63
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 64
(iv) Clamper:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 65
Result: Thus different wave shaping circuits are studied and their output waveforms are plotted.
1.Define Integrator.
The output waveform similar to the time integral of the input waveform i.e Vo = 1/RC
⌠Vidt.
2.Define differentiator.
The output waveform is the first derivative of the input waveform i.e Vo = RC(dVi/dt).
3.Define Clipper.
The circuit with which the wave form is shaped by removing a portion of input signal
without distorting the remaining part of the alternating waveform is called a clipper.
4.Define Clampers.
Clamping network shift a signal to different dc level i.e it introduce a to an ac signal.
Hence the clamping network is also known as dc restorer.
5.Define Comparator.
The nonlinear circuit which was used to perform the operation of clipping may also be
used perform the operation of comparison and this circuit is called comparator.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 66
EX NO: 12
SIMULATION OF DIFFERENTIAL AMPLIFIER DATE :
Aim: To simulate the Differential Amplifier by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 67
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
Result: -
Thus the output waveform was observed in the waveform viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 68
EX NO: 13
SIMULATION OF ASTABLE MULTIVIBRATOR DATE :
Aim: To simulate the Astable Multivibrator by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
Astable Multivibrator-Symmetrical
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 69
Astable Multivibrator-Asymmetrical
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 70
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 71
Result: -
Thus the output waveform was observed in the waveform viewer.
Astable Multivibrator-Symmetrical
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 72
Astable Multivibrator-Asymmetrical
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 73
EX NO: 14
SIMULATION OF MONOSTABLE MULTIVIBRATOR DATE :
Aim: To simulate the Monostable Multivibrator by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 74
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 75
Result:
Thus the output waveform was observed in the waveform viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 76
EX NO: 15
SIMULATION OF BISTABLE MULTIVIBRATOR DATE :
Aim: To simulate the Bistable Multivibrator by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 77
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 78
Result: -
Thus the output waveform was observed in the waveform viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 79
EX NO: 16
SIMULATION OF ACTIVE FILTERS DATE :
Aim: To simulate the Active filters: Butterworth 2nd
order Low Pass and High Pass Filter by
using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 80
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 81
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
Low Pass Filter:
High Pass Filter:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 82
Result: -
Thus the output waveform was observed in the waveform viewer.
Low Pass Filter:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 83
High Pass Filter:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 84
EX NO: 17
SIMULATION OF ANALOG TO DIGITAL CONVERTER DATE :
Aim: To simulate the Analog to Digital Converter by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
Procedure:
EDWin 2000 -> Schematic Editor: The circuit diagram is drawn by loading components from the
library. Wiring and proper net assignment has been made. The values are assigned for relevant
components.
EDWin 2000 -> Mixed Mode Simulator: The circuit is preprocessed. The waveform marker is
placed at the output of the circuit. GND net is set as reference net. The Transient Analysis
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 85
parameters have been set. The Transient Analysis is executed and output waveform is observed
in Waveform Viewer.
EDWin 2000 -> EDSpice Simulator: The circuit is preprocessed. The waveform marker is placed
at the output of the circuit. The Transient Analysis parameters are also set. The Transient
Analysis is executed and output waveform is observed in Waveform Viewer.
Model Graph:
M ODEL GRAPH :
Time in ms
Time in ms
Time in ms
Time in ms
Time in ms
Input (A)
Input (B)
Input (C)
Input (D)
Am
pli
tud
e i
n v
olt
s
Output Analog Signal
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 86
Result: -
Thus the output waveform was observed in the waveform viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 87
EX NO: 18
SIMULATION OF ANALOG MULTIPLIER DATE :
Aim: To simulate the Analog Multiplier by using PSICE.
System Required:
PC with SPICE software
Circuit Diagram:
SPICE Program:
V1 1 0 1V
V2 4 0 1V
R1 1 2 1K
R2 4 5 1K
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 88
R3 3 7 1K
R4 6 7 1K
R5 7 8 1K
R6 10 0 1K
D1 2 3 DA
D2 5 6 DA
D3 8 9 DA
.MODEL DA D
X1 2 0 3 IOP
X2 5 0 6 IOP
X3 7 0 8 IOP
X4 9 0 10 IOP
.SUBCKT IOP M P V0
RI M P 1G
E V0 0 P M 2E5
.ENDS
.DC V1 -1 1 0.1
.PROBE
.END
Result: -
Thus the output waveform was observed in the waveform viewer.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 89
EX NO: 19
SIMULATION OF CMOS INVERTER, NAND AND NOR DATE :
Aim: To plot the transient characteristics of output voltage for the given CMOS inverter, NAND
and NOR from 0 to 80μs in steps of 1μs.
System Required:
PC with SPICE software
Circuit Diagram:
(i) CMOS Inverter:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 90
(ii) CMOS NAND:
(iii) CMOS NOR:
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 91
Theory:
(i) Inverter CMOS is widely used in digital IC’s because of their high speed, low power
dissipation and it can be operated at high voltages resulting in improved noise immunity. The
inverter consists of two MOSFETs. The source of p-channel device is connected to +VDD and
that of n-channel device is connected to ground. The gates of two devices are connected as
common input.
(ii) NAND It consists of two p-channel MOSFETs connected in parallel and two n-channel
MOSFETs connected in series. P-channel MOSFET is ON when gate is negative and N-channel
MOSFET is ON when gate is positive. Thus when both input is low and when either of input is
low, the output is high.
(iii) NOR It consists of two p-channel MOSFETs connected in series and two n-channel
MOSFETs connected in parallel. P-channel MOSFET is ON when gate is negative and N-
channel MOSFET is ON when gate is positive. Thus when both inputs are high and when either
of input is high, the output is low. When both the inputs are low, the output is high.
Truth Table:
(i) Inverter
Input Output
0 1
1 0
(ii) NAND
V1 V2 Output
0 0 1
0 1 1
1 0 1
1 1 0
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 92
(iii) NOR
V1 V2 Output
0 0 1
0 1 0
1 0 0
1 1 0
Model Graph:
(i) Inverter
(ii) NAND
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 93
(iii) NOR
Result: -
Thus the output waveform was observed in the waveform viewer.
(i) Inverter
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 94
(ii) NAND
(iii) NOR
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 95
VIVA:
1. What are the advantages of monostable Multivibrator?
- used to introduce time delays as gate width is adjustable
- used to produce rectangular waveform and hence can be used as gating circuit.
2. What are the applications of astable Multivibtrator?
- used as a clock for binary login signals
- used as a square wave generator, voltage to frequency converter.
3 .What is a complementary Multivibrator
It is turning half the circuit upside down. So one transistor is n-p-n while the
other is p-n-p. The circuit is called complementary Multivibrator circuit.
4. Define Blocking Oscillator?
A special type of wave generator which is used to produce a single narrow pulse
or train of pulses.
5. What are the two important elements of Blocking Oscillator?
Transistor and pulse transformer
6. What are the applications of blocking Oscillator?
It is used in frequency dividers, counter circuits and for switching the other
circuits.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 96
APPENDIX
NPN general purpose transistors BC107; BC108; BC109
FEATURES
Low current (max. 100 mA)
Low voltage (max. 45 V).
APPLICATIONS
General purpose switching and amplification.
DESCRIPTION
NPN transistor in a TO-18; SOT18 metal package. PNP complement: BC177.
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 97
QUICK REFERENCE DATA
SYMBOL PARAMETER CONDITIONS MIN. MAX. UNIT V
CBO collector-base voltage open emitter
BC107 50 V
BC108; BC109 30 V V
CEO collector-emitter voltage open base
BC107 45 V
BC108; BC109 20 V ICM peak collector current 200 mA
Ptot total power dissipation Tamb 25 C 300 mW
hFE DC current gain IC = 2 mA; VCE = 5 V
BC107 110 450
BC108 110 800
BC109 200 800
fT transition frequency IC = 10 mA; VCE = 5 V; f = 100 MHz 100 MHz
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 98
DIODES: 1N4001 - 1N4007
Features
• Diffused Junction • High Current Capability and Low Forward Voltage Drop • Surge Overload Rating to 30A Peak • Low Reverse Leakage Current • Lead Free Finish, RoHS Compliant (Note 3)
Mechanical Data
• Case: DO-41 • Case Material: Molded Plastic. UL Flammability Classification Rating 94V-0
• Moisture Sensitivity: Level 1 per J-STD-020D • Terminals: Finish - Bright Tin. Plated Leads Solderable per MIL-STD-202, Method 208
• Polarity: Cathode Band • Mounting Position: Any • Ordering Information: See Page 2 • Marking: Type Number • Weight: 0.30 grams (approximate)
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EC 2257-ELECTRONICS CIRCUITS II AND SIMULATION LAB MANUAL II YEAR
ISSUE: 01 REVISION: 00 99
Maximum Ratings and Electrical Characteristics @TA = 25°C unless otherwise specified
Single phase, half wave, 60Hz, resistive or inductive load. For capacitive load, derate current by 20%.
Characteristic Symbol 1N4001 1N4002 1N4003 1N4004 1N4005 1N4006 1N4007 Unit
Peak Repetitive Reverse Voltage VRRM
Working Peak Reverse Voltage VRWM 50 100 200 400 600 800 1000 V
DC Blocking Voltage VR
RMS Reverse Voltage VR(RMS) 35 70 140 280 420 560 700 V
Average Rectified Output Current (Note 1) @ TA =
75C IO 1.0 A
Non-Repetitive Peak Forward Surge Current 8.3ms IFSM
30
A
single half sine-wave superimposed on rated load
Forward Voltage @ IF = 1.0A VFM 1.0 V
Peak Reverse Current @TA = 25C IRM
5.0
μA
at Rated DC Blocking Voltage @ TA = 100C 50
Typical Junction Capacitance (Note 2) C
j 15 8 pF
Typical Thermal Resistance Junction to Ambient RθJA 100 K/W
Maximum DC Blocking Voltage Temperature TA +150 C
Operating and Storage Temperature Range TJ, TSTG -65 to +150 C
Notes: 1. Leads maintained at ambient temperature at a distance of 9.5mm from the case. 2. Measured at 1.0 MHz and applied reverse voltage of 4.0V DC.
3. EU Directive 2002/95/EC (RoHS). All applicable RoHS exemptions applied, see EU Directive
2002/95/EC Annex Notes.
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