Chapter 9Chapter 9

Logic Families and Their Logic Families and Their CharacteristicsCharacteristics

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ObjectivesObjectives

You should be able to:You should be able to: Analyze internal circuitry of a TTL Analyze internal circuitry of a TTL

NAND gate for both HIGH and LOW NAND gate for both HIGH and LOW output states.output states.

Determine IC input and output voltage Determine IC input and output voltage and current ratings from the and current ratings from the manufacturer’s data manual.manufacturer’s data manual.

Explain gate loading, fan-out, noise Explain gate loading, fan-out, noise margin, and time parameters.margin, and time parameters.

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ObjectivesObjectives

(Continued) (Continued) Design wired-output circuits using Design wired-output circuits using

open-collector TTL gates.open-collector TTL gates. Discuss the differences and proper use Discuss the differences and proper use

of the various subfamilies within both of the various subfamilies within both TTL and CMOS ICs.TTL and CMOS ICs.

Describe the reasoning and various Describe the reasoning and various techniques for interfacing between the techniques for interfacing between the TTL, CMOS, and ECL families of ICs.TTL, CMOS, and ECL families of ICs.

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The TTL FamilyThe TTL Family Bipolar transistorsBipolar transistors

Physical modelPhysical model SymbolSymbol Diode equivalentDiode equivalent

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The TTL FamilyThe TTL Family

Two-input NAND gateTwo-input NAND gate Multi-emitter transistorMulti-emitter transistor Totem-pole output stageTotem-pole output stage HIGH level output typically 3.4 VHIGH level output typically 3.4 V LOW level output typically 0.3 VLOW level output typically 0.3 V

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The TTL FamilyThe TTL Family 7400 two-input NAND gate7400 two-input NAND gate

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Input/output current and fan-outInput/output current and fan-out Source current – ISource current – IOHOH

Sink current – ISink current – IOLOL

Low-level input current – ILow-level input current – IILIL

High level input current – IHigh level input current – IIHIH

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Example of TTL gate sinking input Example of TTL gate sinking input currents from two gate inputs using currents from two gate inputs using logic symbolslogic symbols

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Example of TTL gate sinking input Example of TTL gate sinking input currents from two gate inputs using currents from two gate inputs using schematic symbolsschematic symbols

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Example of TTL gate sourcing Example of TTL gate sourcing current to two gate inputs using current to two gate inputs using logic symbolslogic symbols

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Example of TTL gate sourcing current Example of TTL gate sourcing current to two gate inputs using schematic to two gate inputs using schematic symbolssymbols

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Summary of I/O current and fan-out:Summary of I/O current and fan-out: Low-level input current Low-level input current IIILIL = 1.6 mA (-1600 = 1.6 mA (-1600 μA)μA) High level input current High level input current IIIHIH = 40 = 40 μAμA

(The minus sign indicates current (The minus sign indicates current leavingleaving the gate) the gate) IIOLOL – low-level output current = 16 mA (16,000 – low-level output current = 16 mA (16,000

μA)μA) IIOHOH – high-level output current = -400 – high-level output current = -400 μA (-800 μA (-800

μA for some)μA for some) (Max capability of a gate to sink or source current)(Max capability of a gate to sink or source current)

Fan-out is max number of gate inputs that can Fan-out is max number of gate inputs that can be connected to a standard ttl gate output. be connected to a standard ttl gate output. Typically fan-out = 10.Typically fan-out = 10.

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Input/Output Voltages and Noise Input/Output Voltages and Noise MarginMargin Noise margin: The difference Noise margin: The difference

between high level voltages and low between high level voltages and low level voltageslevel voltages

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TTL Voltage and Current TTL Voltage and Current RatingsRatings

Input/Output Voltages and Noise Input/Output Voltages and Noise Margin (graphical representation)Margin (graphical representation)

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Discussion PointDiscussion Point

Locate the voltage and current Locate the voltage and current ratings covered so far on the ratings covered so far on the typical data sheet given in Figure typical data sheet given in Figure 9-8.9-8.

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Other TTL Other TTL ConsiderationsConsiderations

Pulse-Time ParametersPulse-Time Parameters Rise Time – Measured from 10% level Rise Time – Measured from 10% level

to 90% levelto 90% level

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Other TTL Other TTL ConsiderationsConsiderations Pulse-Time ParametersPulse-Time Parameters

Fall Time – Measured from 90% level Fall Time – Measured from 90% level to 10% levelto 10% level

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Other TTL Other TTL ConsiderationsConsiderations Pulse-Time ParametersPulse-Time Parameters

Propagation Delay (tPropagation Delay (tPLHPLH and t and tPHLPHL))

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Other TTL Other TTL ConsiderationsConsiderations

Power dissipationPower dissipation Total power supplied to the IC power Total power supplied to the IC power

terminalsterminals Open-collector outputsOpen-collector outputs

Upper transistor removed from totem-Upper transistor removed from totem-polepole

Can sink currentCan sink current Can not source currentCan not source current Pull-up resistor usedPull-up resistor used

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Other TTL Other TTL ConsiderationsConsiderations Wired-output operationWired-output operation

Outputs from two or more gates tied Outputs from two or more gates tied togethertogether

Wired-AND logicWired-AND logic

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Figure 9–16Figure 9–16 Wired-ANDing of open-collector gates for Example 9–4: (a) original circuit and Wired-ANDing of open-collector gates for Example 9–4: (a) original circuit and (b) alternative gate representations used for clarity.(b) alternative gate representations used for clarity.

Figure 9–13 (continued)Figure 9–13 (continued) TTL NAND with an open-collector output: (a) circuitry; (b) truth table. TTL NAND with an open-collector output: (a) circuitry; (b) truth table.

Figure 9–13Figure 9–13 TTL NAND with an open-collector output: (a) circuitry; (b) truth table. TTL NAND with an open-collector output: (a) circuitry; (b) truth table.

Figure 9–14Figure 9–14 Using a pull-up resistor with an open-collector output. (a) Adding a pull-up Using a pull-up resistor with an open-collector output. (a) Adding a pull-up resistor to a NAND gate. (b) When Qresistor to a NAND gate. (b) When Q44 inside the NAND is on, V inside the NAND is on, Voutout ≈ 0 V. (c) When ≈ 0 V. (c) When QQ44 is off, the is off, the pull-up resistor provides ≈ 5 V to pull-up resistor provides ≈ 5 V to VVoutout..

Other TTL Other TTL ConsiderationsConsiderations

Disposition of unused inputs and Disposition of unused inputs and unused gatesunused gates Open inputs degrade noise immunityOpen inputs degrade noise immunity On AND and NAND – tied HIGHOn AND and NAND – tied HIGH On OR and NOR – tied LOWOn OR and NOR – tied LOW Unused gates – force outputs HIGHUnused gates – force outputs HIGH

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Other TTL Other TTL ConsiderationsConsiderations

Power supply decouplingPower supply decoupling Connecing 0.01 to 0.1 Connecing 0.01 to 0.1 F capacitor F capacitor

between Vbetween VCCCC and ground pins and ground pins Reduces EMI radiationReduces EMI radiation Reduces effect of voltage spikes from power Reduces effect of voltage spikes from power

supplysupply

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Improved TTL SeriesImproved TTL Series

74HXX series74HXX series Half the propagation delayHalf the propagation delay Double the power consumptionDouble the power consumption

Schottky TTLSchottky TTL Low-power (LS)Low-power (LS) Advanced low-power (ALS)Advanced low-power (ALS)

74FXX74FXX Reduced propagation delayReduced propagation delay

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Figure 9–17Figure 9–17 Schottky-clamped transistor: (a) Schottky diode reduces stored charges and (b) Schottky-clamped transistor: (a) Schottky diode reduces stored charges and (b) symbol.symbol.

The CMOS FamilyThe CMOS Family MOSFETsMOSFETs

Metal oxide semiconductor field-effect Metal oxide semiconductor field-effect transistorstransistors

PMOS and NMOS type substratesPMOS and NMOS type substrates

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The CMOS FamilyThe CMOS Family MOSFETsMOSFETs

Higher packing densities than TTLHigher packing densities than TTL Millions of memory cells per chipMillions of memory cells per chip

• See Table 9-2 in your textSee Table 9-2 in your text

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Table 9–2Table 9–2 Basic MOSFET switching characteristics. Basic MOSFET switching characteristics.

Figure 9–19Figure 9–19 CMOS inverter formed from complementary CMOS inverter formed from complementary NN-channel/-channel/PP-channel transistors.-channel transistors.

The CMOS FamilyThe CMOS Family

Handling CMOS devicesHandling CMOS devices Avoid electrostatic dischargeAvoid electrostatic discharge

CMOS availabilityCMOS availability 4000 series - original CMOS line4000 series - original CMOS line 40H00 series - faster40H00 series - faster 74C00 series - pin compatible with TTL74C00 series - pin compatible with TTL 74HC00 and 74HCT00 series74HC00 and 74HCT00 series

Speedy, less power, pin compatible, Speedy, less power, pin compatible, greater noise immunity and temperature greater noise immunity and temperature operating rangeoperating range

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Figure 9–21Figure 9–21 Wearing a commercially available wrist strap dissipates static charges from the Wearing a commercially available wrist strap dissipates static charges from the technician’s body to a ground connection while handling CMOS ICs.technician’s body to a ground connection while handling CMOS ICs.

The CMOS FamilyThe CMOS Family CMOS availabilityCMOS availability

74- biCMOS series - low power and 74- biCMOS series - low power and high speedhigh speed

74-low voltage series 74-low voltage series See appendix BSee appendix B Nominal supply voltage of 3.3 VNominal supply voltage of 3.3 V

74AHC and 74AHCT series74AHC and 74AHCT series Superior speedSuperior speed Low power consumptionLow power consumption High output drive currentHigh output drive current

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The CMOS FamilyThe CMOS Family

74AVC advanced very-low-voltage 74AVC advanced very-low-voltage CMOS logicCMOS logic Faster speedFaster speed Very low operating voltagesVery low operating voltages

3.3 V, 2.5 V, 1.8 V, 1.5 V and 1.2 V3.3 V, 2.5 V, 1.8 V, 1.5 V and 1.2 V

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Emitter-Coupled LogicEmitter-Coupled Logic Extremely fastExtremely fast Increased power dissipationIncreased power dissipation Uses differential amplifiersUses differential amplifiers

Figure 9-22

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Emitter-Coupled LogicEmitter-Coupled Logic Newer technologiesNewer technologies

Integrated injection logic (IIntegrated injection logic (I22L)L) Silicon-on-sapphire (SOS)Silicon-on-sapphire (SOS) Gallium arsenide (GaAs)Gallium arsenide (GaAs) Josephson junction circuitsJosephson junction circuits

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Comparing Logic Comparing Logic FamiliesFamilies

Performance specificationsPerformance specifications

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Comparing Logic Comparing Logic FamiliesFamilies

Propagation delay versus powerPropagation delay versus power

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Comparing Logic Comparing Logic FamiliesFamilies

Power supply current versus frequencyPower supply current versus frequency

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Interfacing Logic Interfacing Logic FamiliesFamilies TTL to CMOSTTL to CMOS

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Interfacing Logic Interfacing Logic FamiliesFamilies

TTL to CMOSTTL to CMOS Pull-up resistorPull-up resistor

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Interfacing Logic Interfacing Logic FamiliesFamilies

CMOS to TTLCMOS to TTL

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Interfacing Logic Interfacing Logic FamiliesFamilies

CMOS to TTLCMOS to TTL

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Interfacing Logic Interfacing Logic FamiliesFamilies

Worse-case valuesWorse-case values See Table 9-4 in your text.See Table 9-4 in your text.

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Interfacing Logic Interfacing Logic FamiliesFamilies

Level ShiftingLevel Shifting Level-shifter ICs: 4049B and 4050BLevel-shifter ICs: 4049B and 4050B

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Interfacing Logic Interfacing Logic FamiliesFamilies

Level ShiftingLevel Shifting Level-shifter ICs: 4504BLevel-shifter ICs: 4504B

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Interfacing Logic Interfacing Logic FamiliesFamilies

ECL InterfacingECL Interfacing

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SummarySummary

There are basically three stages of There are basically three stages of internal circuitry in a TTL internal circuitry in a TTL (transistor-transistor-logic) IC: (transistor-transistor-logic) IC: input, control, and output.input, control, and output.

The input current (IThe input current (IILIL or I or IIHIH) to an IC ) to an IC gate is a constant value specified by gate is a constant value specified by the IC manufacturer.the IC manufacturer.

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SummarySummary

The output current of an IC gate The output current of an IC gate depends on the size of the load depends on the size of the load connected to it. Its value cannot connected to it. Its value cannot exceed the maximum rating of the exceed the maximum rating of the chip, Ichip, IOLOL or I or IOHOH..

The HIGH- and LOW-level output The HIGH- and LOW-level output voltages of the standard TTL family voltages of the standard TTL family are not 5 V and 0 V but typically are are not 5 V and 0 V but typically are 3.4 V and 0.2 V.3.4 V and 0.2 V.

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SummarySummary

The propagation delay is the length The propagation delay is the length of time that it takes for the output of of time that it takes for the output of a gate to respond to a stimulus at its a gate to respond to a stimulus at its input.input.

The rise and fall times of a pulse The rise and fall times of a pulse describe how long it takes for the describe how long it takes for the voltage to travel between its 10% voltage to travel between its 10% and 90% levels.and 90% levels.

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SummarySummary

Open-collector outputs are required Open-collector outputs are required whenever logic outputs are whenever logic outputs are connected to a common point.connected to a common point.

Several improved TTL families are Several improved TTL families are available and continue to be available and continue to be introduced each year providing introduced each year providing decreased power consumption and decreased power consumption and decreased propagation delay.decreased propagation delay.

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SummarySummary

The CMOS family uses The CMOS family uses complementary metal oxide complementary metal oxide semiconductor transistors instead of semiconductor transistors instead of the bipolar transistors used in TTL the bipolar transistors used in TTL ICs. Traditionally, the CMOS family ICs. Traditionally, the CMOS family consumed less power but was slower consumed less power but was slower than TTL. However, recent than TTL. However, recent advances in both technologies have advances in both technologies have narrowed the differences.narrowed the differences.

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SummarySummary

The BiCMOS family combines the The BiCMOS family combines the best characteristics of bipolar best characteristics of bipolar technology and CMOS technology technology and CMOS technology to provide logic functions that are to provide logic functions that are optimized for the high-speed, low-optimized for the high-speed, low-power characteristics required in power characteristics required in microprocessor systems.microprocessor systems.

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SummarySummary

A figure of merit of IC families is the A figure of merit of IC families is the product of their propagation delay product of their propagation delay and power consumption, called the and power consumption, called the speed-power product (the lower, the speed-power product (the lower, the better).better).

Emitter-coupled logic (ECL) provides Emitter-coupled logic (ECL) provides the highest-speed ICs. Its drawback the highest-speed ICs. Its drawback is its very high power consumption.is its very high power consumption.

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SummarySummary

When interfacing logic families, When interfacing logic families, several considerations must be made. several considerations must be made. The output voltage level of one The output voltage level of one family must be high and low enough family must be high and low enough to meet the input requirements of the to meet the input requirements of the receiving family. Also, the output receiving family. Also, the output current capability of the driving gate current capability of the driving gate must be high enough for the input must be high enough for the input draw of the receiving gate or gates.draw of the receiving gate or gates.

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