logic families

55
Logic Families Logic Families Introduction & Overview Introduction & Overview CSET 4650 Field Programmable Logic Devices Dan Solarek Dan Solarek Dan Solarek

Upload: ctingjuy

Post on 19-Nov-2014

12 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: Logic Families

Logic FamiliesLogic FamiliesIntroduction & OverviewIntroduction & Overview

CSET 4650 Field Programmable Logic Devices

Dan SolarekDan SolarekDan Solarek

Page 2: Logic Families

2

Logic FamiliesLogic FamiliesLogic Family : A collection of different ICLogic Family : A collection of different IC’’s that s that have similar circuit characteristicshave similar circuit characteristicsThe circuit design of the basic gate of each logic The circuit design of the basic gate of each logic family is the samefamily is the sameThe most important parameters for evaluating and The most important parameters for evaluating and comparing logic families include :comparing logic families include :

Logic Levels Logic Levels Power Dissipation Power Dissipation Propagation delayPropagation delayNoise margin Noise margin FanFan--out ( loading )out ( loading )

Page 3: Logic Families

3

Example Logic FamiliesExample Logic FamiliesGeneral comparison or three commonly available logic General comparison or three commonly available logic families.families.

the most important to understand

Page 4: Logic Families

4

Implementing Logic CircuitsImplementing Logic CircuitsThere are several varieties of transistors There are several varieties of transistors –– the the building blocks of logic gates building blocks of logic gates –– the most important the most important are:are:

BJT (bipolar junction transistors)BJT (bipolar junction transistors)one of the first to be inventedone of the first to be invented

FET (field effect transistors)FET (field effect transistors)especially Metalespecially Metal--Oxide Semiconductor types (Oxide Semiconductor types (MOSFETMOSFET’’ss))MOSFETMOSFET’’ss are of two types: NMOS and PMOSare of two types: NMOS and PMOS

Page 5: Logic Families

5

Transistor Size ScalingTransistor Size ScalingPerformance improves as size is decreased: shorter switching time, lower power consumption.

2 orders of magnitude reduction in transistor size in 30 years.

Page 6: Logic Families

6

MooreMoore’’s Laws LawIn 1965, Gordon Moore predicted that the number of In 1965, Gordon Moore predicted that the number of transistors that can be integrated on a die would transistors that can be integrated on a die would double every 18 to 14 monthsdouble every 18 to 14 months

i.e., grow exponentially with timei.e., grow exponentially with time

Considered a visionary Considered a visionary –– million transistor/chip million transistor/chip barrier was crossed in the 1980barrier was crossed in the 1980’’ss

2300 transistors, 1 MHz clock (Intel 4004/4040) 2300 transistors, 1 MHz clock (Intel 4004/4040) -- 1971197142 Million transistors, 2 GHz clock (Intel P4) 42 Million transistors, 2 GHz clock (Intel P4) -- 20012001140 Million transistors, (HP PA140 Million transistors, (HP PA--8500)8500)

Page 7: Logic Families

7

MooreMoore’’s Law and Intels Law and Intel

From Intel’s 4040 (2300 transistors) to Pentium II (7,500,000 transistors) and beyond

Page 8: Logic Families

8

TTL and CMOSTTL and CMOSConnecting Connecting BJTBJT’’ss together gives rise to a family of logic gates together gives rise to a family of logic gates known as TTLknown as TTLConnecting NMOS and PMOS transistors together gives rise Connecting NMOS and PMOS transistors together gives rise to the CMOS family of logic gatesto the CMOS family of logic gates

BJT MOSFET(NMOS, PMOS)transistor types

TTL CMOSlogic gate families

Page 9: Logic Families

9

Electrical Parameters And Electrical Parameters And Interpretation Of Data SheetsInterpretation Of Data Sheets

Voltages and CurrentsVoltages and CurrentsNoise MarginNoise MarginPower DissipationPower DissipationPropagation DelayPropagation DelaySpeedSpeed--Power ProductPower ProductFanFan--In, FanIn, Fan--OutOutComparison of Logic FamiliesComparison of Logic FamiliesInterpretation of Data SheetsInterpretation of Data Sheets

Page 10: Logic Families

10

Electrical CharacteristicsElectrical Characteristics

CMOSCMOSlower power consumptionlower power consumptionsimpler to makesimpler to makegreater packing densitygreater packing densitybetter noise immunity

TTL TTL faster (some versions)faster (some versions)strong drive capabilitystrong drive capabilityruggedrugged

better noise immunity

• Complex IC’s contain many millions of transistors• If constructed entirely from TTL type gates would melt• A combination of technologies (families) may be used• CMOS has become most popular and has had greatest development

Page 11: Logic Families

11

Voltage & CurrentVoltage & CurrentFor a HighFor a High--state gate driving a second gate, we define:state gate driving a second gate, we define:

VVOHOH (min), high(min), high--level output voltage, the minimum voltage level that a logic level output voltage, the minimum voltage level that a logic gate will gate will produce as a logic 1 outputproduce as a logic 1 output..VVIHIH (min), high(min), high--level input voltage, the minimum voltage level that a logic level input voltage, the minimum voltage level that a logic gate will gate will recognize as a logic 1 inputrecognize as a logic 1 input. Voltage below this level will not be . Voltage below this level will not be accepted as high.accepted as high.IIOHOH, high, high--level output current, current that flows from an output in the llevel output current, current that flows from an output in the logic ogic 1 state under specified load conditions.1 state under specified load conditions.IIIHIH, high, high--level input current, current that flows into an input when a loglevel input current, current that flows into an input when a logic 1 ic 1 voltage is applied to that input.voltage is applied to that input.

Ground

VIHVOH

I OH I IHTest setup for measuring values

Page 12: Logic Families

12

Voltage & CurrentVoltage & CurrentFor a LowFor a Low--state gate driving a second gate, we state gate driving a second gate, we define:define:

VVOLOL (max), low(max), low--level output voltage, the maximum voltage level level output voltage, the maximum voltage level that a logic gate will that a logic gate will produce as a logic 0 outputproduce as a logic 0 output..VVILIL (max), low(max), low--level input voltage, the maximum voltage level level input voltage, the maximum voltage level that a logic gate will that a logic gate will recognize as a logic 0 inputrecognize as a logic 0 input. Voltage above . Voltage above this value will not be accepted as low.this value will not be accepted as low.IIOL OL , low, low--level output current, current that flows from an output level output current, current that flows from an output in the logic 0 state under specified load conditions.in the logic 0 state under specified load conditions.IIIL IL , low, low--level input current, current that flows into an input when level input current, current that flows into an input when a logic 0 voltage is applied to that input.a logic 0 voltage is applied to that input.

Inputs are connected to Vccinstead of Ground

Ground

V ILV OL

I OL I IL

Page 13: Logic Families

13

Electrical CharacteristicsElectrical Characteristics

Important characteristics are:Important characteristics are:

VVOHminOHmin min value of output recognized as a min value of output recognized as a ‘‘11’’VVIHminIHmin min value input recognized as a min value input recognized as a ‘‘11’’

VVILmaxILmax max value of input recognized as a max value of input recognized as a ‘‘00’’VVOLmaxOLmax max value of output recognized as a max value of output recognized as a ‘‘00’’

Values outside the given range are not allowed.Values outside the given range are not allowed.logic 0logic 0

logic 1logic 1

indeterminateindeterminateinput voltageinput voltage

Page 14: Logic Families

14

Typical acceptable voltage ranges for positive logic 1 and Typical acceptable voltage ranges for positive logic 1 and logic 0 are shown belowlogic 0 are shown belowA logic gate with an input at a voltage level within the A logic gate with an input at a voltage level within the ‘‘indeterminateindeterminate’’ range will produce an unpredictable output range will produce an unpredictable output level.level.

Logic Level & Voltage RangeLogic Level & Voltage Range

Logic 1

Logic 0

5.0V

0V

2.5VIndeterminate

0.8V

TTL

Logic 1

Logic 0

5.0V

Indeterminate

0V

1.5V

CMOS

3.5V

Page 15: Logic Families

15

Noise MarginNoise MarginManufacturers specify voltage limits to represent the logical 0 or 1. These limits are not the same at the input and output sides.

For example, a particular Gate A may output a voltage of 4.8V when it is supposed to output a HIGH but, at its input side, it can take a voltage of 3V as HIGH.

In this way, if any noise should corrupt the signal, there is some margin for error.

Page 16: Logic Families

16

Noise MarginNoise MarginIf noise in the circuit is high enough If noise in the circuit is high enough it can push a logic 0 up or drop a it can push a logic 0 up or drop a logic 1 down into the indeterminate logic 1 down into the indeterminate or or ““illegalillegal”” regionregionThe magnitude of the voltage The magnitude of the voltage required to reach this level is the required to reach this level is the noise marginnoise marginNoise margin for logic high is:Noise margin for logic high is:

NNMHMH = = VVOHminOHmin –– VVIHminIHmin

VOHmin

VIHmin

VILmax

VOLmaxlogic 0logic 0

logic 1logic 1

indeterminateindeterminateinput voltageinput voltage

Page 17: Logic Families

17

Noise MarginNoise MarginDifference between the worst case output voltage of Difference between the worst case output voltage of one stage and worst case input voltage of next stage one stage and worst case input voltage of next stage Greater the difference, the more unwanted signal that Greater the difference, the more unwanted signal that can be added without causing incorrect gate can be added without causing incorrect gate operationoperation

NMNMhighhigh = = VVOHminOHmin -- VVIHminIHmin

NMNMlowlow = = VVILmaxILmax -- VVOLmaxOLmax

Page 18: Logic Families

18

Worked ExampleWorked ExampleGiven the following parameters, calculate the Given the following parameters, calculate the noise margin of 74LS series.noise margin of 74LS series.

Parameter 74LSVIH(min) 2VVIL(max) 0.8VVOH(min) 2.7VVOL(max) 0.4V

Solution:High Level Noise Margin, VNH = VOH (min) - VIH (min)=2.7V-2.0V=0.7VLow Level Noise Margin, VNL = VIL (max) - VOL (max)=0.8V-0.4V=0.4V

Page 19: Logic Families

19

Noise Margin & Noise ImmunityNoise Margin & Noise ImmunityNoise immunity of a logic circuit refers to the circuitNoise immunity of a logic circuit refers to the circuit’’s ability s ability to tolerate noise voltages on its inputs. to tolerate noise voltages on its inputs. A quantitative measure of noise immunity is called A quantitative measure of noise immunity is called noise noise marginmarginHigh Level Noise Margin, VHigh Level Noise Margin, VNHNH = V= VOHOH (min) (min) -- VVIHIH (min)(min)Low Level Noise Margin, VLow Level Noise Margin, VNLNL = V= VILIL (max) (max) -- VVOLOL (max)(max)

Logic 1

Logic 0Logic 0

Logic 1VOH (min)

VOL (max)

VIH (min)

VIL (max)

VNH

VNL

Output Voltage Ranges Input Voltage Ranges

Page 20: Logic Families

20

Further Important CharacteristicsFurther Important CharacteristicsThe The propagation delay propagation delay ((ttpdpd) which is the time ) which is the time taken for a change at the input to appear at the taken for a change at the input to appear at the outputoutputThe The fanfan--outout, which is the maximum number of , which is the maximum number of inputs that can be driven successfully to either inputs that can be driven successfully to either logic level before the output becomes invalidlogic level before the output becomes invalid

Page 21: Logic Families

21

Speed: Rise & Fall TimesSpeed: Rise & Fall TimesRise TimeRise Time

Time from 10% to 90% of signal, Low to HighTime from 10% to 90% of signal, Low to HighFall TimeFall Time

Time from 90% to 10% of signal, High to LowTime from 90% to 10% of signal, High to Low

rise time

10% 90% 90% 10%

fall time

Page 22: Logic Families

22

Speed: Propagation DelaySpeed: Propagation DelayA logic gate always takes some time to change statesA logic gate always takes some time to change statesttPLHPLH is the delay time before output changes from low to high is the delay time before output changes from low to high ttPHLPHL is the delay time before output changes from high to lowis the delay time before output changes from high to lowboth both ttPLHPLH & & ttPHLPHL are measured between the 50% points on the are measured between the 50% points on the input and output transitionsinput and output transitions

50%Input

Output

0

0tPHL tPLH

Page 23: Logic Families

23

Power DissipationPower DissipationStaticStatic

II22R losses due to passive components, no input signalR losses due to passive components, no input signal

DynamicDynamicII22R losses due to charging and discharging capacitances R losses due to charging and discharging capacitances through resistances, due to input signalthrough resistances, due to input signal

Page 24: Logic Families

24

SpeedSpeed--Power ProductPower ProductSpeed (propagation delay) and power consumption Speed (propagation delay) and power consumption are the two most important performance parameters are the two most important performance parameters of a digital IC.of a digital IC.A simple means for measuring and comparing the A simple means for measuring and comparing the overall performance of an IC family is the speedoverall performance of an IC family is the speed--power product (the smaller, the better).power product (the smaller, the better).For example, an IC has For example, an IC has

an average propagation delay of 10 ns an average propagation delay of 10 ns an average power dissipation of 5 an average power dissipation of 5 mWmWthe speedthe speed--power product = (10 ns) x (5 power product = (10 ns) x (5 mWmW))

= 50 = 50 picoJoulespicoJoules ((pJpJ))

Page 25: Logic Families

25

Logic Family TradeoffsLogic Family Tradeoffs

Looking for the best Looking for the best speed/power productspeed/power productttpp and Pd are normally and Pd are normally included in the data included in the data sheet for each devicesheet for each deviceOlder logic families Older logic families are the worstare the worstCMOS is one of the CMOS is one of the bestbestFPGAsFPGAs use CMOSuse CMOS

Page 26: Logic Families

26

Comparison of Logic FamiliesComparison of Logic Families

Page 27: Logic Families

27

TTL TTL -- ExampleExample SN74LS00SN74LS00Recommended operating conditionsRecommended operating conditions

VVcccc supply voltage supply voltage 5V 5V ±± 0.5 V0.5 Vinput voltages input voltages VVIHIH = 2V= 2V

VVILIL = 0.8V= 0.8V

Electrical CharacteristicsElectrical Characteristicsoutput voltage output voltage VVOHOH = 2.7V= 2.7V(worst case) (worst case) VVOLOL = 0.5V = 0.5V

max input currentsmax input currents IIIHIH = 20= 20µµAAIIILIL = = --0.4mA0.4mA

propagation delay propagation delay ttpdpd = 15 = 15 nSnS

noise margins noise margins for a logic 0 = 0.3Vfor a logic 0 = 0.3Vfor a logic 1 = 0.7Vfor a logic 1 = 0.7V

FanFan--outout 20 TTL loads20 TTL loads

5 Volt

0 Volt

0.80.5

2.02.7

InputRangefor 1

InputRangefor 0

OutputRangefor 0

OutputRangefor 1

Page 28: Logic Families

28

FanFan--InInNumber of input signals to a gateNumber of input signals to a gate

Not an electrical propertyNot an electrical propertyFunction of the manufacturing processFunction of the manufacturing process

NAND gate with a Fan-in of 8

Page 29: Logic Families

29

FanFan--OutOutA measure of the ability of the output of one gate to A measure of the ability of the output of one gate to drive the drive the input(sinput(s) of subsequent gates) of subsequent gatesUsually specified as standard loads within a single Usually specified as standard loads within a single familyfamily

e.g., an input to an inverter in the same familye.g., an input to an inverter in the same familyMay have to compute based on current drive May have to compute based on current drive requirements when mixing familiesrequirements when mixing families

Although mixing families is not usually recommendedAlthough mixing families is not usually recommended

Page 30: Logic Families

30

Current Sourcing and SinkingCurrent Sourcing and Sinking

VOH

IIH

Low

VOL

IIL

High

CurrentCurrent--source : the driving gate produces a source : the driving gate produces a outgoing currentoutgoing current

Current-sinking : the driving gate receives an incoming current

Page 31: Logic Families

31

FanFan--OutOutAn illustration of fanAn illustration of fan--out and the associated source out and the associated source and sink currentsand sink currents

Page 32: Logic Families

32

Worked ExampleWorked ExampleHow many 74LS00 NAND gate inputs can be driven How many 74LS00 NAND gate inputs can be driven by a 74LS00 NAND gate outputs ?by a 74LS00 NAND gate outputs ?

Solution:Solution:Refer to data sheet of 74LS00, the maximum values ofRefer to data sheet of 74LS00, the maximum values of

IIOH OH = 0.4mA, = 0.4mA, IIOLOL = 8mA= 8mA, I, IIHIH = 20uA, and = 20uA, and IIILIL = 0.4mA= 0.4mAHence,Hence,

fanfan--out(highout(high) = ) = IIOHOH(max(max) / ) / IIIHIH (max)=0.4mA/20uA=20(max)=0.4mA/20uA=20fanfan--out(lowout(low) = ) = IIOLOL(max(max) / ) / IIILIL(max(max)=8mA/0.4mA=20,)=8mA/0.4mA=20,the overall fanthe overall fan--out = fanout = fan--out(highout(high) or fan) or fan--out(lowout(low) whichever is lower. ) whichever is lower. Hence, overall fanHence, overall fan--out = 20out = 20

Page 33: Logic Families

33

Gate Drive Capability: FanGate Drive Capability: Fan--OutOutA logic gate can supply a maximum A logic gate can supply a maximum outputoutput currentcurrent

IIOHOH(max(max), in the high state or), in the high state orIIOLOL(max(max), in the low state), in the low state

A logic gate requires a maximum A logic gate requires a maximum inputinput currentcurrentIIIHIH(max(max), in the high state or), in the high state orIIILIL(max(max), in the low state), in the low state

Ratio of output and input current decide how many logic Ratio of output and input current decide how many logic gates can be driven by a logic gategates can be driven by a logic gate

fanfan--out(highout(high) = ) = IIOHOH(max(max) / I) / IIH IH (max)(max)fanfan--out(lowout(low) = ) = IIOLOL(max(max) / ) / IIILIL(max(max))overall fanoverall fan--out = fanout = fan--out(highout(high) or fan) or fan--out(lowout(low) whichever is lower) whichever is lower

A typical figure of fanA typical figure of fan--out is ten (10)out is ten (10)

Page 34: Logic Families

34

WiredWired--ANDANDOpen collector outputs connected together to a common pullOpen collector outputs connected together to a common pull--up resistorup resistorAny collector can pull the signal line lowAny collector can pull the signal line lowLogically an AND gateLogically an AND gate

Page 35: Logic Families

35

TriTri--State LogicState LogicBoth output transistors of totemBoth output transistors of totem--pole output are turned off pole output are turned off Usually used to bus multiple signals on the same wireUsually used to bus multiple signals on the same wireGates not enabled present highGates not enabled present high--Z to bus and therefore do Z to bus and therefore do not interfere with other gates putting signals on the busnot interfere with other gates putting signals on the bus

Page 36: Logic Families

36

TriTri--State LogicState LogicTriTri--state logic includes a switch at the outputstate logic includes a switch at the outputIn the figure below, the three states are illustrated:In the figure below, the three states are illustrated:a)a) Logic High outputLogic High outputb)b) Logic Low outputLogic Low outputc)c) High impedance (HiHigh impedance (Hi--Z) outputZ) output

Page 37: Logic Families

37

Electronic Combinational LogicElectronic Combinational LogicWithin each of these families there is a large variety of differWithin each of these families there is a large variety of different devicesent devices

We can break these into groups based on the number gates per devWe can break these into groups based on the number gates per deviceice

AcronymAcronym DescriptionDescription No GatesNo Gates ExampleExampleSSISSI SmallSmall--scale integrationscale integration <12<12 4 NAND gates4 NAND gatesMSIMSI MediumMedium--scale integrationscale integration 12 12 –– 100100 AdderAdderLSILSI LargeLarge--scale integrationscale integration 100 100 –– 10001000 68006800VLSIVLSI Very largeVery large--scale integrationscale integration 1000 1000 –– 1M1M 6800068000ULSIULSI Ultra large scale integrationUltra large scale integration > 1M> 1M 80486/8058680486/80586

Page 38: Logic Families

38

SSI DevicesSSI Devices

Each package contains a code identifying the packageEach package contains a code identifying the package

N74LS00

Manufacturers Code

N = National SemiconductorsSN = Signetics

Specification

FamilyLLSH

Member00 = Quad 2 input NAND02 = Quad 2 input Nor04 = Hex Invertors20 = Dual 4 Input NAND

Page 39: Logic Families

39

7400 Series History7400 Series History

1960s space program drove 1960s space program drove development of 7400 seriesdevelopment of 7400 series

Consumed all available devices for Consumed all available devices for internal flight computerinternal flight computer$1000 / device (1960 dollars)$1000 / device (1960 dollars)10:1 integration improvement over 10:1 integration improvement over discrete transistorsdiscrete transistors

1963 Minuteman missile forced 1963 Minuteman missile forced 7400 into mass production7400 into mass production

Drove pricing down to $25 / circuit Drove pricing down to $25 / circuit (1963 dollars)(1963 dollars)

Page 40: Logic Families

40

7400 Series Evolution7400 Series EvolutionBJT storage time reduction by using a BC Schottky diode.Schottky diode has a Vfw=0.25V. When BC junction becomes forward biased Schottky diode will bypass base current.

B

C

Page 41: Logic Families

41

Too Much of a Good Thing?Too Much of a Good Thing?FamiliesFamiliesPackagesPackagesReliability optionsReliability optionsSpeed gradesSpeed gradesFeaturesFeaturesFunctionsFunctions

An availability nightmare! >> 500K unique devices

Page 42: Logic Families

42

Different Families DonDifferent Families Don’’t all Speak t all Speak the Same Languagethe Same Language

Page 43: Logic Families

43

Sometimes Things Get Lost or Sometimes Things Get Lost or Added in the Translation*Added in the Translation*

Different families aren’t always on speaking terms with one another

Page 44: Logic Families

44

The World of TTLThe World of TTL

Page 45: Logic Families

45

Success Drives ProliferationSuccess Drives Proliferation

19602003

New families introduced based on New families introduced based on Higher performanceHigher performanceLower powerLower powerNew featuresNew featuresNew signaling thresholdNew signaling threshold

Spawned over 32 unique families!Spawned over 32 unique families!

Page 46: Logic Families

46

Success Drives ProliferationSuccess Drives ProliferationProducts introduced in the 1960 Products introduced in the 1960 are near the end of their life are near the end of their life cyclecycle

Decreasing supplier baseDecreasing supplier baseIncreasing pricesIncreasing pricesNot recommended for new Not recommended for new designsdesigns

Products considered to be Products considered to be ““maturemature”” are about 2 decades are about 2 decades into their life cycleinto their life cycle

HighHigh--volume productionvolume productionMultiple suppliersMultiple suppliersLow pricesLow prices

Newer products are only a few Newer products are only a few years into their life cycleyears into their life cycle

High performanceHigh performanceHigh level of vendor and High level of vendor and supplier supportsupplier supportNewest technologiesNewest technologiesHigher pricesHigher prices

Page 47: Logic Families

47

Characteristics: TTL and MOSCharacteristics: TTL and MOS

TTL stands for TransistorTTL stands for Transistor--Transistor LogicTransistor Logicuses uses BJTsBJTs

MOS stands for Metal Oxide SemiconductorMOS stands for Metal Oxide Semiconductoruses uses FETsFETs

MOS can be classified into three subMOS can be classified into three sub--families:families:PMOS (PPMOS (P--channel)channel)NMOS (NNMOS (N--channel)channel)CMOS (Complementary MOS, most common)

Remember:Remember:

CMOS (Complementary MOS, most common)

Page 48: Logic Families

48

TTL Circuit OperationTTL Circuit Operation

AB Y O/P

+Vcc

Q1

Q2

Q3

Q4

4K 1.6K 130R1 R2

R3

R41K

I CQ1

D3

D1 D2

A B ICQ1 Q1 Q2 Q3 Q4 Y O/P

0 0 + ON OFF OFF ON 1

0 1 + ON OFF OFF ON 1

1 0 + ON OFF OFF ON 1

1 1 - OFF ON ON OFF 0

A standard TTL NAND gate circuit

Table explaining the operation of the TTL NAND gate circuit

Page 49: Logic Families

49

TransistorTransistor--Transistor Logic FamiliesTransistor Logic FamiliesTTransistorransistor--TTransistor ransistor LLogic Families:ogic Families:

74L74L LLow powerow power74H74H HHigh speedigh speed74S74S SSchottkychottky74LS74LS LLow power ow power SSchottkychottky74AS74AS AAdvanced dvanced SSchottkychottky74ALS 74ALS AAdvance dvance LLow power ow power SSchottkychottky

Page 50: Logic Families

50

MOS Circuit OperationMOS Circuit Operation+VDD

O/P

I/P

S

D

D

S

Q

Q

1

2

I / P Q1 Q2 O / P

0 O N O F F 1

1 O F F O N 0

Table explaining the operation of the CMOS inverter circuit

A CMOS inverter circuit

Page 51: Logic Families

51

CMOS Logic FamiliesCMOS Logic Families

CMOS Logic FamiliesCMOS Logic Families4040xx/45xxxx/45xx MetalMetal--gate CMOSgate CMOS74C74C TTLTTL--compatible compatible CCMOSMOS74HC74HC HHigh speed igh speed CCMOSMOS74ACT74ACT AAdvanced dvanced CCMOS MOS --TTTL compatibleTL compatible

Page 52: Logic Families

52

CMOS Family EvolutionCMOS Family Evolution

CMOS Logic Trend: Reduction of dynamic losses (cross-conduction, capacitive charge/discharge cycles) by decreasing supply voltages:

12V→5V →3.3V →2.5V → 1.8V → 1.5V …Reduction of IC power dissipation is the key to:

lower cost (packaging)higher integrationimproved reliability

Page 53: Logic Families

53

Comparison of Logic FamiliesComparison of Logic Families

vi

vo

Page 54: Logic Families

54

Comparison Logic FamiliesComparison Logic Families

Page 55: Logic Families

55

Comparison of Logic FamiliesComparison of Logic Families

speed power product = a constant