[ieee 2012 ieee 12th international conference on nanotechnology (ieee-nano) - birmingham, united...
Post on 26-Feb-2017
212 Views
Preview:
TRANSCRIPT
2012 12th IEEE International Conference on Nanotechnology (IEEE-NANO)
The International Conference Centre Birmingham
20-23 August 20112, Birmingham, United Kingdom
Conductive AFM of transfer printed nano devices
Benedikt Weiler\ Mario BareiB\ Daniel Kalblein2, Ute Zschieschang2, Hagen Klauk2, Giuseppe Scarpal, Bernhard Fabd, Wolfgang Porod3, and Paolo Lugli'
IInstitute for Nanoelectronics, Technische Universitat Miinchen, TheresienstraJ3e 90, 80333 Miinchen, Germany 2Max Planck Institute for Solid State Research, Heisenbergstr. 1, 70569 Stuttgart, Germany
3Center for Nano Science and Technology, University of Notre Dame, 275 Fitzpatrick, IN 46556 USA
Abstract - Nano diodes show great potential for
applications in detectors, communications and energy
harvesting. However, to make them suitable for low-cost mass
production, these nano devices have to be fabricated reliably
over large areas while minimizing process time and costs.
Printing techniques are promising candidates to overcome
these economical drawbacks of conventional nanolithography
without a significant loss in structure quality. In this work, we
focus on nano transfer printing (nTP) to fabricate nm-scale
diodes over extensive areas. Using a temperature-enhanced
process, several millions of diodes were transfer-printed in one
single step. We show the reliable transfer of functioning
Schottky and MIM diodes of different sizes, which
demonstrates the versatility and usability of our approach
(nTP), paving the way to numerous applications in the fields of
e.g. infrared detection or energy harvesting. The nano devices
are characterized electrically by conductive Atomic Force
Microscopy (c-AFM) measurements. For these MIM
structures, quantum-mechanical tunneling was determined to
be the main conduction mechanism across the metal-ox ide
metal junction.
Index Terms - nano transfer printing; ordered nanostructures; conductive AFM; metal-oxide-metal diodes
I. INTRODUCTION
Nano diodes are important devices for various electronic and optoelectronic applications, such as rectifiers for energy
harvesting [1, 2] or infrared detection [3], field-emission cathodes [4], and switching memories [5] . Key challenges
for large-scale manufacturing include increasing fabrication reliability and optimizing throughput, while minimizing process cost. Printing techniques play a crucial role in
efficient nanofabrication since they pave the way to large area patterning, while keeping overall process time shorter and costs lower than any other traditional nanolithography
technique. In this work, we concentrate on nano transfer printing (nTP) as a scalable, purely mechanical, fabrication technique to manufacture semiconductor devices suitable for various
applications [6] . More specifically, we improved
conventional protocols for nTP by a temperature-enhanced
process step to transfer highly-ordered large-scale arrays of
Au and metal-oxide-metal nanostructures on flat substrates, such as p-type Si and Si02 [7] . The device structures show
high quality and fidelity and protruding feature sizes below 100 nm over extensive substrate areas. Scanning electron
microscope (SEM) images showed that the transferred devices were structurally intact after transfer-printing, and the transfer yield was found to be ahnost 90% (defmed as
a) b)
Fig. I (a) SEM image of the nanostructures on the stamp as manufactured taken under a horizontally tilted angle. The height of the pillars is equal all over the stamp and amount to 80 nm. (b) Top view of the pillars showing their lateral dimensions of 50 nm diameter at a distance of 100 nm.
the amount of properly transferred structures divided by the overall amount of structures on the stamp prior transferring).
Moreover, we demonstrated that the transferred structures
were functional diodes using electrical characterization by c
AFM measurements.
II. F ABRICA TION
The stamps consisted of flat Si wafers that were structured on the nm-scale to circular pillars in an e-beam lithography
process followed by a dry etching process performed by IMS
CHIPS, Stuttgart, Germany. The structured wafers are cut to the fmal stamp size of 1 cm x 1 cm. Before the transfer experiments, their surface morphology was checked in the
SEM. All the investigated pillars showed an equal height of
80 urn . In accordance with the feature sizes specified by the
manufacturer, the stamps comprised variously-sized pillars.
In our experiments diameters of 50 urn with a spacirlg of
100 urn between each pillar (referred to as 50 urn x 100 urn
in the following), pillars of 75 nm diameter at 75 urn spacing
and 100 nm diameter at 100 urn spacing were used. The transfer experiments were performed under clean room
conditions. A self-assembled-monolayer (SAM) was applied
on the surface of the stamp prior to metal evaporation as
depicted in Fig. 2. This anti-sticking SAM increases the hydrophobicity of the surface of the stamps and promotes
the delamination of the evaporated metal from the stamp to the substrate. The subsequent evaporation of stacks of different metal layers was accomplished usirlg either thermal
evaporation or e-beam evaporation. The pressures in the evaporation chambers were in the range of 10-6 mbar for the
thermal and 10-7 mbar for the e-beam evaporation in order to
ensure a high purity of the metal films. Basically two kinds
of stacks were evaporated onto structured stamps:
Stamp
. - . --SAM /'
Hydrophobic !
Stamp
.. - .. --
Plasma � � treatment
-....,
First layer: Au Last layer: Ti
Stamp
. - .
t t Fig. 2 Nanotransfer printing process: At first the stamp is covered by a hydrophobic self-assembled monolayer followed by the evaporation of the metal stack, in this case first an Au and then a Ti layer. Afterwards the surface of the stamp and the substrate is treated by an oxygen plasma to increase the hydrophobicity of the surfaces of stamp and substrate. This promotes the delamination of the metal stack from the stamp to the substrate in the final transfer step.
1. A 20 nm thick Au layer followed by a 4 nm Ti layer
which forms after the transfer process together with the Si substrate Au/Si-Schottky diodes and hence is referred to as
"gold diodes" later on;
2. A 20 nm thick layer of Au or AuPd was evaporated onto a stamp which served as a delamination layer since Au and
AuPd provide weak adhesion to the surface of the stamp. After this delamination layer, a 20 nm thick layer of Al was
deposited which represents the ftfst metal electrode of a MIM diode. After exposing the stamp to clean room
conditions, a 3.6 nm thick AIOx layer was grown on the Al in a plasma-induced process. In a second metal deposition process, the second metal electrode, namely Au or AuPd,
was thermally evaporated on the stamp. The two electrodes
comprising a thin AIOx dielectric in between represent a
MIM structure. In both cases a 4 nm thick Ti layer was evaporated as the last layer on the metal stacks on the stamp to promote good
adhesion of the metal stack from the stamp onto the target surface of the substrate. This thin Ti film is not a completely
closed film but shows an island-like structure thus an
influence of this adhesion layer onto subsequent electrical characterization (Section V) is not expected. Before
transferring, the hydrophilicity of both the metal stack on the stamp and the surface of the Si/Si02 substrate were
enhanced by a brief oxygen plasma treatment. The 0- ions
break chemical bonds on the oxygen saturated surface thus producing reactive OH-groups on the stamp and on the substrate. Two OH-groups on the stamp and on the substrate are supposed to form a covalently binding O-bridge between
the metal stack on the stamp and the substrate accompanied
by H20 evolution when brought into contact during the
transfer step [7] . In the subsequent transfer step, stamp and substrate were placed on top of each other in the pressure chamber of a NIL 2.5 Nanoimprinter (Obducat) and covered
with aluminum foils. This pressure chamber is gas-tight, heatable and coolable and allows pumping of nitrogen
against the foil/stamp/substrate sandwich stack. Besides
pressure, one can control and monitor temperature, and the
time of the single imprint steps by a PC. First a pressure of 30 bar was applied by the Nanoimprinter for I min. Then a temperature of 200°C was applied while the pressure was
kept constant at 30 bar for 4 min. At the end of the process the hot stamp-substrate stack is taken out of the
Nanoimprinter and the demolding step (the separation
between the stamp and the substrate) is performed before the
substrate has cooled down. Due to the hydrophilicity of the two plasma-activated surfaces the stamp and the substrate
usually stick together. Hence the stamp has to be separated vertically by from the substrate by carefully moving the
stamp and the substrate with respect to each other (Figure 2).
Since the temperature is raised during the transfer step this process is called temperature-enhanced nanotransfer printing. It is assumed that the increase in temperature during the process removes the H20 evolving during the
imprint step and this way supports the formation of 0-
bridges. This hard-to-hard single-step transfer printing technique can
be applied to any kind of stamp structure or evaporated metal stack demonstrating the large versatility of our
approach. Besides it is very fast and cost-efficient, does not need any organic adhesion promoters or flexible buffer
layers. Also chemical post-processing is not necessary and
most importantly the master template is preserved and available for further transfers after cleaning properly.
III. MORPHOLOGICAL CHARACTERIZATION OF TRANSFERRED
NANO DIODES AND GOLD PILLARS
The previously described fabrication process repetitively provided the transfer of more than 90% of the elevated pillar
structures on the stamp as determined by scanning electron
microscopy (SEM) investigations depicted in Figure 3. The
image shows the result of a transfer process of Au pillars
transferred by nTP on Si02/Si from a stamp with 75 nm
pillars at 75 nm spacing. The yield was determined by dividing the overall area of transferred nanopillars (defined
as structured area subtracted by the overall defective area)
by the structured area on the stamp. The defective area is
calculated as the sum of the black squares which mark defect
o
[]
o o o
a) b)
Fig. 3 (a) Overall amount of Au nanopillars on the substrate transferred from the structured area on the stamp (specifications: 75 nm x 75 nm). The structured area had a size of -300 11m x 300 11m. (b) The same image with defect sites marked by black squares. An estimation of the yield (area of nanopillars transferred to the substrate divided by structured area on the stamp) amounts to more than 90%.
sites. This investigation shows that the structures were successfully transferred approximately over the entire
structured area of 300 11m x 300 11m (Figure 3). By further morphological investigations of the transferred
nanopillars it could be seen that an almost identical copy of
the nanostructures on the master template was created. SEM images of the 75 nm diameter, 75 nm spacing stamp at very
high resolutions (Figure 4.a)) show that the only
recognizable difference is a morphological enlargement of the diameter of the pillars accompanied by a reduction of
their spacing. This observation is attributed to a conic growth of the deposited metal layers during their
evaporation on the stamps. Looking at a single pillar during
the evaporation of a specific layer sequence, new deposited metal atoms assemble also at the edge of the plateau of the pillars. Thus the diameter of the pillars should increase
laterally with each evaporated atomic layer by an estimated ratio of lateral to vertical growth speed of 1: 1 to 1 :2. This is
in good accordance with the results depicted in Figure 4.a). As the high resolution image shows, the transferred pillars have a diameter of about 90±5 nm at a distance of 65±5 nm.
Considering the evaporated metal thickness of 24±2 nm this
is in good accordance with the expectations.
a) b)
c)
Fig. 4 Morphological characterization of the transferred Au nanopillars (stamp specifications: 75 nm x 75 nm): a) Highest resolution, pillar
diameter was determined to be -90±5 nm at -65±5 nm spacing. This is in accordance with the stamp specifications, if measurement uncertainties and the conic growth of the pillars during evaporation are considered (see text). Despite of their lateral morphing quality and fidelity of the pillars is exactly the same as on the stamp. b) Intermediate resolution: The transferred gold diodes are highly regular like the master structure on the stamp. c) Low resolution: The resolution was set to the lowest reasonable value to check the nanopillars regularity and quality on large scales. Generally, there are only very few defect sites detectable.
(a)
· --•• a" •• -. •••••
... .. .. ....
... e •• •• •••
.... - .. .... � ••••
e .. &.� ·
............ -,. &a ••••••• 1:-·· • .... e .. . . . . .. . .
. . . . . . . . ...., . . . ••••• • • • ••• . . . . _ A .· ·�
.... &. ............. ' - - ... . .... . . '
.300nml • ••• � ••• •
· . . ... . . --- ... -- - �
(b)
Fig. 6 (a) C-AFM of gold diodes (75 nm x 75 nm stamp) in contact mode taken by current measurements; (b) AFM measurements of gold diodes in contact mode taken by atomic force/deflection measurements. A defect rich area was chosen on the substrate to prove that only sites with gold diodes are electrically conductive (see text).
Fig. 7: Schematic of a c-AFM setup. The positive potential is applied to the Ti/Pt coated diamond tip which is in direct contact to the sample.
These investigations also show that our recent limit in the
fabrication of nanodiodes is at 70 nm as demonstrated in
Figure 4.a). For all stamp geometries used in our experiments, i.e.
50 nm x 100 nm, 75 nm x 75 nm and 100 nm x 100 nm, no asymmetric deformation of the pillars could be found. This
is true on typical resolutions of a few nm up to several 11m
(compare image sequence in Figure 4. a)-c)). This sequence also shows that, after transfer, the nanopillars regularity and
quality is almost perfectly preserved as fabricated on the template without any remarkable deterioration in fidelity. Even very small features were replicated faithfully. This
property of nTP, together with the low defect generation
(Figure 4.c)), makes this approach attractive for various
applications and demonstrates the large versatility of our
approach.
Also AFM images and c-AFM (sections IV and V) were taken of the transferred gold and MIM structures. The shape
of the pillars is identical before and after the transfer process which proves once more the reliability (Figure 6).
IV. ELECTRICAL CHARACTERIZATION OF N ANODIODES
The IV characteristic of the MIM device comprising the
oxide layer fabricated by the oxygen plasma was measured by conductive MFP-3D atomic force microscopy (Asylum
Research, California). The sample was clamped via the conductive substrate to an electrode, which was also
connected to the cantilever holder in the head. In this way, a closed electrical circuit was built (see Figure 7). The Si tips
of the conductive AFM setup were coated with a layer of
Ti/Pt (5/20) in order to provide physical strength and a low
106 .. •
........ 104 e • N
E 102
.. � U
� 10° � \ '(ij 10-2 .. nanoscal c Q)
10-4 '0 e diodes -c
10-6 Q) .... • microscale .... ::J 10-8
() • • diodes
10-10 0 2 4 6 8 10
Voltage (V)
Fig. 8: I-V-characteristics of previously transfer-printed microscale and nanoscale MIM diodes [6].
resistivity. In AC tapping mode, the topography of the sample was measured. Then, after a target structure, namely
a MIM diode, was identified, the AFM cantilever tip was brought into direct contact with the surface. After dithering the tip on the MIM top surface, it was held motionless as an
electrical bias was applied through a cyclic, triangle wave
pattern, to the sample through the gold electrodes on the
sample mount while the current was simultaneously measured at the tip. The resulting I-V -characteristic is shown
in Figure�. For identifying an asymmetric behavior around o V, both polarities are plotted on the positive axis. In the
voltage range between 0 V and 5 V, the slope for previously
fabricated MIM diodes comprising a micro scale area is
shown. In the range from 5 V to lO V, the slope for the nano
scale diodes is shown. Since they match perfectly, the reliability of this fabrication method is proven. Further, the
regime when direct tunneling and Fowler-Nordheim
tunneling occurs can be determined, as well as, static device
parameters can be extracted [6] .
V. ELECTRICAL CHARACTERIZATION OF TRANSFERRED GOLD
PILLARS
The Au nanopillars were characterized electrically by another conductive AFM device (Asylum Research,
California). In principle the setup and electrical circuit was the same as described in section IV. The diamond tips were
also coated with Ti/Pt (5/20). The topography of the samples was measured in AC tapping mode again. First the pillars
were imaged by the deflection of the tip due to the atomic forces between tip and sample surface in contact mode
(Figure 6.b)). Then the same region of the sample was imaged by measuring the current driven through the circuit, the tip and the gold pillars on the sample due to a voltage applied to the tip. In order to test the reliability of the
imaging method a defect rich region of the sample was chosen. Generally speaking, all Au nanopillars could be
imaged reliably in current mode whereas defect sites turned out to be not conductive at all. Though some pillars conduct better than others, this way the electrical functionality of the
Au pillars forming a Schottky junction with the underlying
Si substrate could be proven. This observation allows for
their further usage as nanojunctions in semiconductor devices (Figure 6).
VI. SUMMARY AND CONCLUSION
We could show that the fabrication of quantum devices
using the process method described here can be done over large areas. Morphological and electrical investigations
could prove the high fabrication yield when producing
millions of nanodevices and the high quality of individual diodes. We want to point out here, that nanotransfer-printing
is not only a suitable fabrication method for MIM diodes or
Schottky junctions but also more complex structures can be
manufactured.
The main advantage of the process described here with respect to e-beam evaporation is the reusability of the stamps after an acid treatment which is supposed to etch away the
relieved metal rests in the spacing between positive structure
features. This will save much process costs as the acid treatment is not only faster but also cheaper than the repetitive stamp fabrication by e-beam lithography.
In our future work, we will also focus on further reduction in size of the transferred diodes, and the implementation of the diodes into devices, such as antennas.
ACKNOWLEDGMENT
The authors acknowledge financial support from the German Research Funding (DFG), the International
Graduate School of Science and Engineering (IGSSE) and
the Institute for Advanced Studies (lAS), Focus group "Nanoimprint and Nanotransfer" and the German Excellence
Cluster 'Nanosystems Initiative Munich' (NIM). The authors
thank Dr. Edward M. Nelson and Prof. Gregory Timp for technical support concerning c-AFM measurements.
[1]
[2]
[3]
[4]
[5]
REFERENCES
L. Novotny and N. van Hulst, "Antennas for light,"
Nature Photon., vol. 5, pp. 83-90,2011. S. Grover and G. Moddel, "Engineering the
current-voltage characteristics of metal-insulator
metal diodes using double-insulator tunnel
barriers," Solid-State Electron., vol. 67, pp. 94-99, 2012.
J. A. G6mez-Pedrero, J. Ginn, J. Aida, and G.
Boreman, "Modulation transfer function for
infrared reflectarrays," Appl. Opt., vol. 50, pp. 5344-5350, 2011. L. Hongzhong, C. Bangdao, L. Xin, L. Weihua, D.
Yucheng, and L. Bingheng, "A
metal/insulator/metal field-emission cannon," Nanotechnol., vol. 22, p. 455302, 2011.
R. Waser and M. Aono, "Nanoionics-based
resistive switching memories," Nature Mater., vol.
6,pp. 833-840,2007.
[6] M. Bareill, F. Ante, D. Kalblein, G. Jegert, C. Jirauschek, G. Scarpa, B. Fabel, E. M. Nelson, G. Timp, U. Zschieschang, H. Klauk, W. Porod, and P.
Lugli, "High-Yield Transfer Printing of Metal
Insulator-Metal Nanodiodes," ACS Nana, vol. 6, pp. 2853-2859, 2012/03/27 2012.
[7] M. Bareill, M. A. Imtaar, B. Fabel, G. Scarpa, and
P. Lugli, "Temperature Enhanced Large Area Nano
Transfer Printing on Si/Si02 Substrates Using Si
Wafer Stamps," J. Adhes., vol. 87, pp. 893-901, 2011.
978-1-4673-2200-3/12/$31.00 ©2012 IEEE
top related