1©These slides may be freely used, distributed, and incorporated into other works.

Addressing Modes

For speed… we want fixed-size instructions, and they

should be small.Fixed-size, so that 2 update PCis the one step PC PC + single constant valueSmall size, so that 1 fetch instructioncan be done in a single memory access.

2©These slides may be freely used, distributed, and incorporated into other works.

A fixed-size of 32 bits is acceptable.

add $4, $10, $21

add 4 10 21

6 5 5 5

21 (<32)

3©These slides may be freely used, distributed, and incorporated into other works.

What aboutlw $16, X ?

lw 16 X6 5 32

43 (not <32)

In fact, any instruction with an address is not < 32 bits.

4©These slides may be freely used, distributed, and incorporated into other works.

The use of addressing modes offer ways of answering the question: Where is the operand?

If there is no choice of addressing mode, no bits of machine code identify addressing mode.

With choice, extra bits are needed.

MIPS: no choice!

5©These slides may be freely used, distributed, and incorporated into other works.

If machine code not fixed size, place address in instruction.

An invented example, like the MIPS code: lw $16, X

lw 16 X

6 5 effective address

32

Called direct addressing mode

6©These slides may be freely used, distributed, and incorporated into other works.

6

put address in a register

lw $16, ($8)

Address of variable

effectiveaddress lw 16 8

6 5 5

16 Bits

Called

register direct

(<32)

7©These slides may be freely used, distributed, and incorporated into other works.

7

Add the contents of 2 registers to form an address

effectiveaddress

Not on MIPS!(invented for an example)

lw $16, ($8)($9)

lw 16 8 9 6 5 5 5

21 Bits(<32)

8©These slides may be freely used, distributed, and incorporated into other works.

8

Use those extra 16 bits for a constant…

lw $16, 24($8)

24 +

Valuein $8

addresseffective

lw 16 8 24 6 5 5 16

32 bits

The only addressing mode on the MIPS for load/store!

Called

base displacement

9©These slides may be freely used, distributed, and incorporated into other works.

9

If operand is in a register, effective address does not make sense, but called

register addressing mode

So, for the MIPS instruction

add $12, $13, $8

ALL 3 operands imply a register addressing

mode

10 ©These slides may be freely used, distributed, and incorporated into other works.10

If an operand is in the instruction, called

immediate mode

addi $8, $9, -1

addi 8 9 -1 6 5 5

16 Bits

effective address is the instruction’s

address !

11 ©These slides may be freely used, distributed, and incorporated into other works.

Use any “extra” bits within the instruction for a constant.

Use constant as an offset:

offset + PC effective address

11

12 ©These slides may be freely used, distributed, and incorporated into other works.12

beq $11, $14, somewhere

somewhere: # another instruction here

beq 11 14 offset

6 5 5 16

offset ≈ somewhere – beq’s address called PC Relative

13 ©These slides may be freely used, distributed, and incorporated into other works.

Use any “extra” bits in the instruction to hold part of an address...

on MIPS:j somewhere

somewhere: # instruction here

13

14 ©These slides may be freely used, distributed, and incorporated into other works.

j part of addr

6 32-6 = 26 bits

32address somewhere

26 bits

goes in instruction

other MSBs come from PC!14

15 ©These slides may be freely used, distributed, and incorporated into other works.15

memory

****

////////

wonderful addressing mode that is not offered(!) any more...

register indirectnot on MIPS! Invented for an example:

lw $8, (($9))

////////$8

****$9@@@@@

@@@@@

16 ©These slides may be freely used, distributed, and incorporated into other works.

RISCReduced Instruction Set Computer

small instruction set machine code is a fixed size (and small) no choice of addressing modes

(in the machine code) simple instructions

16

17 ©These slides may be freely used, distributed, and incorporated into other works.

CISCComplex Instruction Set Computer

often, huge instruction set(up to 256 unique instructions!)

machine code varies from one instruction to another in terms of size(example: x86 1 to 17 bytes!)

often lots of addressing mode choice(each operand's addressing mode is specified independent of the others!)

17

18 ©These slides may be freely used, distributed, and incorporated into other works.

CISC addressing modes example VAX add 13,(R4),R3

immediate registerregister direct

13 + value from memory R3

machine code:add 1 byte op code

1 byte (immediate)

8 bytes 32-bit 2’s comp

1 byte (reg direct, R4)

1 byte (reg, R3)18