06 addressing modes
TRANSCRIPT
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AddressingModes
Gray YILMAZ
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Outlines
Five addressing modes of 8051 Code instructions using each addressing mode Access RAM using various addressing modes SFR addresses (Special Function Register) Access SFR Operate stack using direct addressing mode Code instructions to operate look-up table
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Five Addressing Modes
Immediate Register Direct
Register indirect Indexed
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Immediate Addressing
Mode
MOV A,#25H ;load 25H into A
MOV R4,#62 ;load the decimal value 62 into R4
MOV B,#40H ;load 40H into B
MOV DPTR,#4521H ;DPTR=4521HMOV DPTR,#2550H ;is the same as:
MOV DPL,#50H
MOV DPH,#25H
The source operand is a constant The immediate data must be preceded by the
pound sign, #
Can load information into any registers, including16-bit DPTR register
DPTR can also be accessed as two 8-bit registers,the high byte DPH and low byte DPL
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Immediate Addressing
Mode We can use EQU directive to access immediate
data
MOV DPTR, #68975 ;illegal!! value > 65535 (FFFFH)
COUNT EQU 30
MOV R4, #COUNT ;R4=1E (30=1EH)
MOV DPTR, #MYDATA ;DPTR=200H
ORG 200HMYDATA: DB Turkiye
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Immediate Addressing
Mode We can also use immediate addressing modeto send data to 8051 ports
MOV A, #A ; the ASCII code of A isloaded into ACC
MOV P1, #55H
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Register Addressing Mode
Use registers to hold the data to bemanipulated
MOV A, R0 ;copy the contents of R0 into A
MOV R2, A ;copy the contents of A into R2ADD A, R5 ;add the contents of R5 to contents of A
ADD A, R7 ;add the contents of R7 to contents of A
MOV R6, A ;save accumulator in R6
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Register Addressing Mode
The source and destination registers mustmatch in size MOV DPTR, A ; will give an error !
The movement of data between registersis
not allowed MOV R4, R7 ; is invalid !
MOV DPTR, #25F5HMOV R7, DPLMOV R6, DPH
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Direct addressing mode
used to access RAM Review: RAM (128 bytes.
Address 00H 7FH)
00H 1FH (32 bytes, registerbanks and stack)
20H 2FH (16 bytes, bitaddressable space, will bediscussed later)
30H 7FH (80 bytes, scratchpad, temporary store data)
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Direct Addressing Mode
direct addressing mode is often used toaccess RAM locations30 7FH The entire 128 bytes of RAM can be accessed The register bank locations are accessed by the
register names
RAM addresses 00 to 7FH
MOV A, 4 ;is same asMOV A, R4 ;which means copy R4 into A
MOV A, 7 ;is same as
MOV A, R7 ;which means copy R7 into A
Direct addressing mode
Register addressing mode
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Direct Addressing Mode
Contrast this with immediate addressing mode There is no # sign in the operand
MOV R0, 40H ;save content of RAM location 40H in R0
MOV 56H, A ;save content of A in RAM location 56H
MOV R4, 7FH ;move contents of RAM location 7FH to R4
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Example
MOV 40H, #0F3H ; (40H) = F3H MOV A, 40H ; (A) = (40H) = F3H MOV 35H, A ; (35H) = (A) = F3H
MOV 56H, 35H ; (56H) = (35H) = F3H MOV #23H, 35H ; illegal
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SFR Registers & TheirAddresses
MOV 0E0H, #55H ;is the same asMOV A, #55H ;which means load 55H into A (A=55H)
MOV 0F0H, #25H ;is the same as
MOV B, #25H ;which means load 25H into B (B=25H)
MOV 0E0H, R2 ;is the same asMOV A, R2 ;which means copy R2 into A
MOV 0F0H, R0 ;is the same as
MOV B, R0 ;which means copy R0 into B
The SFR(Special Function Register) can be accessedby their names or by their addresses
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SFR Registers & TheirAddresses
The SFR registers have addresses between80H and FFH Not all the address space of 80 to FF is used by
SFR The unused locations 80H to FFH are reserved
and must not be used by the 8051 programmer
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Special Function Register (SFR)Addresses
* Bit-addressable
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Special Function Register (SFR)Addresses
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Example 5-1
Write code to send 55H to ports P1 and P2, using(a) their names (b) their addresses
(a) MOV A, #55H ;A=55H
MOV P1, A ;P1=55HMOV P2, A ;P2=55H
(b) From Table 5-1, P1 address=80H; P2 address=A0H
MOV A, #55H ;A=55H
MOV 90H, A ;P1=55HMOV 0A0H, A ;P2=55H
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Using Stack
Only direct addressing modeis allowed forpushing or popping the stack PUSH A is invalid Pushing the accumulator onto the stack must be
coded as PUSH 0E0H
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Example 5-2
Show the code to push R5 and ACC onto the stackand then pop them back them into R2 and B, whereB = ACC and R2 = R5
Solution:
PUSH 05 ;push R5 onto stackPUSH 0E0H ;push register A onto stackPOP 0F0H ;pop top of stack into B
;now register B = register APOP 02 ;pop top of stack into R2
;now R2=R5
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Register IndirectAddressing Mode
A register is used as a pointerto the data Only registerR0 and R1 are used for this purpose R2 R7 cannot be used to hold the address of an
operand located in RAM
When R0 and R1 hold the addresses of RAMlocations, they must be preceded by the @ sign
MOV A, @R0 ;move contents of RAM whose;address is held by R0 into A
MOV @R1, B ;move contents of B into RAM;whose address is held by R1
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Example 5-3
Write a program to copy the value 55H intoRAM memory locations 40H to 41H using
(a) direct addressing mode,
(b) register indirect addressing mode withouta loop,
(c) with a loop
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Solution(a) MOV A, #55H ;load A with value 55H
MOV 40H, A ;copy A to RAM location 40HMOV 41H, A ;copy A to RAM location 41H
(b) MOV A, #55H ;load A with value 55HMOV R0, #40H ;load the pointer. R0=40H
MOV @R0, A ;copy A to RAM R0 points toINC R0 ;increment pointer. Now R0=41hMOV @R0, A ;copy A to RAM R0 points to
(c) MOV A, #55H ;A=55HMOV R0, #40H ;load pointer.R0=40H,MOV R2, #02 ;load counter, R2=3
AGAIN: MOV @R0, A ;copy 55 to RAM R0 points toINC R0 ;increment R0 pointerDJNZ R2, AGAIN ;loop until counter = zero
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Register IndirectAddressing Mode
The advantage is that it makes accessingdata dynamic rather than static as in directaddressing mode Looping is not possible in direct addressing mode
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Example 5-4
Write a program to clear 16 byte RAMlocations starting at RAM address 60H
Solution:
CLR A ;A=0MOV R1, #60H ;load pointer. R1=60HMOV R7, #16 ;load counter, R7=16
AGAIN: MOV @R1, A ;clear RAM R1 points to
INC R1 ;increment R1 pointerDJNZ R7, AGAIN ;loop until counter=zero
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Example 5-5
Write a program to copy a block of 10 bytesof data from 35H to 60H
Solution:
MOV R0, #35H ;source pointerMOV R1, #60H ;destination pointerMOV R3, #10 ;counter
BACK: MOV A, @R0 ;get a byte from sourceMOV @R1, A ;copy it to destinationINC R0 ;increment source pointer
INC R1 ;increment destination pointerDJNZ R3, BACK ;keep doing for ten bytes
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Register IndirectAddressing Mode
R0 and R1 are the only registers that can beused for pointers in register indirectaddressing mode Since R0 and R1 are 8 bits wide, their use is
limited to access any information in the internalRAM
Whether accessing externally connected RAM oron-chip ROM, we need 16-bit pointer In such case, the DPTR register is used
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Indexed Addressing Modeand On-chip ROM Access Indexed addressing mode is widely used in
accessing data elements of look-up table entrieslocated in the program ROM
The instruction used for this purpose isMOVC A, @A + DPTR Use instruction MOVC, C means code The contents of A are added to the 16-bit register DPTR to
form the 16-bit address of the needed data MOVC: move the data stored in ROM, Recall; MOV can only move data in RAM
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MOVC
It has only two possible instructions MOVC A, @A+DPTR MOVC A, @A+PC
Any other usage MOVC is not allowed, e.g MOVC A, @DPTR ; invalid MOVC A, @R0+DPTR ; invalid MOVC A, #23H ; invalid
Data cannot be moved directly from ROM toRAM, or vice versa MUST USE A as an intermediate register
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Example 5-6
In this program, assume that the word USAis burned into ROM locations starting at200H. And that the program is burned intoROM locations starting at 0. Analyze how the
program works and state where USA isstored after this program is run.
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ORG 0000H ;burn into ROM starting at 0MOV DPTR, #200H ;DPTR=200H look-up table addr
CLR A ;clear A (A=0)MOVC A, @A+DPTR ;get the char from code spaceMOV R0, A ;save it in R0INC DPTR ;DPTR=201 point to next charCLR A ;clear A (A=0)MOVC A, @A+DPTR ;get the next charMOV R1, A ;save it in R1INC DPTR ;DPTR=202 point to next charCLR A ;clear A (A=0)MOVC A, @A+DPTR ;get the next charMOV R2, A ;save it in R2
HERE: SJMP HERE ;stay here;Data is burned into code space starting at 200H
ORG 200HMYDATA: DB USA
END ;end of program
Solution
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Look-up Table
The look-up table allows access to elementsof a frequently used table with minimumoperations
Example 5-8
Write a program to get the x value from P1and send x2 to P2, continuously (assume0
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Solution
ORG 0
MOV DPTR, #300H ;LOAD TABLE ADDRESSMOV A, #0FFH ;A=FFMOV P1, A ;CONFIGURE P1 INPUT PORT
BACK: MOV A, P1 ;GET XMOVC A, @A+DPTR ;GET X SQAURE FROM TABLEMOV P2, A ;ISSUE IT TO P2SJMP BACK ;KEEP DOING ITORG 300H
XSQR_TABLE:DB 0,1,4,9,16,25,36,49,64,81END
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Indexed Addressing Mode andMOVX
In many applications, the size ofprogram codedoesnot leave any room to share the 64K-byte codespace with data The 8051 has another 64K bytes of memory space set
aside exclusively for data storage This data memory space is referred to as external memory
and it is accessed only by the MOVX instruction
The 8051 has a total of 128K bytes of memoryspace 64K bytes of code and 64K bytes of data The data space cannot be shared between code and data
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RAM Locations 30 7FH asScratch Pad
In many applications we use RAM locations30 7FH as scratch pad We use R0 R7 of bank 0 Leave addresses 8 1FH for stack usage If we need more registers, we simply use RAM
locations 30 7FH
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Example 5-10
Write a program to toggle P1 a total of 200times. Use RAM location 32H to hold yourcounter value instead of registers R0 R7
Solution:
MOV P1, #55H ;P1=55HMOV 32H, #200 ;load counter value
;into RAM loc 32HLOOP1: CPL P1 ;toggle P1
ACALL DELAYDJNZ 32H, LOOP1 ;repeat 200 times
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Bit Addresses
Many microprocessors allow program to accessregisters and I/O ports inbyte size only However, in many applications we need to check a single
bit
One unique and powerful feature of the 8051 is
single-bit operation Single-bit instructions allow the programmerto set, clear,
move, and complement individual bits ofa port, memory,or register
It is registers, RAM, and I/O ports that need to be bit-addressable ROM, holding program code for execution, is not bit-
addressable
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Bit-Addressable RAM
The bit-addressable RAM location are20H - 2FH These 16 bytes provide 128 bits of RAM bit-
addressability, since 16 8 = 128 0 to 127 (in decimal) or 00 to 7FH
The first byte of internal RAM location 20H has bitaddress 0 to 7H
The last byte of 2FH has bit address 78H to 7FH
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Bit-Addressable RAM
Internal RAM locations 20-2FH are bothbyte-addressable and bit-addressable
Bit address 00-7FH belong to RAM byte
addresses 20-2FH Bit address 80-F7H belong to SFR P0, P1,
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Bit-AddressableRAM
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Example 5-11
Find out to which by each of the following bitsbelongs. Give the address of the RAM byte inhex
(a) SETB 42H,
(b) CLR 67H,
(c) CLR 0FH
(d) SETB 28H,(e) CLR 12,
(f) SETB 05
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Solution
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Bit-Addressable RAM
To avoid confusion regarding the addresses 00 7FH The 128 bytes of RAM have the byte addresses of 00
7FH can be accessed in byte size using variousaddressing modes
Direct and register-indirect The 16 bytes of RAM locations 20 2FH have bit address
of 00 7FH We can use only the single-bit instructions and these
instructions use only direct addressing mode
How do we tell if an address is bit address or byteaddress? (e.g. 08H)
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Bit-Addressable RAM
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Example
Save the status of bit P1.7 to bit address 05
SETB P1.7MOV C, P1.7
MOV 05, C ; MOV 05, P1.7 is illegal
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I/O Port Bit Addresses While all of the SFR registers are byte
addressable, some of them are also bitaddressable The P0 P3 are bit addressable
We can access either the entire 8 bits or any single
bit of I/O ports P0, P1, P2, and P3 without alteringthe rest When accessing a port in a single-bit manner, we
use the syntax SETB X.Y X is the port number P0, P1, P2, or P3
Y is the desired bit number from 0 to 7 for data bits D0 toD7 ex. SETB P1.5 sets bit 5 of port 1 high
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Single-Bit Addressabilityof Ports
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I/O Port Bit Addresses
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Registers Bit-Addressability Only registers A, B, PSW, IP, IE, ACC, SCON, and TCON
are bit-addressable While all I/O ports are bit-addressable
In PSW register, two bits are set aside for the selection of theregister banks Upon RESET, bank 0 is selected We can select any other banks using the bit-addressability of the
PSW CY AC -- RS1 RS0 OV --
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Example 5-13
Write a program to save the accumulator inR7 of bank 2.
Solution:
CLR PSW.3SETB PSW.4MOV R7, A
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Example 5-14
While there are instructions such as JNC and JC tocheck the carry flag bit (CY), there are no suchinstructions for the overflow flag bit (OV).
How would you write code to check OV?
Solution:JB PSW.2, TARGET ;jump if OV=1
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Example 5-15
Write a program to see if the RAM location 37Hcontains an even value. If so, send it to P2. If not,make it even and then send it to P2.
Solution:MOV A, 37H ;load RAM 37H into ACCJNB A.0, YES ;if D0 of ACC 0? If so jumpINC A ;its odd, make it even
YES: MOV P2, A ;send it to P2
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Example 5-17
The status of bits P1.2 and P1.3 of I/O port P1 mustbe saved before they are changed. Write a programto save the status of P1.2 in bit location 06 and thestatus of P1.3 in bit location 07
Solution:CLR 06 ;clear bit addr. 06CLR 07 ;clear bit addr. 07JNB P1.2, OVER ;check P1.2, if 0 then jumpSETB 06 ;if P1.2=1,set bit 06 to 1
OVER: JNB P1.3,NEXT ;check P1.3, if 0 then jumpSETB 07 ;if P1.3=1,set bit 07 to 1
NEXT: ...
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Using BIT
The BIT directive is a widely used directive to assignthe bit-addressable I/O and RAM locations Allow a program to assign the I/O or RAM bit at the
beginning of the program, making it easier to modify them
Example 5-22A switch is connected to pin P1.7 and an LED to pin P2.0. Write a programto get the status of the switch and send it to the LED.
SW BIT P1.7 ;assign bitLED BIT P2.0 ;assign bit
HERE: MOV C, SW ;get the bit from the portMOV LED, C ;send the bit to the portSJMP HERE ;repeat forever
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Example 5-20
Assume that bit P2.3 is an input and represents thecondition of an oven. If it goes high, it means that theoven is hot. Monitor the bit continuously. Whenever itgoes high, send a high-to-low pulse to port P1.5 to turn
on a buzzer.
OVEN_HOT BIT P2.3BUZZER BIT P1.5
HERE: JNB OVEN_HOT, HERE ;keep monitoringSETB BUZZERACALL DELAYCPL BUZZER ;sound the buzzerACALL DELAYSJMP HERE
di i
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BIT directive
Assign a name to a bit, improve codereadability and code efficiency.
E.g. SW BIT P2.3 LED BIT P0.1
MOV C, SW ; the assembler will replace
;SW with the address of P2.3,
MOV LED, C ; the assembler will replace LED
;with the address of P0.1
EQU di i
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EQU directive
EQU directive can also be used to assignname to bit. The assembler will determine ifits a bit address or byte address based oncontext
E.g. SW EQU 97H MYDATA EQU 0A0H
MOV C, SW ; SW is a bit address
MOV MYDATA, #32H ; MYDATA is a byte address
E l 5 24
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Example 5-24
A switch is connected to pin P1.7. Write a program to checkthe status of the switch and make the following decision.
(a) If SW = 0, send 0 to P2
(b) If SW = 1, send 1 to P2
Solution:SW EQU P1.7MYDATA EQU P2
HERE: MOV C, SWJC OVERMOV MYDATA, #0
SJMP HEREOVER: MOV MYDATA, #1
SJMP HEREEND
SW EQU 97HMYDATA EQU 0A0H
E t 128 b t RAM
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Extra 128-byte RAM
8051 has 128 bytes on-chip RAM (address:00H 7FH)
8052 has 256 bytes on-chip RAM
DS89C4x0 is 8052 compatible it has 256bytes RAM
Add f 256
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Address map for 256bytes RAM
The first 128 bytes: 00H 7FH The extra 128 bytes (upper memory): 80H
FFH Problem: the address range 80H FFH has
already been assigned to SFR (e.g. A, B, PSW,DPTR, P0, P1, P2, P3, etc.)
Upper memory and SFR use the same
address space! Physically they are separate
Add f 256
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Address map for 256bytes RAM
How do we distinguish between uppermemory and SFR? To access SFR, we use direct addressing mode
or register name E.g. MOV 90H, #55H ; equivalent to MOV P1, #55H
To access upper memory, we use indirectaddressing mode E.g. MOV R0, 90H MOV @R0, #55H ;(90H) = 55H
E l 5 27
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Example 5-27
Assume that the on-chip ROM has amessage. Write a program to copy it fromcode space into the upper memory spacestarting at address 80H. Also, as you place a
byte in upper RAM, give a copy to P0.
S l ti
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Solution:ORG 0
MOV DPTR, #MYDATAMOV R1, #80H ;access the upper memory
B1: CLR AMOVC A, @A+DPTR ;copy from code ROMMOV @R1, A ;store in upper memoryMOV P0, A ;give a copy to P0JZ EXIT ;exit if last byteINC DPTR ;increment DPTRINC R1 ;increment R1SJMP B1 ;repeat until last byte
EXIT: SJMP $ ;stay here when finished
;---------------ORG 300H
MYDATA: DB The Promise of World Peace, 0END