68hc11 - addressing modes

ECE 265 – LECTURE 4

The M68HC11 Address Modes

9/29/2010

1ECE265

Joanne E. DeGroat, OSU

Lecture Overview

The M68HC11 Addressing Modes

Special Consideration

Details of the various Addressing modes

(Note: And this is a very simple architecture)

Material from Chapter 2 plus a 68HC11 reference

manual.

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ECE265


Special Considerations

To start, look at the programmers model of the

architecture. What registers are available?

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Special Considerations

To start, look at

the programmers

model of the

architecture.

What registers

are available?

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Special Consideration

Consider that there are Index Register and a Stack Pointer.

This indicates that these register will allow for more than simple load and store data transfers.

Will now examine the modes of data transfer permitted.

The 68HC11 architecture support addressing modes that allow the basis to understand the addressing modes on any architecture.

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Immediate Addressing (IMM)

In immediate addressing the instruction itself contains the data to be loaded into the destination.

Consider the instruction

LDAA #$15 This instruction will load $15 into Accumulator A

In memory it will look like: (op code is $86)

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Some examples from text

Load Immediate

LDAA #10 Loading a decimal value

Loads the binary for 10 into A

LDAA #$1C Loads the hexadecimal value $1C in A

LDAA #@03 Loads the octal value 3 into A

LDAA #%11101100 Loads a binary value

LDAA #’C’ Loads the ASCII code for the letter C

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Extended Addressing Mode (EXT)

This addressing mode introduces the concept of the

effective address of an operand.

The effective address of an operand is the address

in memory of the operand and is usually a

calculated value.

This mode also introduces the use of an instruction

prebyte in the machine code of the 68HC11.

Instructions that require a prebyte take 4 bytes of

memory. Prebytes are either $18, $1A, or $CD

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Example of Extended addressing

Machine code and effect

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Direct Addressing (DIR)

In direct addressing the least significant byte of the 16-bit

address of the operand is in the instruction.

The high order byte is taken to be $00. This is how you

access the 256 bytes of RAM.

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Inherent (INH) addressing mode

In this addressing mode all the information required

for execution is contained in the instruction.

No other operand is required.

Examples:

Increment an Accumulator (either A or B)

Accumulator A+Accumulator B Accumulator A

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Relative Addressing Mode (REL)

Relative addressing is much like it sounds. The

address is relative to something else.

In the case of the 68HC11 relative addressing mode

is used only for branch instructions.

It is a 2 byte instruction with the second byte being

the offset (-128 to +127) to take if the condition is

TRUE.

When the condition is not met, execution continues

with the next instruction.

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BCC example of relative (REL)

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Joanne E. DeGroat, OSU 9/29/2010ECE265

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Indexed Addressing Mode

There are two index address registers, X and Y,

providing two indexed addressing modes, INDX

and INDY.

The value in the indexed register is added to an

offset contained in the instruction to obtain the

effective address of the operand.

This is best seen by an example

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Indexed Mode example

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Lecture summary

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Have covered

The addressing Modes of the 68HC11

What the modes are and how they provide access to

the operand of the instruction

What an effective address is.


Assignment

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Read Chapter 3.1 through 3.6

HW 2 Problems

2.4

2.6

2.19

2.21

68hc11 - addressing modes

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