the central processing unit instruction sets: addressing modes and formats
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The Central Processing Unit
Instruction Sets:Addressing Modesand Formats
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Addressing Modes
The most common addressing techniques:
ImmediateDirect IndirectRegisterRegister IndirectDisplacement (Indexed) Stack
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Immediate Addressing
Operand is part of instructionOperand = address fielde.g. ADD 5
Add 5 to contents of accumulator 5 is operand
No memory reference to fetch dataFastLimited range
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Immediate Addressing Diagram
OperandOpcode
Instruction
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Direct AddressingAddress field contains address of
operandEffective address (EA) = address field (A)e.g. ADD A
Add contents of cell A to accumulator Look in memory at address A for operand
Single memory reference to access data
No additional calculations to work out effective address
Limited address space
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Direct Addressing Diagram
Address A
Instruction
Memory
Operand
Opcode
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Indirect Addressing (1)
Memory cell pointed to by address field contains the address of (pointer to) the operand
EA = (A) Look in A, find address (A) and look there
for operand e.g. ADD (A)
Add contents of cell pointed to by contents of A to accumulator
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Indirect Addressing (2)
Large address space 2n where n = word lengthMay be nested, multilevel, cascaded
e.g. EA = (((A)))Draw the diagram yourself
Multiple memory accesses to find operand
Hence slower
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Indirect Addressing Diagram
Address A
Instruction
Memory
Operand
Pointer to operand
Opcode
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Register Addressing (1)
Operand is held in register named in address filed
EA = RLimited number of registersVery small address field needed
Shorter instructions Faster instruction fetch
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Register Addressing (2)No memory accessVery fast executionVery limited address spaceMultiple registers helps performance
Requires good assembly programming or compiler writing
c.f. Direct addressing
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Register Addressing Diagram
Instruction
Registers
Operand
Register Address ROpcode
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Register Indirect Addressing
C.f. indirect addressingEA = (R)Operand is in memory cell pointed to
by contents of register RLarge address space (2n)One fewer memory access than
indirect addressing
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Register Indirect Addressing Diagram
Register Address R
Instruction
Memory
Operand
Opcode
Pointer to Operand
Registers
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Displacement Addressing
EA = A + (R)Address field hold two values
A = base value R = register that holds displacement or vice versa
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Displacement Addressing Diagram
Register ROpcode
Instruction
Memory
OperandPointer to Operand
Registers
Address A
+
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Relative Addressing
A version of displacement addressingR = Program counter, PCEA = A + (PC)i.e. get operand from A cells from
current location pointed to by PCc.f locality of reference & cache usage
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Base-Register Addressing
A holds displacementR holds pointer to base addressR may be explicit or implicite.g. segment registers in 80x86
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Indexed Addressing
A = baseR = displacementEA = A + RGood for accessing arrays
EA = A + R R++
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Combinations
Postindex (indexing is performed after the indirection)
EA = (A) + (R)
Preindex (indexing is performed before the indirection)
EA = (A+(R))
(Draw the diagrams)
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Stack Addressing
A stack is a linear array of locations. It is sometimes referred to as a
pushdown list or last-in-first-out (LIFO) queue.
A stack is a reserved block of locations.Operand is (implicitly) on top of stacke.g.
ADD Pop top two items from stackand add
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Instruction Formats
Layout of bits in an instructionIncludes opcodeIncludes (implicit or explicit)
operand(s)Usually more than one instruction
format in an instruction set
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Instruction Length
Affected by and affects: Memory size Memory organization Bus structure CPU complexity CPU speed
Trade off between powerful instruction repertoire and saving space
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Allocation of Bits
The following interrelated factors go into determining the use of the addressing bits:
Number of addressing modes (Sometimes an addressing mode can be indicated implicitly. In other cases, the addressing modes must be explicit, and one or more mode bits will be needed.)
Number of operands Register versus memory (With a single user-
visible register (usually called the accumulator), one operand is implicit and consumes no instruction bits. However, single-register programming is awkward and requires many instructions.)
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Allocation of Bits
Number of register sets (Most contemporary machines have one set of general-purpose registers, with typically 32 or more registers in the set.)
Address range (For addresses that reference memory, the range of addresses that can be referenced is related to the number of address bits.)
Address granularity (For addresses that reference memory rather than registers, another factor is the granularity of addressing. In a system with 16- or 32-bit words, an address can reference a word or a byte at the designer’s choice. Byte addressing is convenient for character manipulation but requires, for a fixed-size memory, more address bits.)