single-wafer recycling processes - · pdf filesemiconductor manufacturing international...

WAFER PROCESSING 29

Cost is becoming an increasinglyimportant issue in semiconductorfabrication. This is particularly

true in device manufacturing. It is no longersufficient to merely control costs, rather there areincreasing efforts at actual cost reduction. This hasbecome extremely critical, especially atsemiconductor foundries. A variety of differentproduct lines and razor-edge margins make costefficiencies absolutely paramount. Effective use ofresources and stable processes are part of the keyto enabling cost control and reduction. As a result,these factors have been part of the driving forcebehind the migration away from batch processingto single-wafer processing given the latter’sinherent flexibility and low consumables usage.

Bare (blanket) silicon wafers are thefundamental backbone of semiconductorprocessing. Beyond their use as devicesubstrates, they are used extensivelyfor non-product applications suchas inline monitoring and dailyqualification checks.Furthermore, a large number ofwafers are used for engineeringpurposes as part of processdevelopment. These so-calledshort-loop wafers are typicallyprocessed through some subset ofthe total process flow andrepresent a snapshot of processreliability for particular parts of the

overall flow. They can be used for performance andreliability tests and are then typically recycled foruse in subsequent process development.

SMIC has developed an innovative recycleprocess utilizing single-wafer wet processingtechnology, which provides an attractive and cost-efficient alternative to conventional batch recycleprocesses. The processes produce wafers ofsufficient quality for reuse in backend-of-the line(BEOL) development and process monitoring. Thisarticle presents an overview of the recycle processhighlighting key performance indicators andobserved cost reductions.

Single-Wafer recyclingprocesses

The ability to regenerate and reuse wafers provides a potential cost savingsmechanism for today’s manufacturing fab. In the backend of line (BEOL), inparticular, there is a great opportunity to recycle both monitor and short-loopwafers. Semiconductor Manufacturing International Corporation (SMIC)presents the use in a single-wafer recycling application for the 300-mmprocess line. By Alex Zhang1 Jack Kao1, Tony Pei1 Hao Liu2, Helen Qian2,Leo Archer3

Reference1. SemiconductorManufacturingInternationalCorporation, Fab 4C,Beijing, China2. SEZ China,Shanghai, China3. SEZ AG (USA),Phoenix, Ariz. USA

November 2006 www.euroasiasemiconductor.com

SEZ vFinal 15/11/06 10:18 Page 29

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Not to be reproduced without permission of the publisher EuroAsia Semiconductor

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WAFER PROCESSING30

Single-Wafer Processing Setup The recycle process is performed on an SEZ SpinProcessor 323 configured for 300-mm processing.The tool contains three different chemicalprocessing levels that allow for dispense andrecirculation of three different chemical blendsonto a spinning substrate. The dispensecharacteristics such as dispense profile, wafer-spinspeed, and media temperature can all be tightlycontrolled. The wafer sits upon a patentedBernoulli chuck that allows for selective mediadispense on one side of the wafer while allowingthe other side to be untouched. This is veryimportant as it eliminates many of the mechanismsof defectivity transfer (particles and ionic) that areinherent to batch (bench) systems. In the case of arecycle process, this is very advantageous as itfacilitates reuse of the recycled wafers for moredefect-sensitive applications. In addition to thechemistries, there is a fourth process level fordeionized (DI) water and N2 drying. The rinsewater is enhanced with ozone by means of anexternal ozone generating module. This additionalfeature is a critical part of the SCROD process,which when alternated with DHF enables theremoval of defects from the wafer surface.

The complete BEOL recycle process involves theremoval of the interconnect materials stack andpreparation of the bare silicon surface. In thisrecycling approach, these steps can beaccomplished with the use of two chemical blendsand an enhanced DIO3 rinse. The equipmentconfiguration is highlighted in Figure 1.

The configuration allows for a variety ofpotential processes for different applications thatcan be run on the same piece of equipment withthe same basic setup and chemistries.

ResultsThere is an important distinction made at SMICbetween recycled and reclaimed wafers. Wafersthat can be processed to have sufficiently lowdefectivity and acceptable surface characteristicsare recycled over and over. Once the wafers havedeteriorated beyond the point that they can besuccessfully recycled, they are sent for reclaim. Theusual driver for this is failure of the defectivityspecification. The reclaim process involves the useof chemical mechanical planarization (CMP) inorder to return the wafer surface to an acceptablestate. This is an expensive process, and results inconsiderable silicon loss. However, this is a keyfactor that distinguishes recycled from reclaimedwafers. There are a variety of productsmanufactured at SMIC and in many cases thesehave different integration schemes. However, ageneric test scheme is represented below in Figure2 for a typical BEOL logic stack reported in thisarticle. The wafer sees the respective chemistry toremove the films sequentially through the stack.The recycling process is analyzed under threedifferent scenarios: 1) removal of the copper (Cu)and barrier from oxide on silicon, 2) removal oflow-k dielectrics from silicon, and 3) preparationof the bare silicon surface.

Scenario 1: Copper Film Removal During this recycle process, the first step is theremoval of copper and barrier layers. In simplifiedstacks, where there is no low-k present, the barrierlands on a plasma-enhanced oxide (PEOX) film. Inthis case, a 50:1 nitric acid/HF mixture caneffectively remove the copper and barrier. Typically,this process takes about 20 seconds. However,there is an over-etch time of approximately 10seconds to remove some of the PEOX in order tocompensate for any diffused copper. Typically, thecopper is removed too quickly to measure an exactetch rate. However, a rapid colour change takesplace and is an approximate measure of processcompletion. Total X-ray fluorescence spectroscopyis used to verify performance. Representativeresults are highlighted in Figure 3. This processsequence is followed by SCROD/HF sequencing toremove the remaining PEOX film and to prepare aclean silicon surface.

Scenario 2: Low-k Film RemovalWe present a process that involves synergistic dry-and wet-process sequences to remove low-k films.Prior to its introduction, wafers used CMP toremove the low-k film. The CMP process resultedin significant loss of silicon during processing and

Figure 1: Mediaconfiguration withinsingle-wafer SpinProcessor

ECP Cu 10,000

Copper Seed 1,200

Barrier 110

Dielectric Undefined

PEOX 4,000

Silicon substrate n/a

Material Thicknesses (A)

Figure 2: TypicalBEOL logic stack forrecycling

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WAFER PROCESSING 33

led to significant loss of wafers due to waferbreakage. The novel alternative approach involvesa wet/dry/wet process sequence.

Initially, attempts were made to use straight49% HF to strip low-k films. The films aretypically carbon-doped oxides (CDO). A series ofprocess times and temperatures were evaluated andinitially it appeared that it was possible to removethe films in very short times—as quick as 10seconds. A sample that was processed for 60seconds was used for surface characterization.Figure 4 shows process effectiveness using threedifferent analytical techniques.

The far left image is the defectivity map, post-wet clean. Scanning electron microscopy (SEM) ofthese defects (centre image) shows that they aresurface particles rather than scratches or pits.Their composition is confirmed to be carbon (rightimage) by energy dispersive X-ray spectroscopy(EDX). It appears that HF is incapable ofcompletely removing the carbon contaminationassociated with the CDO film at the interface tothe substrate.

To address the carbon contamination issue thefilm is exposed to a plasma environment in thepresence of oxygen. This volatilizes the carboncontamination and makes the surface hydrophilic.The last step is to perform a SCROD/HF process toremove defects. The defectivity count issignificantly reduced and the only remainingdefects are surface pits rather than particles. Thepits are present prior to the recycle step.

Scenario 3: Bare Silicon RecycleAs was stated earlier, there is considerable use ofbare Si wafers for non-manufacturing purposes.These wafers can be recycled and reused forsimilar purposes. The specifications for reuse settargets of less than 100 defects at 0.16-µm perwafer, and less than 10 defects at 1.0-µm perwafer. In general, the process producessignificantly better results than the targetspecifications. However, defectivity is not the onlyconcern. Prior to the recycling process, these wafers haveseen many different process equipment types indiverse modules. As a result, wafers frequentlyhave different surface termination, some beinghydrophilic and some being hydrophobic. Adifferent approach to cleaning each surface type isnecessary. The SCROD/HF process works well onhydrophilic surfaces.

Hydrophobic surfaces are more difficult toclean. Effective wetting of the wafer surface can bea major challenge. Despite the tight control of fluiddispense characteristics, there is a uniquedefectivity profile observed on the wafers aftercleaning. Figure 5 shows defectivity measurements

before and after the first DIO3/HF step. Thebefore-clean (a) map shows a series of randomdefects. Normally, the DIO3 step will grow severalangstroms of oxide on the surface. The subsequentHF step removes the oxide and many of the surfacedefects. However, in this case, the resulting defectmap shows a significant increase in the number ofdefects as shown in the post-review map (b).

During the wet processing of hydrophobicwafers, we observe that there is very poor wettingof the wafer surface. For these, the surfacetermination was modified making it hydrophilicinstead of hydrophobic. Just as in the case of CDOlow-k wafers, the wafers are exposed to plasma inan oxygen environment prior to the SCROD/HFprocess.

This results in the formation of a hydrophilicoxide surface. The DIO3 can then easily wet thewafer surface and the subsequent HF step can etchthe surface removing defects with each successiveetch. The impact of the plasma treatment on thesuccess of the SCROD/HF recycle process wasmonitored over a two-month period in the Fab4Cproduction line. The addition of the plasma stepalmost doubles the wafer success rate from 46% to91%.

Process Performance – SingleWafer vs. BatchThe wafer recycle processes that were beingperformed at SMIC were traditionally done inbatch mode in a wet bench. A comparison of theprocess times between single-wafer and batchprocesses is shown in Figure 6.

Figure 3: TXRF datapost-Cu film removal.High readings inhashed area are due to samplepreparation. Analysisperformed on finalbare silicon surface

Figure 4: Surfaceanalysis of siliconwafer after wetprocessing of CDOfilm, from left-to-right.Defectivity map; SEMimage; EDX analysis

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WAFER PROCESSING34

There are immediate differences that can beobserved in the process times:

● In the case of some of the films where it ispossible to use either a single-wafer or batchapproach, the batch process is shorter thanthe single-wafer. However, this is typicallydue to the fact that the batch tool has ahigher maximum process temperature thanthe equipment generation of the SpinProcessor that is used for this process atSMIC.

● Low-k and copper films cannot be processedin a wet bench due to the cross contaminationconcerns.

While the number of defects is a major concern forthis process, so is the type of defects. The wafersprocessed in the single-wafer tool do show somesurface pitting, as do wafers processed in the wetbench. However, the latter also suffers from alarger number of particles on the surface. This cancause problems when these wafers are reused,particularly for monitor applications.

Carefully monitoring the types of defects thatexist after the recycle process is important. Ithelps to improve the actual recycle process and to

determine the applications for reused recycledwafers. As a rule, wafers that have been exposed tocopper stay segregated from non-copper waferflows, even after recycling. Eventually, after asmany as 20 recycle flows, wafers must be sent forreclaim or be scraped.

Cost of Ownership (CoO)The single-wafer recycle process provides bothperformance and cost advantages over both batchrecycling and recycling that involves CMP. Thefootprint, use of consumables, and use of DI arelower in a single-wafer tool than in a wet bench.However, another significant cost advantage in asingle-wafer tool is the ability to recirculate andreuse the process chemistry.

Analysis of the data has shown that the totalconsumption of media in the single-wafer recycleprocess is less than 100 mL/wafer compared withapproximately 175 mL/wafer in a wet bench. Also, the use of DI is approximately 20 percent of that of the wet bench. Given that a wafer, on average, can be recycled 20 times in a single-wafer recycle process versus 12 times in a batchprocess, there is an observed savings of almost 40 percent between the single-wafer and batchapproach. This produces a significant cost savingsto the fab.

ConclusionAs the semiconductor industry matures, there isincreasing emphasis on cost savings. Resourcemanagement and process innovation areincreasingly sought. Wafer costs and usage accountfor a large portion of the costs of running a fab.The ability to reuse wafers through multipleprocess cycles is extremely important. We havepresented a novel single-wafer recycling processthat allows for the regeneration of wafers for bothengineering development and for use in processmonitoring. The process uses two simple chemical mixtures tostrip films and prepare bare silicon wafers forreuse. The processes remove metal and otherunwanted materials from BEOL wafers with asimple poly-mix solution of HF and plasma –leaving wafers that can be processed with aSCROD/HF approach to remove surface defects,and preparing the wafers to be returned into thefab. The single-wafer approach exceeds thecapability of standard batch (wet bench) abilitiesand provides affordable, cost-effective solutions.We believe that this often overlooked applicationwill become progressively more important asmanufacturing costs continue to rise.

Figure 5: Defect maptaken before (a) andafter (b) first DIO3/HFprocess step

Bare Si 10 10

PEOX 20 10

SiON 20 2

SiN 20 10

TEOS 20 20

Fluorosilicate glass (FSG) 20 15

Carbon Doped Oxide 10 N/A

SICN 10 N/A

Ta/TaN/PEOX 20 N/A

Cu/Ta/TaN/PEOX 20 N/A

Film Single-Wafer Wet BenchProcess Times (sec.) Process Times (sec.)

Figure 6: Process timecomparison forsingle-wafer vs.batch recyclingprocess

SEZ vFinal 15/11/06 10:19 Page 34



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