Simple Combination Lock Circuit Project

Johnathan Sam

Engr 210

5/16/2013

Bill Of Materials

Resistors R1-5 Resistor 47 KOhm 1/4 Watt 5% Carbon Film R6 Resistor 4.7 KOhm 1/4 Watt 5% Carbon Film Transistors

Q1 2N2907 General purpose amplifier and switching transistor (pnp)

ICs IC1 CD 4013 Dual D-Type Flip-Flop IC2 CD 4013 Dual D-Type Flip-Flop IC3 CD 4081 Quad 2-input AND buffered B series Gate IC4 CD 4072 Dual 4-input OR Gate Misc RELAY Relay DSDP miniature 5V relay LED Green x4/ Light Bulb Switches Pushbutton x9

Circuit Description:

There are more simple but less secure circuits. This circuit has a 4-digit security code that is hardware selectable. It can have as many 'wrong' digits as you like, but up to 4 'correct' digits. Also, one digit cannot be more than once in the security code. Suppose for example that you choose to have 10 digit keypad with numbers from 0 to 9. One code could be the number 5293, or the 7520, but the code 4429 is wrong! The digit '4' is more than once in the code and that cannot happen.

Each 'correct' key press will SET a flip-flop. When the 4th flip-flop is SET, the relay will be armed through the PNP transistor. Whenever a 'wrong' button is pressed, all 4 flip-flops will be RESET and the code must be entered again from the beginning. Also, the code must be entered in the correct order. If for example the code is 1234 and instead you press 1 and then 3, the flip-flops will also RESET.

The keypad can have as many keys as you like. From the circuit you have 5 inputs, the D1, D2, D3, D4 and the ERR. The 4 D inputs are the 'correct' buttons. Each one must go to one and only key! For example, someone could connect the D1 to key number 4, the D2 to key number 2, the D3 to key number 9 and D4 to key number 5. The code to open the lock would be '4295'.

All the other buttons that will reset the circuit must be connected to the 'ERR' input. So if the keypad had 10 keys and the code was '4295' the keys 1,3,4,6,7,8 and 0 must be connected to the ERR input.

The circuit is designed to operate at any voltage between 5 and 15 volts.

Logic:

For this circuit there exist two states, no input (Stable State) and input entry (Set or Reset Flip Flops).

During Stable state each flip flop is outputting a high value (Q’ = 1) which is an input for a single AND gate in the CD4081, but since the S pin (SET) on each flip flop is low due to ground each AND gate outputs low values. No high value is inputted into the gathering OR gate, therefore the RESET in all the flip flops is low (not Resetting). Also, since the last flip flop output is high, it is inverted by the pnp transistor to a low value not setting the relay.

During a SET state the flip flops S pin goes high, making the output low (Q’ = 0). Unless a wrong input is entered and the reset goes high, the flip flops will stay in this state and is now SET. If the flip flops are entered out of order, the circuit resets. (The flip flops output low only when SET so if not SET the inputs into the corresponding AND gate are both high making the output high, making the OR gate output high which RESETs all the flip flops.) If a wrong entry is made the signal is sent straight to the OR gate, RESETing all the flip flops. Also, when the final flip flop is SET (Q’ = 0), the signal is inverted by the pnp transistor to a high value setting the relay.

Analysis:

In order to analyze this circuit I grouped up all the gates into one network (one big supernode) and treated it as a single component. There is internal circuitry within the IC’s which makes it hard to analyze with simple methods such as Nodal and Mesh. Therefore I incorporated switches that signify the different states of the circuit. Once that is done I was able to simplify my circuit, thus becoming a simple pnp transistor circuit.

Conclusion:

Sequential logic is a type of logic circuit whose output depends not only on the present value of its input signals but on the past history of its inputs. Asynchronous implies that the circuit doesn’t rely on clock signals (The D flip flops in this project were implemented as S-R flip flops). For my project a functional asynchronous sequential logic circuit was implemented successfully and analysis and test results seem to agree.

The code lock design can be used in various real world applications, pretty much anywhere security is a priority. This simple code lock circuit can be usefully employed in cars so that the car can start only when the correct code sequence is entered in via the key pad. Though, the designs can be improved upon in order to safeguard against hackers and criminals.

A difficulty I experienced was limited knowledge regarding logic design. No prior prep was taken before the construction of the circuit however, after walking through each scenario at each gate and flip flop, breaking down the circuit logically was fairly simple. Another difficulty was the analysis of the circuit. Simplifying the circuit to a small transistor switch helped but doesn’t replace an actual analysis that includes the IC components.