proper pcb layout

8/3/2019 Proper PCB Layout

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MODERN IC AMPLIFIERS, WITH ULTRALOW HARMONIC

DISTORTION, CAN IMPROVE DYNAMIC RANGE IN A

VARIETY OF APPLICATIONS. HOWEVER, PLACING THESE

AMPLIFIERS ON A PC BOARD REQUIRES SPECIAL

ATTENTION, BECAUSE POOR PC-BOARD LAYOUT CAN

DEGRADE DISTORTION BY AS MUCH AS 20 dB.

Typical high-speed-amplifier configurationsinclude two sets of bypass capacitors (Figure 1).One set of capacitors is large (approximately 1

to 10 F), and the other pair is smaller by a few or-ders of magnitude (1 to 100 nF). These capacitorsprovide a low-impedance path from the power sup-ply to ground at frequencies at which the amplifi-ers power-supply rejection is low. Properly bypass-

ing a high-speed amplifier usually requires two ormore sets of capacitors, because the self-resonanceof the larger capacitor set usually occurs before theupper threshold of the amplifiers bandwidth.High-quality chip capacitors are ideal for decoupling, be-cause they have far less inductance than through-hole capacitors.

Resistor RT

terminates the input of the amplifierto match the impedance of the source to that ofthe test equipment youre using for the meas-urements. In an application circuit that is not us-ing a transmission line, the termination resistor isunnecessary. In the figure, the output of the ampli-

fier is driving a load RL, which represents any possi-ble load the amplifier might have to drive. When theoutput voltage of the amplifier is positive, theamplifier must source current into R

L.Likewise,

when the output voltage is negative, the amplifiermust sink current. Regardless of whether the am-plifier sources or sinks this current through the load,it must somehow make its way back to the powersupply. In doing so, the current follows the path ofleast impedance.

At high frequencies, the lowest impedance pathgoes through the bypass capacitors. As the amplifi-er sources and sinks high-frequency current, that

current flows through various loops. The ground of

the upper bypass capacitor sources the current intothe op amp, and sinking current flows from the opamp through the lower bypass capacitor to ground.Each of the high-frequency currents flowingthrough the bypass capacitors is half-wave-rectified.Realizing how these high-frequency currents flow isthe key to effective bypassing.

An example circuit contains a high-speed ampli-

Proper pc-board layout

improves dynamic range

VOUT

VIN 50

ANALYZER

INPUT

SOURCE

OUTPUT

50

49.9

10 F

10 F

0.1 F

0.1 F

5V

5V

976

AD8045

52.3

Standard bypassing results depend highly on layout.

F igure 2

VOUT

VIN

VS

RL

RT

VSC3

C2

C1

C4

A typical high-speed-op-amp configuration contains two sets of bypass capacitors.

F igure 1

designfeature By Greg DiSanto, Advanced Linear Products Group, Analog Devices


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designfeature PC-board layout and its distortion effects

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fier driving an equivalent 1-k load,which an attenuator forms to maintaina 50 back termination for testing (Fig-ure 2). The input also terminates to 50to match the source you use. Different

layouts for the schematic create differentdistortion measurements (figures 3 and4).Analyzing the high-frequency currentloops on the layouts can help explainthese second-order harmonic-distortiondifferences (Figure 5).

In the degraded situation that Figure3s layout creates, the supply runs resideon the back of the board; this fact meansthat vias (through holes from onelayer of a pc board to another) existafter the bypass capacitors. These viasadd inductance to the high-frequency

current loops. When the amplifier issinking current, this current returns to C2

and C4

through a solid ground plane.However, as the amplifier sources cur-rent, the current passes through two setsof inductive vias before returning to C

1

and C3.

These inductances can create consid-erable incremental impedance at highfrequencies. As high-frequency currentspass through these impedances, errorvoltages develop. Because the high-fre-quency currents are half-wave-rec-

tified, the error voltages are alsohalf-wave-rectified. Half-wave-rectifiedsignals carry a large amount of even-or-dered harmonic content, causing dis-tortion of the second-order harmonic,and the third harmonic remains un-changed.

Conversely, with Figure 4s improvedlayout, the power supplies bypass on the

front of the board, so no vias exist afterthe bypass capacitors. Also, the loadgrounds close to both of the decouplingnetworks, so no vias are present in thepath of high-frequency current that theamplifier sources and sinks. This im-proved pc-board layout results in a 3- to

18-dBc improvement in second-orderharmonic distortion.This improvementoccurs over a range of frequencies.

DIFFERENTIAL BYPASSING

Bypassing schemes are useful in avoid-ing grounding issues. You can modify

Front-side-power-supply runs dont increase distortion.

FREQUENCY (MHz)

HARMONIC

DISTORTION

(dBc)

30

40

50

60

70

80

90

100

110

1201 10 100

SECOND HARMONIC

FOR POOR-BYPASS LAYOUT

SECOND HARMONIC

FOR GOOD-BYPASS LAYOUT

The layout-defined bypass-capacitor-grounding

technique you choose correlates to the amount of

second-order harmonic distortion you consequently encounter.

FREQUENCY (MHz)

HARMONIC

DISTORTION

(dBc)

30

40

50

60

70

80

90

100

110

1201 10 100

SECOND HARMONIC FOR STANDARD

BYPASSING ON POOR BOARD

SECOND HARMONIC FOR DIFFERENTIAL

BYPASSING ON POOR BOARD

F igure 5

Back-side-power-supply runs require vias, which create incremental inductance.

Differential bypassing leads to improvements in sec-

ond-order harmonic-distortion performance.Figure 6

F igure 4

F igure 3


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Figure 1 so that one set of bypass capac-itors (C

1and C

3) connect across the pow-

er supplies, and the other set (C2

and C4)

remains connected between one supplyand ground.

Configurations such as this one makeit easier to physically ground the bypasscapacitors and the load at the same placeon the pc board.Grounding the load andbypass capacitors together minimizes theinductance between these grounds. As aresult, you minimize error voltages thathigh-frequency ground currents canform. Also, the high-frequency currentscombine before returning from or goingto the load.As a result, they are not half-wave-rectified as is the case with standardbypassing, and, consequently, they con-

tain little even-ordered harmonic con-tent. Therefore,an error voltage that de-velops in the current path does notincrease distortion.

You can achieve significant improve-ment in distortion by applying this tech-nique to a poor bypassing layout (Figure6). Remember to keep bypass runs shortand to minimize the use of vias. Where

you require a via, keep in mind that twovias in parallel have half the inductanceof one via. The inductance of a via alsodecreases as you increase its diameter.

This scheme may prove particularly use-ful at closed-loop gains greater than 1,when you also need to ground the feed-back network. In this case, the feedbacknetwork is effectively part of the ampli-fier load. High-frequency current flow-ing in the feedback network also returnsto the supply by way of the bypass ca-pacitors. As a result, you also need to lo-cate the feedback networks ground in a

way that minimizes inductance added tothe bypass capacitors.

LOAD-GROUND-CURRENT EFFECTS

The previous example discusses the ef-

fect that poor bypass-ground placementhas on harmonic distortion. Evaluatingthe high-frequency current paths sug-gests that the placement of the loadground will also likely have an impact.For long load-current return paths, the100 load comprises a 49.9 back-ter-mination resistor and a 50 resistor(Figure 7). The 50 resistor is the inputimpedance of the spectrum analyzer youuse to make the measurements. Thetransmission line is approximately 1 in.of 50 pc-board trace in series with 6 in.

of high-quality, 50 coaxial cable. High-frequency sourced and sunk currentmust travel in a long, inductive loopcomprising the 100 load, the bypass ca-pacitors, the transmission line, and theoutput stage of the amplifier.

For short load-current return paths,replace the 49.9 resistor with a 976resistor; connect a 114 resistor on itsleft side to ground and a 52.3 resistor

on its right side toground. This circuitachieves the same

100 effective loadfor the amplifier,and a long path still

exists to the 50 termination of the spec-trum analyzer. However, most of the loadcurrent now has a short return path tothe bypass capacitors, thanks to the 114resistor. This short return path is much

less inductive than the long path in theprevious example. Less inductance leadsto fewer developing error voltages ashigh-frequency current flows in theseloops.Although this configuration is un-usable when driving back-terminatedlines, it still optimizes an amplifiers abil-ity to drive heavy loads, such as the low-impedance feedback networks that occurin low-noise configurations.

A comparison of the second-orderharmonic distortion for these two load-current return paths reveals that a long

return path for load current increases thesize of the high-frequency current loops(Figure 8). Because the loops are longer,they are likely to be more inductive.High-frequency, half-wave-rectified cur-rents returning to and from the load byway of the bypass capacitors develop er-ror voltages. The fact that these errorvoltages are half-wave-rectified affectsthe second-order harmonic distortion.This example shows the importance ofkeeping high-frequency current paths asshort as possible by not unnecessarily

grounding the load far away from theamplifier.

The pinout of the amplifier, which,un-


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VOUT

2VPP 50

ANALYZER

INPUT

SOURCE

OUTPUT

50

49.9

10 F

10 F

0.1 F

0.1 F

5V

5V

49.9

AD8045

A long load-current return path can also degrade the signal.

SECOND HARMONIC

FOR A LONG GROUND-RETURN PATH

SECOND HARMONIC

FOR A SHORT GROUND-RETURN PATH

FREQUENCY (MHz)

HARMONIC

DISTORTION

(dBc)

40

50

60

70

80

90

100

110

1200.1 1 10 100

Shorter load-current return paths create less

second-order harmonic distortion.F igure 8

VSV

0

dIIP

dLS

VS

IN

IN

B

VSV

0

VSIN

IN

A standard

SO-8 pinout

results in mutual inductance

coupling.

More mod-

ern pin-outs rotate every pin

counterclockwise one position.

Figure 10F igure 9

F igure 7


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fortunately, is difficult for usersto change, can also have a sub-stantial effect on distortion.Degradation arises from thefact that, with a standard SO-8

pinout, the negative powersupply resides directly next tothe noninverting input of theamplifier (Figure 9). Whencurrent sinks into the amplifi-er, it winds up flowing out ofthe negative supply. This cur-rent, dI

S-, creates a magnetic

field,B, which couples the neg-ative-supply pin to the non-inverting input. Couplingthese two pins can induce errorcurrent, dI

IP, in the noninverting input.

Lenzs Law states that the direction ofthis current is opposite to the field thatcreated it. This error current, in turn,produces an error voltage,which appearsduring half of each cycle, because V

S

provides load current only half the time.This situation creates an asymmetry inthe output voltage and results in degrad-

ed even-ordered distortion.Some ampli-

fiers feature a rotated pinout that movesthe negative-supply pin away from thenoninverting input (Figure 10).

Users will most likely see the effect thatpackage pinouts can have on distortionwhen driving a low-impedance load.This scenario occurs because the amountof current flowing is greater, thereby

making dIS

greater (Fig-ure 11). Increasing theclosed-loop gain of the sys-tem makes the error appearlarger at the output, but it

may not incrementally de-grade distortion, because adecrease in loop gain hasalready caused degrada-tion.

Authors biography

Greg DiSanto is a productand test engineer at AnalogDevices (Wilmington, MA).He characterizes and devel-ops test systems for new

products. He received his bachelors and

masters degrees from the University ofMassachusettsLowell in 2002 and 2003,respectively.

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SOIC-PACKAGE

STANDARD PINOUT

CSP-PACKAGE

ROTATED PINOUT

FREQUENCY (MHz)

HARMONIC

DISTORTION

(dBc)

40

50

60

70

80

90

100

110

1200.1 1 10 100

Your choice of pinout can notably affect second-order

harmonic distortion.Figure 11


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proper pcb layout

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