hightemperatureelectronics reliabilitylifetimeandtesting session v

8/13/2019 HighTemperatureElectronics ReliabilityLifetimeAndTesting Session V

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Reliability of Commercial PEMs in Extreme Temperature EnvironmentsAt Elevated Temperatures

Patrick McCluskey, Kofi Mensah, and Casey O'ConnorCALCE Electronic Products and Systems CenterUniversity of Maryland, College Park, MD 20742

Voice: 1-301-405-0279; FAX: 1-301-314-9477; E-mail: [email protected]

Anthony GalloDexter Electronic Materials

Olean, NY

Abst ract

Over 97% of all integrated circuits produced today are available only in plasticencapsulated, surface mountable, commercial grade or industrial grade versions. This isespecially true for the most advanced technologies, such as high-speed

microprocessors. The cost, availability, and functionality advantages of these devicesare causing many electronics manufacturers to consider using them in elevatedtemperature applications such as avionics and automotive under-hood electronicsystems to ensure early affordable access to leading edge technology. However,manufacturers only guarantee the operation of commercial devices in the 0C to 70C

temperature range, and the industrial devices in the 40C to 85C temperature range.

This paper describes the first study which addresses the reliability of plastic

encapsulated microcircuits (PEMs) in the range from 125C to 300C, well outside the

manufacturers suggested temperature limits. Previous work has indicated that PEMssold for use in the commercial and industrial temperature ranges can often operatewithin the manufacturers suggested electrical parameter specifications at much higher

temperatures. For example, in this study, a Motorola MC68332 microcontroller, which iswidely used in avionic systems, remained fully functional to 180C. This is in accordancewith previous work that indicated no fundamental constraints to the operation of silicondevices at temperatures up to 200C. However, this study also revealed that industrial

grade, plastic encapsulated MC68332 devices had less than half the lifespan at 180C of

similar MC68332 devices packaged in hermetic ceramic packages. In addition to theMC68332, the other nine types of plastic components studied had a shorter lifespan at

180C than their ceramic packaged counterparts. Outgassing of flame retardants with

the associated catalysis of the growth of intermetallics was determined to be theprincipal cause of failure in the plastic components.

Further studies conducted on 84-lead PQFP leadframes encapsulated in two different

molding compounds revealed that the plastic encapsulant itself begins to lose its abilityto insulate leads at temperatures greater than 250C and can actually combust at

temperatures greater than 300C. Both insulation resistance degradation and cracking

were found to be more prevalent in novalac than biphenyl. In summary, these studieshave shown that while plastic encapsulated microelectronics can operate at

temperatures above 125C, they have less than half the life of ceramic microcircuits at

180C and they begin to show signs of insulation resistance degradation after 300 hours

at 250C.


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LIFETIME-LIMITING FACTORS FOR COMMERCIAL POWER

MOSFETS AT HIGH TEMPERATURES

W. Wondrak1, A. Boos

1, W. Schaper

1, J. V. Manca

2, B. Parmentier

3, and

R. Peat4

1DaimlerChrysler AG, Research and Technology, Goldsteinstr. 235,D-60528 Frankfurt, Germany

2Limburgs Universitair Centrum, Institute for Materials Research,

Wetenschapspark, B-3590 Diepenbeek, Belgium;3Etudes et Productions Schlumberger, 26, rue de la Cave, F-92140

Clamart, France4AEA Technology, Products and Systems, F5 Culham, Abingdon,

Oxfordshire OX14 3DB, United Kingdom

AbstractIn this paper, we report on the impact of cyclic temperature stress up to 200C oncommercial power MOSFETs. We investigated 60V MOSFETs, with a maximum rating for IDof 60A. Electrical characterisations and acoustic microscope investigations after thermalshock tests and after pressure cooker tests (PCT) were conducted to give informations onthe failure modes and reliability at accelerated temperatures. As a result, commercial powerMOSFETs in plastic packages off-the-shelf can be operated at temperature levels of 200C,but care must be taken if the devices have to operate in humid environments.

Introduction

Power devices are key components for electronically controlled actuators needed inautomotive and aerospace systems. In future applications like transmission control or motorcontrol, higher operation temperatures will be required going up to 200C. For many of theseapplications power MOSFETs are ideal candidates. Understanding the behaviour and thedegradation mechanisms of such devices in harsh environments will enable to defineguidelines for their implementation in high-temperature applications.In addition to temperature-accelerated sensitivity of electronic devices to electrical stresses,thermo-mechanical stress is a major damage source [1-4]. In this paper, we focus on theimpact of cyclic temperature stress on commercial power MOSFETs. We investigated 60VMOSFETs, with a maximum rating for IDof 60A in conventional TO220 packages, specifiedfor a maximum temperature of 175C. In the package, the dies are mounted with a lead-richsolder on the leadframe, and surrounded by a molding compound with a glass transition

temperature of about 185C. Data sheet values for threshold voltage and on-resistance were2 - 4V, and 18m.

Thermal Shock StressingThe stress conditions for thermal shock were similar to quality standards in semiconductorindustry (IEC 68 or MIL SPEC 883), but with increased temperature levels (-40 to +200C).Figure 1 shows the temperature profile in the thermal shock chamber employed. One cyclefrom 40 to 200C and back took about 60 minutes. Dwell times were roughly 25 minutes athigh and low temperature. The test devices were cycled in groups of 5 elements up to 2000cycles.


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time (h)

Fig. 1: Temperature profile in the shock chamber

The measured electrical parameters were threshold voltage vth, drain leakage current ID, gateleakage current IG, breakdown voltage UBR, and on-resistance Ron.

Fig. 2 shows the normalized threshold voltage versus the number of thermal cycles. No significantchanges can be observed.

Fig. 2: Normalized threshold voltage of power MOSFETs after thermal shocks.

Fig. 3: Gate leakage current of power MOSFETs after thermal shocks.

Temp

erature(C)

0,96

0,97

0,98

0,99

1

1,01

1,02

0 500 1000 1500 2000

# of cycles

0

20

40

60

80

100

0 500 1000 1500 2000

# of cycles

gatecurrent(p

A)


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Fig. 4: On-resistance of the power MOSFETs after thermal shocks.

Fig. 3 shows the measured gate leakage currents of the devices after thermal cycling. The

parameter variations are rather due to noise in the measurements than to real changes in thedevices. The only electrical parameter showing a systematic shift is the on-resistance. Asteady increase with time was observed (see fig. 4), which amounts to 5 /cycle. Thisallows us to determine a lifetime when a maximum allowed on-resistance must not beexceeded. This effect is generally observed after thermal cycling of power devices, becausethermomechanical stress leads to cracks in the solder joint and thus to an effective decreaseof the contact area.No failures due to bonding wires or dies itself have been observed. The changes inparameters are small, we noticed only a change in color of the packages and oxidation of theleads. No visible defects could be observed. In order to find out, whether small cracks haveformed, which allow water penetration, pressure cooker tests at stressed devices wereperformed.

Pressure Cooker TestsHigh temperature can lead to irreversible changes in polymers resulting in hardening,cracking and delamination. This would induce high sensitivity of the devices against water. Inorder to find out, whether small cracks have formed which allow water penetration, pressurecooker tests at stressed devices were performed (121C, 2 bars pressure). Electricalcharacteristics were measured after 96 hours and after 168 hours, respectively.The results indicate, that the devices are very sensitive to humidity after thermal shock, sothat probably delaminations had occured. After 1000 cycles, the gate leakage current at Vg =20V of all devices exceeded 1 A, which was our criterium for gate integrity.

In fig. 5, the evolution of drain leakage current of the power MOSFETs during thermal cyclingfrom 40 to +200C is shown before and after pressure cooker test. Test voltage was 60Vwith gate and source grounded. It can be recognized, that moisture ingress affects stronglythe device behavior even after only 200 cycles. After 500 cycles, it is still in an acceptablerange, but after 1000 cycles, the drain current has grown to a magnitude which affectspossible applications.Since no mechanical defects could be observed, scanning acoustic microscopy wasemployed to reveal potential delaminations in the packages.

0

5

10

15

20

25

30

35

40

0 500 1000 1500 2000

# of cycles

on-resis

tance(m

)


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Fig. 5 Drain leakage current of power MOSFETs after thermal cycling from 40 to +200C before

and after pressure cooker test

Scanning Acoustic Microscopy InvestigationsDelaminations are opening paths for water penetration in packaged devices. By scanningacoustic microscopy two types of delamination could been observed. The first type ofdelamination is between the metal plane and the plastic and is present on all devices tested.This is obvious from the top-side investigations (fig. 6). Even in the virgin devices (fig. 6a), arelative big fraction of the interface between lead-frame and mold material shows weakadhesion. After 500 cycles, the brighter appearance of the picture indicates that almost thewhole interface between plastic and leadframe, and also between plastic and die isdegraded.The second type of delamination could be observed on the pictures from the bottom-side ofthe packages (fig. 7).

a) b)

Fig.6 Scanning acoustic microscope images from top side after 0 and after 500 cycles

Chip

Delamination

Bonding

wires

1,00E-11

1,00E-10

1,00E-09

1,00E-08

1,00E-07

1,00E-06

1,00E-05

1,00E-04

1,00E-03

1,00E-02

0 500 1000 1500 2000

Number of cycles


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a) b)

Fig. 7 Scanning acoustic microscope image from bottom side after 0 cycles(a) and after500 cycles (b)

Prior to cycling, the interface between die and leadframe is dark and shows only some smallvoids. After 500 cycles, big voids have emerged. This more than 50% delamination can beestimated to increase the thermal resistance of the total package by 25%.In addition, bright spots have developed at the corners of the chip, where the highestthermomechanical stress is expected. This is an indication for beginning crack propagation.Therefore, the limit of the high-Pb solder joint is almost reached under these conditions.For comparison, if we admit an increase of the on-resistance of the devices by 2 m, the

resulting lifetime would be 400 cycles.

ConclusionsAs a result, commercial power MOSFETs in plastic packages off-the-shelf can be operatedat temperature levels of 200C. They withstand a number of thermal cycles without severe

electrical degradation, but care must be taken if the devices have to operate in humidenvironments. For such applications, new molding materials or adhesion-promoting layersare strongly requested. With the proposed combination of tests, the suitability of these newmaterials can be investigated easily.The conventional die attach system is almost at ist limit under the conditions descibed. Inorder to achieve long lifetimes, new solder materials have to be implemented.

AcknowledgementsThis work was supported by the European Commission under contract no BRPR-CT-0596(REDHOT).

References[1] F. P. McCluskey, R. Grzybowski, and T. Podlesak, High Tenmperature Electronics,

CRC Press 1996[2] H. Berg and E. Wolfgang, Microelectronics Reliability 38 (1998), pp. 1319-1323[3] M. Ciappa and W. Fichtner, Proc. of the IRPS 2000, pp 210-216[4] W. Wondrak, Microelectronics Reliability 39 (1999) 1113-1120

Die

Void

Lead-frame


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HIGH TEMPERATURE TIME DEPENDENT DIELECTRIC

BREAKDOWN OF POWER MOSFETS1J.V. Manca, 2W. Wondrak, 1K. Croes, 1W. De Ceuninck, 3B. Dieval and 1L. De Schepper

1Limburgs Universitair Centrum, Institute for Materials Research, Wetenschapspark, B-3590 Diepenbeek, Belgium;

Tel. : +32/11/268826 ; Fax : +32/11/268899 ; e-mail : [email protected]

DaimlerChrysler AG, Research and Technology, Goldsteinstr. 235, D-60528 Frankfurt/Main, Germany3present Address: Alcatel, Stuttgart, Germany.

Abstract - Time Dependent Dielectric Breakdown (TDDB) has been studied by means of in-situ leakage currentmeasurements of power MOSFETs at various voltages (30V-45V) and temperatures (175C-225C). Astatistical analysis of the results yields information on the underlying failure time distribution, failuremechanisms and lifetime.

Introduction - MOSFETs are key components for many of the new high temperature applications. In thesedevices, most failures are due to gate-oxide breakdown, which depends on the applied voltage and on thetemperature. For the thermal acceleration of dielectric breakdown, widely differing activation energy values,ranging from 0.2 to 1.1 eV, have been reported in various studies, depending on oxide thickness and ambienttemperature. For voltage acceleration, two competing models exist for lifetime calculation, leading toambiguous lifetime predictions. In-situ leakage current measurements have been performed in order to study the

dielectric breakdown behaviour of the oxides used in two types of high temperature MOSFETs. In this paperthe presented results have been obtained with one type of commercial power MOSFET (60V,70A).

Failure Time Distribution - An essential step in reliability studies is the determination of the underlyingfailure time distribution. The choice of the failure time distribution is of great importance because allconclusions drawn from a statistical analysis will depend on it. Lifetime predictions can vary orders ofmagnitude depending on the distribution used. The extrapolation to low percentiles (an x%-percentile is definedas the time that x% of the total population of components have failed) is particularly sensitive to the choice ofthe underlying distribution of failure times. For TDDB, Weibull distributions are often used since thisdistribution fits with the weakest-link character of the breakdown process, but also the lognormal distribution isoften encountered in the literature. Two important aids in order to make a correct choice of failure distributionare : (1) to measure a large number of samples and (2) to use a statistical technique based on Pearson'scorrelation coefficient.For the present study, long term (27 days) TDDB-experiments have been performed at 200C with a gate voltage

of 41V on a population of 40 samples (batch1). Each sample was connected with a series resistance and theleakage current was monitored for each individual sample by measuring the voltage over the series resistance.The set of failure times has been analyzed with the statistical software package FAILURE. This software

package incorporates a method which allows to make an objective distinction between lognormal and Weibullfailure distributions. The result of this Lognormal/Weibull-test was that the Ho-hypothesis (Ho = lognormal)was NOT rejected in favour of HA= Weibull. The significance level of the test was 10%. Due to the largenumber of samples the power of the test was high : 78%. In the figure below the failure times have been plottedon a cumulative lognormal plot, confirming the good choice of the failure distribution.

Figure 1 : Lognormal-plot of TDDB-data for power MOSFETs stressed at V = 41V and T = 200C.

Temperature Dependence - To evaluate the dielectric breakdown resistance of the power MOSFETs at hightem eratures, TDDB-ex eriments have been erformed at various elevated tem eratures and various volta es.


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The number of samples tested for each stress condition are listed in the table below.

Temperature 37 V 39 V 41 V 43 V

175C 10 samples 10 samples 10 samples

200C 9 samples 10 samples 10 samples

225C 10 samples 10 samples 20 samples 9 samples

Table 1 :stress conditions and number of samples for the TDDB-experiments on power MOSFETs (batch2).

A statistical analysis of the reliability data has been performed using the software package Failure. An uniquefeature of Failureis that the estimation of model parameters is done by using the so-called maximum likelihoodmethod. This method numerically maximizes a function depending on the data and on the model parameters.For the case of the considered TDDB-data it is has already been shown that lognormal cumulative monomodalfailure plots represent the failure data properly. In this paper, the temperature dependence of the life time of theMOSFETs at high temperatures is investigated.

Analysis of the life time data shows that the temperature dependence of the life time ! is well described bymeans of the Arrhenius relation :

=A exp(EakBT

)

with kBthe Boltzmann constant, Tthe absolute temperature andEathe activation energy as model parameter.

In the figure below, the TDDB-data of the experiments performed with 41V at various temperatures isrepresented on a lognormal cumulative failure plot. The lines on the plot are the maximum likelihood fits of thedata using the Arrhenius relation. From the plot it is clear that the Arrhenius relation forms a good descriptionof the temperature dependence of the high temperature TDDB-data.

Figure 2 : Lognormal-plot of TDDB-data for V = 41V and T = 175C;200C;225C ; the symbols are theexperimental life times, the full lines are the fits based on the Arrhenius relation.

From this analysis scale parameter, shape parameter and activation energy can be obtained. In the next table the

estimates together with the lower and upper bounds (confidence level = 95%) are listed for the referencetemperature of 200C :

Parameter Name Estimate Lower Bound(95%)

Upper Bound(95%)

Scale parameter at 200C(minutes) :

191 164 223

Activation energy (eV): 1.06 0.920 1.20

Shape parameter : 0.500 0.407 0.631

Table 3 : Statistical fit parameters of TDDB-data (V = 41V and T = 175C;200C;225C).

The analysis performed above has also been performed for the experiments with V = 37V and V = 39V. In thenext tables the corresponding model estimates together with the lower and upper bounds are listed for the


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Upper Bound(95%)


688 609 778





Upper Bound(95%)


334 284 393




Voltage dependence-The relationship between the electric field at breakdownEbdand the time to breakdown tbdat room temperature has been formulated by the so-called reciprocal field model (ln(tbd) ~1/Ebd) and the linearfield model (ln(tbd)~ -Ebd). In order to study the voltage dependence at high temperatures of gate oxide

breakdown in power MOSFETs, experiments have been performed at 200C with various elevated voltagelevels. In the figure below predictions of the lifetime (t50%) at realistic operation conditions (20V/200C) have

been performed using both the E-model and the 1/E-model and the results from the experiments in table 1 .Predictions have been performed in two ways : (1) calculations using only the t50%-points at the various stressconditions, and (2) calculations using the maximum likelihood method (Failure). The predictions towards the20V/200C;25V/200C;30V/200C-levels show that for both models too optimistic lifetimes are obtained bytaking into account only the t50%-points. Predictions using the maximum likelihood method (Failure) show adifference of almost a factor 100 for the lifetime at the 20V/200C-condition. The results of a recent set ofexperiments with a broad range of voltages (30V-45V) will allow to better distinguish between the two models.

Figure 3 : Lifetime predictions for gate oxides at various voltage levels at 200C using the E- and the 1/E-model and two fitting methods (only t50%-points / Maximum Likelihood = Failure).

Conclusions - From the statistical analysis of the high temperature TDDB-data the following conclusions canbe drawn: (1) the TDDB-data are well represented by a monomodal lognormal cumulative failure plot ; (2) theArrhenius relation forms a good description of the temperature dependence of the high temperature TDDB-data ;(3)Ea, the activation energy in the Arrhenius relation, is in the order of 0.9-1.3 eV ; (4) a maximum likelihood

method leads to improved lifetime predictions and (5) the validity of the E- or the 1/E-model is under studywith high temperature TDDB experiments in a broad voltage range (30V-45V).

ACKNOWLEDGEMENTS -The authors would like to thank the European Commission for the financialsupport of the BRITE-EURAM project REDHOT.

Voltage (V)

18 20 22 24 26 28 30 32

t50%

(days)

1e+0

1e+1

1e+2

1e+3

1e+4

1e+5

1e+6E-model : t501/E-model : t50

1/E-model : FailureE-model : Failure


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Applications Targeted by ReliableHigh Temperature Electronics

Ben Gingerich, Phil Brusius

Honeywell Solid State Electronics Center12001 State Highway 55

Plymouth, Minnesota 55441(612)-954-2104, (612)-954-2897

fax: (612)-954-2764e-mail: [email protected]

Introduction

This paper presents a set of reliable high temperature electronic components that havebeen developed to target multiple applications in hot hostile environments. We presentthe various applications and our understanding of the reliability and temperaturerequirements. In addition we present the reliability testing conducted with respect torandom failures and wear out mechanisms at high temperature that support the capabilityof the electronics to meet these applications needs.

Over the years numerous papers presented at this conference have highlightedrequirements which have had various temperature and lifetime requirements. Theseapplications have all had a similar need for reliable and predictable behavior of theelectronics at elevated temperatures. This paper will present reliability data taken on aset of electronic components fabricated in Silicon On Insulator, SOI, CMOS. These partshave been designed from ground up for reliable operation at high temperature with long

lifetimes. Over 2,000,000 equivalent device hours at 225C have been gather on a familyof components with demonstrated failure rates of greater than 500,000 hour Mean TimeBetween Failure, MTBF.

The applications targeted by these electronics range from down hole petroleum andgeothermal instrumentation to smart sensors and actuators on aircraft gas turbineengines. This paper will discuss the range of temperatures and lifetime requirements thatare represented by these diverse applications. Additional applications that have beendiscussed include internal combustion engine emission controls along with industrialpetrochemical processing smart sensors.

High Temperature ApplicationsA number of applications have been presented previously that require reliable hightemperature integrated circuits. The applications range from down hole drilling andmonitoring activity for geothermal and petroleum applications to advanced instrumentationfor aircraft turbine engines. The temperature range and lifetime requirements varysignificantly. The range of temperature and lifetime requirements for various applicationsare shown in Table 1. The lifetime requirements and temperature cover 90% of theapplications within the various market segments.


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Market / Application Temp.Range, C

Lifetime AtTemp. Hr

Shock &Vibration

Petroleum

Measurement While Drilling -40 to 200 100 to 500 Sever

Permanent Gauges -40 to 200 50,000 Minor

Geothermal Well Montitoring -40 to 300 25,000 Minor

Gas Turbine Engines -55 to 300 50,000 Sever

Heavy Duty Diesel Engines -40 to 200 25,000 Moderate

Automotive -40 to 160 5,000 Moderate

Industrial Process Instrumentation -40 to 300 50,000 Minor Table 1: Applications Temperature & Lifetime

To address problems of reliable high temperature operation a new set of integrated circuitcomponents has been introduced as HTMOS!. These integrated circuit electronics havebeen developed to address aircraft gas turbine engine instrumentation and meet the highreliability requirements. The electronics were target to meet 225C and 50,000 hours of

operation at that temperature. To make valid reliability projections a database with morethan two million device hours at the targeted maximum temperatures has been developedand failure analysis completed on failed components. With this database projections oflifetime and failure rates can be completed for applications using these integrated circuits.These same components can be used as the building blocks for a other applicationsrequiring high reliability.

Reliability Factors For Integrated CircuitsFor many products and integrated circuits the reliability of a given product has 3 distinctphases that are commonly referred to as the bathtub curve. In the early hours of theproduct lifetime, the failure rate is relatively high, but infant mortality can be screened outwith effective testing or burn-in. In the useful years of the product lifetime the failure rateshould be low. These failures are caused by random defects or environmental events.

After the useful life of the product, various facets of the product wear out and the failurerate increases rapidly.

These different failure rate phases provide a curve that resembles a bathtub. If theproduct is manufactured and tested properly, the early defects are observed andscreened out such that products with these defects are not shipped. If the product isdesigned properly, the 3rd or wear out phase occurs after the useful life of the product.This then results in products that have an appropriate useful life with a low failure ratefor the intended application.

With respect to the high temperature integrated circuits presented here, we haveperformed different types of tests to assure that the manufacturing defects have beenproperly screened out and that the products do not have any lifetime limiting defects. Aburn-in at 250C and a three temperature test after burn-in is used to eliminate infantmortality and minimize defects in shipped parts. Life tests are performed at these sametemperatures after the standard product screening to develop a reliability database toverify that the failure rate is relatively low during the useful life of the product. In additionat the beginning of the integrated circuit development highly accelerated tests wereperformed on special test structures to assure design requirements such that the wearout mechanisms do not occur during the planned useful life of the product. These testsare described in the following sections.


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Lifetime TestingTo develop a set of reliable high temperature integrated circuits, a number of lifetime testsmust be conducted to establish design rules. In order to obtain data in a reasonableperiod of time, highly accelerated tests are performed on special test structures to projectthe products end of life. By using special test devices, conditions too extreme for theproduct can be utilized so as to accelerate known failure mechanisms. In this manner

tests a few months in duration may be the equivalent of years of normal life.

There are a number of known wear out mechanisms that could limit the life of anintegrated circuit. Many of these are packaging related. One of the greatest areas o fconcern is the wire bonds because often two different materials are connected. Whendifferent materials are together at high temperature, the connection may become resistiveand subject to failure.

Most integrated circuit chips employ aluminum metalization as the interconnect on thechip. Most ceramic hermetic packages have gold metalization as the wire bond landingmaterial. A wire connecting the chip to the package is going to have a mismatch at oneend or the other. To evaluate the bond lifetimes, an experiment was set up where theresistance of different interconnecting schemes was monitored at 300C.

The experiments covered a full spectrum of all aluminum, all gold, and a mixture withinterfaces at the chip and on the package wire bond pad. The results of this testing aresummarized in Table 2. The only somewhat surprising information in this table is the 3rdrow, where aluminum wires on gold package pads have not failed in 17,000 hours. Thisis especially interesting in light of the 4th row where gold wires on the aluminum chippads failed in 30 hours. This situation in the 4th row where the aluminum interfaces withthe gold on the chip is believed to be due to the relatively small amount of aluminumdiffusing into the relative large gold ball bond. On the other hand the situation in the 3rdrow provides plenty of aluminum to diffuse into and saturate the thin film package gold.Wire bond pull strength measurements were also conducted at 15,000 hours. Thesetests have confirmed that the bonds as shown in the 3rd row are robust. This life testingof the aluminum wires on the gold pads is equivalent to more than 15 years at 225C andwill meet the needs of a reliable system. I

ChipMetal

WireType

PackageBondPad

Metal

Time @300C

(Hours)

ResistanceChange

Al Al Al 17,000 No change

None Au Au 17,000 No change

None Al Au 17,000 No change

Al Au Au 30 Failed open

Table 2: Summary of Wire Bond Resistance

Additional testing has shown that the type of interconnections described above canwithstand 500 thermal cycles to 300C with minimal degradation. This data has beenpresented in more detail in reference 1.

In some applications where significant vibration is present, such as down holemeasurements while drilling, wire resonance may be an issue. With proper design of the


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package the wires can be less than .080 inchs in length such that the lowest resonantfrequency of commonly used 1.25 thousands of an inch aluminum wire would be on theorder of 26,000 Hz. The resonant frequency of a similar sized gold wire could be a lowas 10,000 Hz. With the low mass of the aluminum wires the shock and vibration are not aproblem.

In addition to packaging problems there are a number of potential life limiting failuremechanisms on the silicon integrated circuit chip. Probably the most important of theseproblems is electromigration. Electromigration is the phenomena in which metal ions movein the chips thin film conductors. This movement is proportional to current density andtemperature and may result in open or short circuit failures.

The electromigration lifetime of a semiconductor chip is dependent on its metalizationsystem and the designed maximum current density. This relationship is established byhighly accelerated testing of test structures. Tests have been performed many times onthe AlCu metalization system used in these products. These tests have been performedat 250C a number times over the last 20 years. The results of this testing have shown.5mA/m2 will meet the 50,000 hours at 225C objectives. This is the lifetime for onepercent of the parts to fail. The products designed with this requirement will also operate

for over 20 years at 150C. Additional development efforts have been demonstrated on atungsten metalization process that would offer the capability to operate for long periodsof time at temperatures above 300C.

Another common integrated circuit wearout mechanisms is time dependent dielectricbreakdown (TDDB). TDDB has been shown to conform with physical and analyticalmodels to 400C as discussed in reference 2. TDDB has a modest temperature effect andfor the most part this means that a reliable gate oxide process for normal temperatureswill be reliable at high temperatures. For these integrated circuits a reliable gate oxideprocess with more than 1,200,000 device hours at 150C and more than 800,000 devicehours at 250C has been established.

Another prominent life limiting failure mechanism is hot carrier effects. This effect resultsfrom high electric fields due to smaller transistor sizes. The small geometry of modernday integrated circuits cause high electric fields that can energize electrons and holes tobe hot. These energized hot carriers are accelerated by the high fields poweringthem into the silicon / oxide interfaces. These hot carriers can change transistorcharacteristics. Interestingly, this phenomena becomes more severe at coldertemperatures, and thus with careful design practices is not life limiting at temperaturesabove room temperature. Data supporting this claim has been published elsewhere andis described in detail in reference 3.

It is important to note that Honeywell uses Silicon on Insulator (SOI) starting materialfor its high temperature products. This material has some unique advantages for hightemperature operation as noted in reference 4, such as low leakage currents at high

temperature. Other aspects of this process have also been characterized attemperatures greater than 250C and found to be predictable and not reliability limiting.The SOI technology and its applications are discussed in more detail in reference 5.

With the various technology life limiting failure mechanisms characterized, we can thenaddress them in the product development phase. These steps have been taken early inthe development phase and applied to a set of design rules which ensure a robust designthat will meet the targeted 5 year lifetime at 225C.


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Product Life TestingThe burn-in process is often used to assure that defects that cause early failures arescreened out and the product characteristics are stabilized. The packaged integratedcircuits are operated at elevated temperatures (HTMOS uses 250C) with electrical biasranging from 2 to 14 days. Weak or marginal parts will normally fail in this time and areflagged by final testing over the full temperature range. In this fashion weak parts with

infant mortality are screened out and not shipped into the field.

If the lifetime limiting failure mechanisms are designed out and infant mortality is screenedout, other random, defect or process related mechanisms may be evaluated in a productlife test. In such a test quantities of parts that have received normal screening are biasedat elevated temperature for extended periods of time. The parts are periodically testedfor correct operation. Such tests can be used to develop a reliability database that canbe used to gauge the failure rate to be expected in the field under normal usage.

To establish a database a number of such life tests have been performed on differentpart types at 250C. Once a reasonable number of hours in life test has been establishedthe Mean Time Between Failure (MTBF) can be calculated. To develop the database aselection of analog and digital parts have been chosen to provide a mix that would

characterize the HTMOS family of products. The parts used were a Quad OperationalAmplifier, an Eight Bit Microcontroller, a 256K Bit Static Memory, and a 16:1 Multiplexer.These products have completed over 2,220,000 equivalent hours at the design targettemperature of 225C. The detail regarding the tested parts and the calculated MTBFs areshown in Table 3. This table shows that the MTBF for the product family is over 300,000hours at 225C

Part Type ActualDevice

Hours @250C

EquivalentDevice

Hours @225C

MTBF @225C

(Hours)

EquivalentDevice

Hours @150C

MTBF @150C

(Hours)

Op Amp 424,000 1,394,000 334,000 25,000,000 6,000,000

83C51 178,000 388,000 423,000 7,000,000 7,600,000

SRAM 149,000 325,000 105,000 5,900,000 1,890,000

Mux 52,000 114,000 56,000 2,000,000 446,000

All 803,000 2,220,000 302,000 40,000,000 5,457,000

Table 3- MTBFs Projected to 225C and 150C With Activation Energy Of Ea=0.7eV

The failures experienced in these life tests have not been catastrophic. They were notof the type that would be life limiting such as a dead short or an open. As an example, anSRAM failure was a single bit failure. If encoding algorithms are used which can correctand detect on fault this failure would not be a system failure. The two op amp failureswere due to (1) high leakage current, 15 nA measured at 225C and (2) a slightly high

input voltage offset of 7.6 mV measured at 225C.

In short, the above life testing has shown that integrated circuits designed for hightemperature applications can be reliable at temperatures up to 225C. These circuits canbe used for long life applications and with the use of a reliability database predictableperformance and lifetime expectations can be made. With the application of redundancyand fault tolerance techniques instrumentation or data acquisition systems can bedesigned to last for many years at elevated temperatures with a high level of reliability.


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Passives, Boards, and Other IssuesInstrumentation and data acquisition systems will require more than integrated circuitsthat operate at high temperature. A number of sensors have been demonstrated tooperate at high temperatures reliably. It has typically been the electrical interface circuitsthat have had reliability issues. These circuits may well require resistors and capacitors.In addition to the HTMOS line of integrated circuits a thin film resistor process implemented

on chip has shown less than 1.7% change in resistance after 1700 hours biased at250C. These results are discussed in more detail in reference 5. These resistors havebeen integrated onto silicon integrated circuits and they have been fabricated as aresistor arrays with specific values.

In addition at the board level power wirewound resistors and thick film resistors havebeen demonstrated to meet high temperature requirements. The details of this testing arediscussed in reference 6. Wirewound resistors have survived 10,000 hours storage at300C and 1,000 thermal cycles from -55C to 225C with less than 4% change. Thickfilm resistors have been shown to meet a 5% tolerance in the 175C to 250C rangeunder the same kind of conditions.

There are several kinds of capacitors that can adequately serve most high temperature

needs. Ceramic NPO capacitors with a low temperature co-efficient of capacitance havebeen shown to be stable to 500C as reviewed in reference 7. Higher value ceramic X7Rcapacitors with a higher dielectric constant have been demonstrated to be stable through5000 hours at 200C in reference 8. These same devices have undergone more than1000 hours of life testing at rated voltage and 300C without failure or significant currentor resistance degradation as reviewed in reference 9. (This testing is equivalent to about5 years at 200C.) It is interesting to note that barium titanate X7R capacitors tend to agea few per cent per decade of time when biased below 120C and actually de-age at atemperature of 150C as described in reference 10. With respect to reference 10 highervalue wet tantalum capacitors age gracefully for 2000 hours at 200C, but may lose theirhermetic seal and slowly degrade after that. Solid tantalum capacitors aged as much as4% through the first 1000 hours at 200C, but were stable for the next 4000 hours. Ascan be seen from the referenced data presented here several alternatives for hightemperature capacitors exist which can meet reliable long life time operation.

To meet reliable high temperature operation it is an important consideration for all hightemperature capacitors to be derated for voltage. Voltage is more of an acceleratingfactor than temperature for capacitors. A figure of merit that can be used with acapacitor is to choose one rated at least 2x above the voltage required.

Resistors and capacitors, such as those noted above, as well as packaged integratedcircuits can be soldered to an appropriate printed wiring board with high temperaturesolders. Normal FR-4 boards will not last above 150C. Polyimide boards with all thecopper traces embedded have been shown to last 6000 hours at 250C duringHoneywells integrated circuit life tests. Such boards can be made for through hole

connections which are generally more reliable with temperature cycling than surfacemount. More specialized applications may require ceramic boards. The thick filmconductors on a ceramic board are generally fired at temperatures from 800C to 1000Cand are not affected by the much lower application temperature. The eutectic tin-lead(37/63) solder used for commercial applications will flow at 183C and is not a goodchoice for high temperature applications. There are a number of high lead / low tincontent solders (95/5 and 90/10) which melt near 300C and can be useful attemperatures of 250C and less. The fatigue properties of these and other solders havebeen studied by CALCE in reference 11 among others.


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Improving Reliability With Multi-Chip Modules and ASIC IntegrationExperience indicates that most of the failures for a high temperature module will berelated to an interconnect, such as the solder connections to a board. The failure ratemodels in MIL-HDBK-217 on Reliability Prediction of Electronic Equipment indicate that theboard failure rate will be directly proportional to the number of solder connections. Thus,it would be advantageous to minimize the number of solder connections.

One method of minimizing the number of solder connections would be to utilize a Multi-Chip Module (MCM) in which most of the connections are inside the hermetic package.

As noted above, sealing 5 components with 40 leads each inside a single MCM packagewith 40 leads would reduce the interconnect failure rate by nearly 80%. In addition theuse of an MCM can add to the reliability of the high temperature system because of thesmaller size, lighter weight, reduced board size and connectors.

High temperature MCMs have been fabricated for two aircraft turbine engine applications.An example of the improvements possible with a MCM approach are shown in Table 4. InTable 4 an additional example of a down hole data acquisition system has been added asan example to indicated the savings potential for a typical down hole gauge electronics.MCMs labeled Case 1 and Case 2 are actual high temperature MCMs fabricated for

aircraft engine applications. The lower complexity MCM, Case 2, is also being presentedat this conference as an application paper for a vibration sensor. This MCM has passedtests for wire resonance (vibration), cover resonance, high voltage insulation resistance,residual gas analysis, impact shock (20gs, 11mS both directions, all axis), thermal shock(-65C to 150C), moisture resistance, salt atmosphere, wire bond strength, die andcapacitor bond strength. This MCM is currently being qualified at a higher assembly levelfor an application on a military aircraft engine program.

Data AcquisitionTurbine Engine

Case 1Turbine Engine

Case 2

SCP MCM SCP MCM SCP MCM

Number of Components 10 1 8 1 4 1

Number of Pins 264 64 469 64 39 9

Total Chip MTBF (Hours)1

82,000 82,000 97,000 97,000 1,500,000 1,500,000

Connections MTBF(Hours)

266,000 273,000 37,000 273,000 448,000 1,940,000

Board/MCM CombinedMTBF

36,600 63,000 27,000 71,600 345,000 848,000

MCM Improvement inMTBF

72% 166% 146%

Table 3- Multi-Chip Module MTBF Improvement Over Single Chip Package and BoardApproach.

1. Based on Reliability Database Projected to 150C2. Based on MIL-Hdbk-217

The use of higher levels of integration can be completed with the use of a gate arrayApplication Specific Integrated Circuit, or ASIC. Two mask programmable gate arrayshave been developed within the HTMOS family to provide higher levels of integration asdiscussed in reference 12. These products can significantly increase the reliability of thesystem by integrating several digital functions onto a single chip.


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Reliability ConclusionsA basic set of 15 Integrated Circuits has been developed specifically for reliable hightemperature operation. The integrated circuits have been targeted and demonstrated inaircraft turbine engine distributed control applications where lifetimes of 50,000 hours arerequired in harsh operating environments with temperatures reaching as high as 300Cfor short durations.

The introduction of these high temperature products coupled with reliable hightemperature passives, boards and solders offer a unique opportunity to significantlyincrease the reliability of instrumentation and data acquisition electronics. The variousintegrated circuits have undergone 250C life testing and a statistical database has beendeveloped to predict integrated circuit failures at temperature. The database can be usedas a predictor of reliability and expected failure rates in hot hostile environments such asthe applications shown in Table 1.

Additional levels of integration with improvements in reliability can be achieved byincluding digital ASICs, implemented in gate arrays and MCM packaging. Theseapproaches can significantly reduce the number of interconnects to the board increasingthe reliability at the board level by a factor of two or more. The addition of digital ASICs

and MCM packaging not only increases reliability but also reduces the overall size of thedata acquisition electronics. This two fold benefit can also help where small size is anattractive feature. When high temperature electronics are coupled with appropriatepassives, boards, and circuit packaging techniques the reliability of the system can beincreased to provide a high confidence of meeting system lifetime goals.

References1. P. Brusius, B. Gingerich, M. Liu, B. Ohme, and G. Swenson, Reliable High

Temperature SOI Process, Transactions of Second International Conference on HighTemperature Electronics, Charlotte, N.C. 1994, p II-15.

2. J. Suehle, P. Chaparala, C. Messick, W. Miller and K. Boyko, Field and Temperature

Acceleration of Time-Dependent Dielectric Breakdown in Intrinsic Thin SiO2, 1994International Reliability Physics Proceedings, p 120.

3. F. P. McCluskey, R. Grzybowski, and T. Podlesak, editors, High TemperatureElectronics, CRC Press, New York, NY, 1996, p 32.

4. P. Brusius, S.T. Liu, J. Kueng, B. Ohme, T. Fabian, SOI Devices for High TemperatureApplications, Transactions of Third International High Temperature ElectronicsConference, Albuquerque, Jun 1996, p XI-3.

5. P. Brusius, Some Reliability Aspects of High Temperature ICs, Transactions o fFourth High Temperature Electronics Conference, Albuquerque, Jun 1998, p 151.

6. J. Naefe, R.W. Johnson, and R. Grzybowski, High-Temperature Storage and ThermalCycling Studies of Thick Film and Wirewound Resistors, Transactions of Fourth HighTemperature Electronics Conference, Albuquerque, Jun 1998, p 191.

7. R. Grzybowski, Characterization and Modeling of Ceramic Multilayer Capacitors to500C and Their Comparison to Glass Dielectric Devices, Proceedings ThirteenthCapacitor and Resistor Technology Symposium, 1993, p 157.

8. R. Grzybowski, Long Term Behavior of Passive Components for High TemperatureApplications - an Update, Transactions of Fourth High Temperature ElectronicsConference, Albuquerque, Jun 1998, p 207.

9. J. Day and M. Roach, Ceramic Dielectric Performance Under High Temperature LifeTest, Transactions of Fourth High Temperature Electronics Conference,

Albuquerque, Jun 1998, p 181.


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10. C. A. Harper, editor, Handbook of Components for Electronics, McGraw-Hill, NewYork, NY, 1977, p 8-100.

11. P. Haswell, H. Choi, A. Dasgupta, Experimental and Analytical Durability Assessmentof High-Temperature, Fatigue-Resistant Solders, Part I: Constituitive Properties,Transactions of Fourth High Temperature Electronics Conference, Albuquerque, Jun1998, p 60.

12. C. Passow, B. Gingerich, G. Swenson, HT2000 High Temperature Gate Array,Transactions of Fourth High Temperature Electronics Conference, Albuquerque, Jun1998, p 219.


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