group #4 chapter 10 joel fraga jaime j.ocon deisy hernandez

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GROUP #4 GROUP #4 CHAPTER 10 CHAPTER 10 JOEL FRAGA JOEL FRAGA JAIME J.OCON JAIME J.OCON DEISY HERNANDEZ DEISY HERNANDEZ

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Page 1: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

GROUP #4GROUP #4CHAPTER 10CHAPTER 10

JOEL FRAGAJOEL FRAGA

JAIME J.OCONJAIME J.OCON

DEISY HERNANDEZDEISY HERNANDEZ

Page 2: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

What is an Instruction Set?What is an Instruction Set?

Also called a Also called a command setcommand set, the basic , the basic set of commands, or set of commands, or instructionsinstructions, , that a microprocessor understandsthat a microprocessor understands

Machine CodeMachine Code BinaryBinary Usually represented by assembly Usually represented by assembly

codescodes

Page 3: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Elements of an InstructionElements of an Instruction

Operation code: Specifies the operation to be Operation code: Specifies the operation to be performed (e.g.. ADD, I/O). The operation is performed (e.g.. ADD, I/O). The operation is specified by a binary code, known as the specified by a binary code, known as the operation code, or opcode. operation code, or opcode.

Source operand reference: The operation may Source operand reference: The operation may involve one or more source operands, that is, involve one or more source operands, that is, operands that are inputs for the operation. operands that are inputs for the operation.

Result operand reference: The operation may Result operand reference: The operation may produce a result. produce a result.

Next instruction reference: This tells the CPU Next instruction reference: This tells the CPU where to fetch the next instruction after the where to fetch the next instruction after the execution of this instruction is complete. execution of this instruction is complete.

Page 4: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instruction Cycle State Instruction Cycle State DiagramDiagram

Page 5: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instruction Cycle State Instruction Cycle State Diagram steps.Diagram steps.

Instruction address calculation (iac): Determine the address of the next Instruction address calculation (iac): Determine the address of the next instruction to be executed. Usually, this involves adding a fixed number instruction to be executed. Usually, this involves adding a fixed number to the address of the previous instruction. For example, if each to the address of the previous instruction. For example, if each instruction is 16 bits long and memory is organized into 16-bit words, instruction is 16 bits long and memory is organized into 16-bit words, then add 1 to the previous address. If, instead, memory is organized as then add 1 to the previous address. If, instead, memory is organized as individually addressable 8-bit bytes, then add 2 to the previous address. individually addressable 8-bit bytes, then add 2 to the previous address.

Instruction fetch (if): Read instruction from its memory location into the Instruction fetch (if): Read instruction from its memory location into the processor. processor.

Instruction operation decoding (iod): Analyze instruction to determine Instruction operation decoding (iod): Analyze instruction to determine type of operation to he performed and operand(s) to be used. type of operation to he performed and operand(s) to be used.

Operand address calculation (oac): If the operation involves reference to Operand address calculation (oac): If the operation involves reference to an operand in memory or available via I/O. then determine the address an operand in memory or available via I/O. then determine the address of the operand. of the operand.

Operand fetch (of): Fetch the operand from memory or read it in from Operand fetch (of): Fetch the operand from memory or read it in from I/O, I/O,

Data operation (do): Perform the operation indicated in the instruction. Data operation (do): Perform the operation indicated in the instruction. Operand store (os): Write the result into memory or out to I/O Operand store (os): Write the result into memory or out to I/O

Page 6: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instruction TypesInstruction Types

Data processing: Arithmetic and logic Data processing: Arithmetic and logic instructions instructions

Data storage: Memory instructions Data storage: Memory instructions Data movement: I/O instructions Data movement: I/O instructions

Control: Test and branch instructions Control: Test and branch instructions

Page 7: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Simple Instruction FormatSimple Instruction Format

Page 8: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Number of Addresses (a)Number of Addresses (a)

3 addresses3 addresses Operand 1, Operand 2, ResultOperand 1, Operand 2, Result a = b + c;a = b + c;

Three-address instruction formats are Three-address instruction formats are not common, because they require a not common, because they require a

relatively long instruction format to hold relatively long instruction format to hold the three address referencesthe three address references

Page 9: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Number of Addresses (b)Number of Addresses (b)

2 addresses2 addresses One address doubles as operand and resultOne address doubles as operand and result a = a + ba = a + b

The two-address formal reduces the space The two-address formal reduces the space requirement but also introduces some requirement but also introduces some

awkwardness. To avoid altering the value of awkwardness. To avoid altering the value of an operand, a MOVE instruction is used to an operand, a MOVE instruction is used to

move one of the values to a result or move one of the values to a result or temporary location before performing the temporary location before performing the

operation.operation.

Page 10: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Number of Addresses (c)Number of Addresses (c)

1 address1 address a second address must be implicit. a second address must be implicit.

This was common in earlier This was common in earlier machines, with the implied address machines, with the implied address being a CPU register known as the being a CPU register known as the accumulator. or AC. The accumulator accumulator. or AC. The accumulator contains one of the operands and is contains one of the operands and is used to store the result.used to store the result.

Page 11: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Number of Addresses (d)Number of Addresses (d)

0 (zero) addresses0 (zero) addresses Zero-address instructions are applicable Zero-address instructions are applicable

to a special memory organization, called to a special memory organization, called a Stack. A stack is a last-in-first-out set a Stack. A stack is a last-in-first-out set of locations.of locations.

c = a + bc = a + b

Page 12: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

How Many AddressesHow Many Addresses

Fewer addresses:Fewer addresses: Fewer addresses per instruction result in more primitive Fewer addresses per instruction result in more primitive

instructions, which requires a less complex CPU. instructions, which requires a less complex CPU. It also results in instructions of shorter length. On the other It also results in instructions of shorter length. On the other

hand, programs contain more total instructions, which in hand, programs contain more total instructions, which in general results in longer execution times and longer, more general results in longer execution times and longer, more complex programs complex programs

Multiple-address instructions:Multiple-address instructions: With multiple-address instructions, it is common to have With multiple-address instructions, it is common to have

multiple general-purpose registers. This allows some multiple general-purpose registers. This allows some operations to be performed solely on registers. operations to be performed solely on registers.

Because register references are faster than memory Because register references are faster than memory references, this speeds up execution.references, this speeds up execution.

Page 13: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Number of AddressNumber of Address

One of the ways of describing the processor architecture is by the number One of the ways of describing the processor architecture is by the number of addresses contained in each instruction.of addresses contained in each instruction.

The number of address can be from zero to four addresses, depending on The number of address can be from zero to four addresses, depending on the number of operations required.the number of operations required.

Number of Number of AddressesAddresses

Symbolic Symbolic RepresentationRepresentation InterpretationInterpretation

33 OP A, B, COP A, B, C AAB OP CB OP C

22 OP A, BOP A, B A A A OP BA OP B

11 OP AOP A AC AC AC OP AAC OP A

00 OPOP T T (T-1) OP T(T-1) OP T

Page 14: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instruction Sets DesignInstruction Sets Design

Instruction sets is the most interesting and analyzed aspect of a computer Instruction sets is the most interesting and analyzed aspect of a computer design.design.

The Instruction sets define the functions performed by the CPU and has The Instruction sets define the functions performed by the CPU and has significant effect on the implementation of the CPU.significant effect on the implementation of the CPU.

The design of Instruction Sets is complex because it affects many aspects The design of Instruction Sets is complex because it affects many aspects of the computerof the computer

The Instruction Sets are the programmer's means of controlling the CPU.The Instruction Sets are the programmer's means of controlling the CPU.

Page 15: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instruction Sets DesignInstruction Sets Design

The most fundamental Instructions Sets design issues are:The most fundamental Instructions Sets design issues are:

OPERATION REPERTOIRE: OPERATION REPERTOIRE: How many and which operations to provide, and how complex the operations should be.How many and which operations to provide, and how complex the operations should be.

DATA TYPES: DATA TYPES: The various types of data upon which operations are performed.The various types of data upon which operations are performed.

INSTRUCTION FORMATS: INSTRUCTION FORMATS: Instruction length, number of addresses, size of various fields.Instruction length, number of addresses, size of various fields.

REGISTERS: REGISTERS: Number of CPU registers that can be referenced by instructions, and their sizes.Number of CPU registers that can be referenced by instructions, and their sizes.

ADDRESSING:ADDRESSING: The mode or modes by which the address of an operant is specified.The mode or modes by which the address of an operant is specified.

Page 16: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperandsTypes of Operands

Operands are the part of a machine instruction that reference data or Operands are the part of a machine instruction that reference data or device. device.

In the general instruction: ADD B to AIn the general instruction: ADD B to A

A and B are the OperandsA and B are the Operands

ADD is the Operation codeADD is the Operation code

Page 17: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperandsTypes of Operands

The most important or general categories Operand data references are The most important or general categories Operand data references are described as follows:described as follows:

ADDRESSES: They are a form of data that is used for calculations in a ADDRESSES: They are a form of data that is used for calculations in a instruction to instruction to determine the main or virtual memory determine the main or virtual memory address.address.

NUMBERS: Numeric data types act as counters and other functions that NUMBERS: Numeric data types act as counters and other functions that require require nonnumeric data processing. nonnumeric data processing.

Three types of numerical data common on computers:Three types of numerical data common on computers: Integers or fixed pointIntegers or fixed point Floating points Floating points decimaldecimal

Page 18: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperandsTypes of Operands

CHARACTERS: A unique 7 bit data representation of characters used by CHARACTERS: A unique 7 bit data representation of characters used by computers. computers. The most commonly used characters codes is the The most commonly used characters codes is the IRA (International IRA (International Reference Alphabet) or the ASCII Code Reference Alphabet) or the ASCII Code (American Standard Code for (American Standard Code for Information Interchange) Information Interchange)

LOGICAL DATA: Is a n-bit unit of a word or other addressable selected for LOGICAL DATA: Is a n-bit unit of a word or other addressable selected for data data information. The selected unit consist of a 1-bit items of information. The selected unit consist of a 1-bit items of data. It data. It can be used for storing an array of a Boolean or binary can be used for storing an array of a Boolean or binary information information in which each item can only take the values of in which each item can only take the values of 1 (true) and 0 (false). 1 (true) and 0 (false).

Page 19: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Pentium Data TypesPentium Data Types

The Pentium Processors is capable of dealing with data types of 8 (byte), The Pentium Processors is capable of dealing with data types of 8 (byte), 16 (word), 32(doubleword), and 64 (quadword) bits in lenghts.16 (word), 32(doubleword), and 64 (quadword) bits in lenghts.

The byte, word, doubleword, and quadword are refered to as general data The byte, word, doubleword, and quadword are refered to as general data types.types.

The pentium processor also support an impressive array of specific data The pentium processor also support an impressive array of specific data types that are recognized and operated on by particular instructions. types that are recognized and operated on by particular instructions.

Page 20: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Pentium Data TypesPentium Data Types

Pentium Data types:Pentium Data types:

General: General: Byte word(16 bits), doubleworld(32 bits), and quadword(64 bits) locations with arbitrary binary contentsByte word(16 bits), doubleworld(32 bits), and quadword(64 bits) locations with arbitrary binary contents..

Intergers: Intergers: A signed binary value contained in a byte, word, or doubleword, using two complement representation.A signed binary value contained in a byte, word, or doubleword, using two complement representation.

Ordinal: Ordinal: An unsigned integer contained in a byte, word, or doubleword.An unsigned integer contained in a byte, word, or doubleword.

Umpacked Binary Code: Umpacked Binary Code: A representation of a BCD digit in the range 0 through 9, with one digit in each byte.A representation of a BCD digit in the range 0 through 9, with one digit in each byte.

Packed Binary Code: Packed Binary Code: Packed byte representation of two BCD digits, value range 0 to 99Packed byte representation of two BCD digits, value range 0 to 99..

Near Pointer: Near Pointer: A 32 bit effective address that represent the offset within a segment. Used for all pointers in a A 32 bit effective address that represent the offset within a segment. Used for all pointers in a nonsegmented nonsegmented memory and for references within segment in a segmented memory. memory and for references within segment in a segmented memory.

Bit Field: Bit Field: A continuous sequence of bits in which the position of each bit is considered as an independent unit. A continuous sequence of bits in which the position of each bit is considered as an independent unit.

Byte String: Byte String: A continuous sequence of bytes, words, or doublewords, containing form zero to 32 bytes.A continuous sequence of bytes, words, or doublewords, containing form zero to 32 bytes.

Floating Point: Floating Point: A set of data types that are used by the floating point unit and operated on by floating point instructionsA set of data types that are used by the floating point unit and operated on by floating point instructions

Page 21: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Pentium Data TypesPentium Data TypesPentium Numeric Data Format:Pentium Numeric Data Format:

Page 22: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Power PC Data TypesPower PC Data Types

The Power PC can support data types of 8 (byte), 16 (halfword), 32 (word) The Power PC can support data types of 8 (byte), 16 (halfword), 32 (word) and 64 (doubleword) bits in length.and 64 (doubleword) bits in length.

The byte, halfword, word, and doubleword are general data types.The byte, halfword, word, and doubleword are general data types.

The Power Pc can use either little endian or big endian style. That is, the The Power Pc can use either little endian or big endian style. That is, the last significant byte is stored in the lowest or highest address.last significant byte is stored in the lowest or highest address.

Page 23: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Power PC Data TypesPower PC Data Types

The Power PC Processor support the following data:The Power PC Processor support the following data:

UNSIGNED BYTE: UNSIGNED BYTE: Can be used for logical or interger arithmetic operations. It is loaded Can be used for logical or interger arithmetic operations. It is loaded from the from the memory into a general register by zero extending on the left to memory into a general register by zero extending on the left to the full register size.the full register size.

UNSIGNED HALFWORD: UNSIGNED HALFWORD: Used for 16 bit quantities of unsigned byte.Used for 16 bit quantities of unsigned byte.

SIGNED HALFWORD: SIGNED HALFWORD: Used for arithmetic operations. It is loaded into the memory by sign Used for arithmetic operations. It is loaded into the memory by sign extending extending on the left to full register size. on the left to full register size.

UNSIGNED WORD: UNSIGNED WORD: Used for logical operations and as an address pointer.Used for logical operations and as an address pointer.

SIGNED WORD: SIGNED WORD: Used for arithmetic operations.Used for arithmetic operations.

UNSIGNED DOUBLEWORD: UNSIGNED DOUBLEWORD: Used as an address pointer.Used as an address pointer.

BYTE STRING: BYTE STRING: Byte string extending from zero to 128 bytes in length.Byte string extending from zero to 128 bytes in length.

Page 24: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

The number of opcodes varies widely from machine to machine.The number of opcodes varies widely from machine to machine.

The same general types of operations are found on all machines.The same general types of operations are found on all machines.

General Types of Operations:General Types of Operations:

Data TransferData Transfer ArithmeticArithmetic Logical Logical ConversionConversion I/OI/O System ControlSystem Control Transfer of ControlTransfer of Control

Page 25: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

DATA TRANSFER:DATA TRANSFER:

It is the most fundamental type of machine instruction.It is the most fundamental type of machine instruction.

The Data Transfer Instructions must specify the following:The Data Transfer Instructions must specify the following:

Specify the location of the source and destination of the operands.Specify the location of the source and destination of the operands.

Indicate the length of data to be transferred.Indicate the length of data to be transferred.

Specify the mode of the of the addressing for each operand.Specify the mode of the of the addressing for each operand.

Page 26: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

ARITHMETIC:ARITHMETIC:

Provides the basic operations for addition, multiplication, and division.Provides the basic operations for addition, multiplication, and division.

Other possible arithmetic operations include a variety of single operands Other possible arithmetic operations include a variety of single operands instructions:instructions:

ABSOLUTELY: Takes the absolute value of the operand.ABSOLUTELY: Takes the absolute value of the operand.

NEGATE: Negates the operand. (-a)NEGATE: Negates the operand. (-a)

INCREMENT: Add 1 to the operand. (a++)INCREMENT: Add 1 to the operand. (a++)

DECREMENT: Subtract 1 from the operand. (a--)DECREMENT: Subtract 1 from the operand. (a--)

Page 27: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

LOGICAL:LOGICAL:

Logical operations provides a means of manipulating individual bits of a word or other Logical operations provides a means of manipulating individual bits of a word or other addressable units. Often call “Bit Twiddling”.addressable units. Often call “Bit Twiddling”.

The logical data manipulation is based upon Boolean operations or binary data as shown in the The logical data manipulation is based upon Boolean operations or binary data as shown in the following table: following table:

PP QQ NOT PNOT P P AND P AND QQ

P OR QP OR Q P XOR P XOR QQ

P = QP = Q

00 00 11 00 00 00 11

00 11 11 00 11 11 00

11 00 00 00 11 11 00

11 11 00 11 11 00 11

Page 28: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations In addition to Logical operations, most machines provides a variety of In addition to Logical operations, most machines provides a variety of

shifting and rotating functions, the most common ones are illustrated:shifting and rotating functions, the most common ones are illustrated:

The logical right shift moves the bits of words The logical right shift moves the bits of words

to the right. The last bit of data is lost.to the right. The last bit of data is lost.

The Logical left shift moves the bits of wordsThe Logical left shift moves the bits of words

to the left. The last bit of data is lost.to the left. The last bit of data is lost.

The arithmetic right shift treats the data The arithmetic right shift treats the data

assigned integers. The sign bit is replicated assigned integers. The sign bit is replicated

into the bit position to its right.into the bit position to its right.

The arithmetic left shift treats the data The arithmetic left shift treats the data

assigned integers. The sign bit is replicated assigned integers. The sign bit is replicated

into the bit position to its left. into the bit position to its left.

The rotate or cyclic changes the format or The rotate or cyclic changes the format or

operate on the format of data. Converting operate on the format of data. Converting

from decimal to binary.from decimal to binary.

Page 29: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

Example of Shifting and Rotating Example of Shifting and Rotating Operations:Operations: INPUTINPUT OPERATIONOPERATION RESULTRESULT

1010011010100110 LOGICAL RIGHT SHIFT (3 Bits)LOGICAL RIGHT SHIFT (3 Bits) 0001010000010100

1010011010100110 Logical left shift (3 Bits)Logical left shift (3 Bits) 0011000000110000

1010011010100110 Arithmetic right shift (3 Arithmetic right shift (3 Bits)Bits) 1111010011110100

1010011010100110 Arithmetic left shift (3 Arithmetic left shift (3 Bits)Bits) 1011000010110000

1010011010100110 Right Rotate (3 Bits)Right Rotate (3 Bits) 1101010011010100

1010011010100110 Left rotate (3 Bits)Left rotate (3 Bits) 0011010100110101

Page 30: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Types of OperationsTypes of Operations

CONVERSIONS:CONVERSIONS:

Conversion instructions are those that change the format or operate on the Conversion instructions are those that change the format or operate on the format of data.format of data.

An example is to convert from decimal to binary.An example is to convert from decimal to binary.

Page 31: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Instructions to transfer data Instructions to transfer data between an Input/Output and between an Input/Output and

the CPU or memory. the CPU or memory. It can be done by:It can be done by: Specific Instructions (I/O commands): A transfer in which only one Specific Instructions (I/O commands): A transfer in which only one

byte or word of information is moved by a given computer byte or word of information is moved by a given computer command (i.e. Control, Test, Read, Write) A terminal is an example command (i.e. Control, Test, Read, Write) A terminal is an example of a device that is normally capable of only this type of transferof a device that is normally capable of only this type of transfer..

Using data movement instructions (memory mapped). A computer Using data movement instructions (memory mapped). A computer that uses memory-mapped I/O, accesses hardware by reading and that uses memory-mapped I/O, accesses hardware by reading and writing to specific memory locations, using the same assembler writing to specific memory locations, using the same assembler language instructions that computer would normally use to access language instructions that computer would normally use to access memory.memory.

By a separate controller (DMA module: Direct Memory access). It is By a separate controller (DMA module: Direct Memory access). It is capable of mimicking the processor and takes over control of the capable of mimicking the processor and takes over control of the system from the processor. DMA module in effects steals a bus system from the processor. DMA module in effects steals a bus cycle. A disk is an example of a device that uses DMA.cycle. A disk is an example of a device that uses DMA.

Page 32: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Systems Control Instructions: Systems Control Instructions: control some basic element of the control some basic element of the

system or processor statesystem or processor state.. Most simple version of privilege states: Two states, “user” and Most simple version of privilege states: Two states, “user” and

“administrator” states. Some processors have more than two privilege “administrator” states. Some processors have more than two privilege states, allowing different levels of freedom to increasingly trusted states, allowing different levels of freedom to increasingly trusted operationsoperations..

Privileged InstructionsPrivileged Instructions: Typically are reserved for the use of the : Typically are reserved for the use of the operating system as a form of protection.operating system as a form of protection.

CPU needs to be in specific stateCPU needs to be in specific state

Ring 0: Is the level with the most privileges and interacts with the physical Ring 0: Is the level with the most privileges and interacts with the physical hardware such as the CPU and memory.hardware such as the CPU and memory.

Kernel mode (Supervisor or administrator mode): A program in supervisor Kernel mode (Supervisor or administrator mode): A program in supervisor mode is trusted never to fail. A failure may cause the whole computer mode is trusted never to fail. A failure may cause the whole computer system to crash.system to crash.

Page 33: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Example of privilege ring Example of privilege ring usage in a typical operating usage in a typical operating

system. system.

Page 34: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Transfer of Control Transfer of Control InstructionsInstructions

Branch Instruction: Also called a jump instruction. Has as one of its Branch Instruction: Also called a jump instruction. Has as one of its operands the address of the next instruction to be executed. operands the address of the next instruction to be executed.

e.g. go to x if result is zero. (conditional Branch)e.g. go to x if result is zero. (conditional Branch)

If a branch is always taken is an unconditional branch.If a branch is always taken is an unconditional branch. Skip Instruction: implies that one instruction be skipped; thus, the implied Skip Instruction: implies that one instruction be skipped; thus, the implied

address equals the address of the next instruction plus one instruction address equals the address of the next instruction plus one instruction length.length.

e.g. increment and skip if zeroe.g. increment and skip if zero

ADD AADD A

Branch xxxxBranch xxxx Subroutine call: these type of instructions typically modified the program Subroutine call: these type of instructions typically modified the program

code, modifying the address of a branch at a standard location so that it code, modifying the address of a branch at a standard location so that it behaved like an explicit return instruction.behaved like an explicit return instruction.

e.g. interrupt call e.g. interrupt call

Page 35: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Branch InstructionBranch Instruction

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Nested Procedure CallsNested Procedure Calls

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Use of Stack: Use of Stack: is an ordered set of is an ordered set of elements, only one of which can be elements, only one of which can be accessed at a time. Items may only be accessed at a time. Items may only be added or deleted from the top of the added or deleted from the top of the stack. stack.

Page 38: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Byte OrderByte Order

In computing, In computing, endiannessendianness is the byte (and sometimes bit) is the byte (and sometimes bit) ordering used to represent some kind of data. Typical cases are ordering used to represent some kind of data. Typical cases are the order in which integer values are stored as the order in which integer values are stored as bytesbytes in computer in computer memory (relative to a given memory addressing scheme) and the memory (relative to a given memory addressing scheme) and the transmission order over a network or other medium. When transmission order over a network or other medium. When specifically talking about bytes, endianness is also referred to specifically talking about bytes, endianness is also referred to simply as simply as byte orderbyte order..

Page 39: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Byte Order (example)Byte Order (example)

12345678 can be stored in 4x8bit locations12345678 can be stored in 4x8bit locationsas follows ;as follows ;

AddressAddress Value (1)Value (1) Value(2)Value(2) 184184 1212 7878 185185 3434 5656 186186 5656 3434 186186 7878 1212 Big endian Little endian Big endian Little endian i.e. read top down or bottom up?i.e. read top down or bottom up?

Page 40: GROUP #4 CHAPTER 10 JOEL FRAGA JAIME J.OCON DEISY HERNANDEZ

Review Questions?Review Questions?

1.1. What is an Instruction Set?What is an Instruction Set?

2.2. Explain each steps of the instruction set cycle?Explain each steps of the instruction set cycle?

3.3. How many general data types does processor support?How many general data types does processor support?

4.4. How many general data type the power PC processor support?How many general data type the power PC processor support?

5.5. What are the types of general operations found on majority of What are the types of general operations found on majority of computers?computers?

6.6. How are instruction types categorize?How are instruction types categorize?

7.7. What is the maximum number of addresses one might need in What is the maximum number of addresses one might need in an instruction?an instruction?

8.8. Which ways you can transfer data between I/O and the CPU?Which ways you can transfer data between I/O and the CPU?

9.9. What is the importance of the Kernel mode?What is the importance of the Kernel mode?

10.10. Explain the concept of Byte Order?Explain the concept of Byte Order?