fyse400 analog electronics - jyväskylän...

FYSE400 ANALOG ELECTRONICS

LECTURE 6

Small-Signal Analysis

1©Loberg University of Jyväskylä

SMALL-SIGNAL ANALYSISCE-stage With Emitter Resistance

2

RE increase the input resistance.

Lower voltage gain

Voltage gain depends on the resistances : RS , RE , RB and RC

ER

©Loberg University of Jyväskylä

CE-stage With Emitter Resistance Input resistance '

iR

Input resistance

V

iB

'

i RRR ====

SMALL-SIGNAL ANALYSIS

πVgm

πV πr

sV

sR

BR

CRor

rbI

iI bI 0rb ≈≈≈≈

oI

CB

EoV

iV

LR

0rb ≈≈≈≈ ∞∞∞∞≈≈≈≈or

3

b

ii

I

VR ====

(((( )))) E0i R1rR βπ ++++++++====

High input resistance with high RB value.'

iR

Small-signal equivalent circuit

'

iR iR'

oR

ER

oR


CE-stage With Emitter Resistance Output resistance oR


πVgm

πV πr

0V ====

sR

BR

CRor

rbI

iI bI 0rb ≈≈≈≈CB

E2V

R

iV

2I

roIeI

0RIrIV Eeoro2 ====−−−−−−−−

0VgII mro2 ====−−−−−−−− π

0III eb2 ====−−−−++++

(((( )))) 0RRIVRI BsbEe ====++++++++ π

0rIV b ====−−−− ππ

4


0Vs ==== ER

oR

0VgII mro2 ====−−−−−−−− π

(((( )))) (((( ))))[[[[ ]]]] (((( ))))EmoBsE

EBs

E0o

2

2o Rg1rrRRR

rRRR

R1r

I

VR ++++≈≈≈≈++++++++

++++++++++++======== π

π

β

Assumption:

πrRandRR EBs <<<<<<<<

⇒


πVgm

πV πrsR

BR

CRor

rbI

iI bI 0rb ≈≈≈≈CB

E2V

iV

2I

roI

Output resistance '

oRCE-stage With Emitter Resistance


5


0Vs ====

'

oR

ER

oR

CCo

'

o RRRR ≈≈≈≈====


Unloaded Voltage GainvA


CE-stage With Emitter Resistance

πVgm

πV πr

sV

sR

BR

CRor

rbI


oI

CB

EoV

R

iV

LR

0RVgV Cmo ====−−−− π

0RIRIV Brbsis ====−−−−−−−−

0III brbi ====−−−−−−−−

6


ER0III brbi ====−−−−−−−−

⇒

iBs

C0

Bs

Bv

RRR

R

RR

RA

++++++++−−−−====

β (((( )))) E0i R1rR βπ ++++++++====where

(((( )))) E0

C0

'

is

'

iv

R1r

R

RR

RA

ββ

π ++++++++

++++−−−−====

iB

'

i RRR ====whereOr





(((( )))) πβ rR1 E0 >>>>>>>>++++If we can write :and s

'

i RR >>>>>>>>

7

RL and ro are ignored

E

C

E

C

0

0v

R

R

R

R

1A −−−−≈≈≈≈

++++−−−−====

ββ



Loaded Voltage GainvA


πVgm

πV πr

sV

sR

BR

CRor

rbI


oI

CB

EoV

iV

LR

Parallel connection

8


ER

E

LC

vR

RRA −−−−≈≈≈≈

(((( ))))

++++++++++++

++++−−−−====

LC

L

E0

C0

'

is

'

iv

RR

R

R1r

R

RR

RA

ββ

πiB

'

i RRR ====where


iV'

iR+

--

+'

oR

ivVA oVRLVs

RS

(((( ))))[[[[ ]]]]E0B

'

i R1rRR βπ ++++++++====

C

'

o RR ≈≈≈≈


Loaded Voltage GainvA


9

Linear voltage model of the CE stage with RE

(((( ))))

++++++++++++

++++−−−−≈≈≈≈

L

'

o

L

E0

C0

'

is

'

iso

RR

R

R1r

R

RR

RVV

ββ

πiB

'

i RRR ====where


BJT Differential Stage


QBV

sV

QBVQBI obR

1oV 2oV

CRCR ++++V1iV 2iV

sV

1Q 2Q

10

idmdmicmcm1o VAVAV ++++====

idmdmicmcm2o VAVAV −−−−====

(((( ))))2i1iicm VV2

1V ++++====

(((( )))) id2i1iidm V2

1VV

2

1V ====−−−−====

QB

−−−−V

In general

Differential mode Common modeSpecial Cases

Constant current source IBIAS


Differential mode



1i2i VV −−−−====

0Vicm ====

ididm V2

1V ====

Unloaded Differential voltage gain Adm

ids V2

1V ====

1oV 2oV

2CR1CR ++++V1iV 2iV

ids V2

1V −−−−====

1Q 2Q

Ev

11

∞∞∞∞≈≈≈≈==== oS r0R

C2C1C RRR ========

No output load

2e1e ii ==== 0vE ====∆⇒

QBV

2

QBV

BQIobR

−−−−V

2

1eBQ iI2

1 ++++ 2eBQ iI2

1 −−−−


πVgm

πV πrids V2

1V ====

CR

2oV

CB

E

1oVCR

πVgm

E

πVπr ids V2

1V −−−−====

BCodV

Differential mode



1 1

Unloaded Differential voltage gain Adm

⇒ obRNo0vE ====∆

12

idmCmidCm1o VRgV2

1RgV −−−−====−−−−==== idmCmidCm2o VRgV

2

1RgV ========

(((( ))))2o1oodm VV2

1V −−−−====

Differential output voltage

(((( ))))2o1oocm VV2

1V ++++====

(((( )))) idmCm2o1oodm VRgVV2

1V −−−−====−−−−====


Cmodm

dm RgV

VA −−−−========

Differential modeSMALL-SIGNAL ANALYSIS

BJT Differential Stage Unloaded Differential voltage gain Adm

13

Cm

idm

dm RgV

A −−−−========




Common mode

ids V2

1V ====

1oV 2oV

2CR1CR ++++V1iV 2iV

ids V2

1V ====

1Q 2Q

Ev

1i2i VV ====

0Vidm ====

Unloaded Common mode voltage gain Acm

14

QBV

2

QBV

BQIobR

−−−−V

2

1eBQ iI2

1 ++++ 2eBQ iI2

1 ++++

2e1e ii ==== 0vE ≠≠≠≠∆

∞∞∞∞≈≈≈≈==== oS r0R

C2C1C RRR ========

No output load




Common mode

πVgm

πV πricms VV ====CR

CB

E

2o1o VV ====

CR

πVgm

E

πVπr icms VV ====

BC

ocmV

obR2 obR2eIeI

eV eV

Unloaded Common mode voltage gain Acm

15

(((( )))) eobob2e1ee IR2RIIV ====++++====icm

obm

Cm2o1o V

R2g1

RgVV

++++−−−−========

10 >>>>>>>>βwhen

ee

(((( ))))2o1oocm VV2

1V ++++====

obm

Cmcm

R2g1

RgA

++++−−−−====Unloaded Common mode

voltage gain Acm

⇒


obmdmidmodm Rg21

AVVCMRR ++++============

Common Mode Rejection Ratio



16

obm

cmicmocm

Rg21AVV

CMRR ++++============

Differential input/output resistance

See CE-stage with/without RE


++++++++−−−−====

++++====obm

icidCm

iciddm1o

Rg21

V

2

VRg

CMRR

V

2

VAV

++++−−−−====

−−−−−−−−==== icid

Cmicid

dm2oRg21

V

2

VRg

CMRR

V

2

VAV

Output voltages



idmdmicmcm1o VAVAV ++++==== idmdmicmcm2o VAVAV −−−−====In general

17

++++

−−−−====

−−−−−−−−====obm

Cmdm2oRg212

RgCMRR2

AV

2

VVA

2

VVAV 2i1i

cm2i1i

dm1o

++++++++−−−−====

2

VVA

2

VVAV 2i1i

cm2i1i

dm2o

++++++++−−−−−−−−====

OR


N1iV 0V 2i ====

2oVSingle-ended voltage

signals


BJT Differential Stage Example

18

IBIAS=505µA

A simple example circuit of the differential amplifier


sV

A505I µ==== R

1oV 2oV

CRCRV10V ====++++



19

A505IBQ µ==== obR

V10V −−−−====−−−−

Single-ended signals

0V 2i ==== (((( ))))dmcm1i1i

cm1i

dm2o AA2

V

2

0VA

2

0VAV −−−−====

++++++++−−−−−−−−====

⇒


221

11

21

2 Cm

obm

Cm

i

ov

Rg

Rg

Rg

V

VA ≈

+−==

⇒



A505I µ==== A251I 2CQ µ

Unloaded voltage gain Adm

20

A505IBIAS µ====

A251I 2CQ µ≈≈≈≈

mS65.9mV26

A251

V

Ig

th

2CQ

2m ============µ

dB7.395.96Rg2

1A Cmv ========≈≈≈≈


Ωk900R

mS4.19g

ob

3m

≈≈≈≈≈≈≈≈


BJT Differential Stage Example Unloaded voltage gain Adm

21

1106Rg21

1 5

ob2m

<<<<<<<<××××≈≈≈≈++++

−−−−


Simulated voltage gain Av versus frequency



dB2.39Av ====


constant====∂∂∂∂∂∂∂∂====

DSVGS

DSm

V

Ig

Transconductance gm

∂∂∂∂I1

Output resistance rd

Low-Frequency Model Of MOSFET

Q

ID

IDSQ slope=1/rd


23

(((( )))) (((( ))))DS

2

TOGSDS V1VVL

WkI λ++++−−−−

====Saturation RegionDSTOGS VVV <<<<−−−−

constant====∂∂∂∂∂∂∂∂====

GSVDS

DS

d V

I

r

1 VDS

VDDVDSQEarly voltage VA

DSvλ1


(((( ))))TOGS

VGS

DSm

VVL

Wk2

V

Ig

DS

−−−−

====∂∂∂∂∂∂∂∂====

====constant

Transconductance gm



24

Transconductance

depends on the VGS

DSQ

VGS

DSm I

L

Wk2

V

Ig

DS

====∂∂∂∂∂∂∂∂====

====constant0nC

2

1k µ====where

dmrg====µ

gm is high at saturation region and drops at triode region.

High gm

saturation region


Output resistance rd

(((( )))) λλµ DS

2

TOGSon

VDS

DS

d

IVVL

WC

2

1

V

I

r

1

GS

≈≈≈≈−−−−====∂∂∂∂∂∂∂∂====

====constant



25

VA

IDQ

0 VDS

ID Q

AV

1====λADQ VIslope ≈≈≈≈


Assumptions :

Ignored signal source resistance RS

Ignored bias resistance RB

External load resistance RL = ∞


Vgs

+D

RD

rd

-

Vo

S

G+

-Vi

+

-

+

-gsVµ

Id

Common Source Stage (CS-stage)

gsi VV ==== BS RR <<<<<<<<


26

dD

Dm

Dd

D

i

ov

rR1

Rg

Rr

R

V

VA

++++−−−−====

++++−−−−========

µ

oR 'oR

gsi VV ==== BS RR <<<<<<<<


Common Source Stage (CS-stage)

Vgs

+D

RD

rd

-

Vo

S

G+

-Vi

+

-

+

-gsVµId

Output resistance '

oR


27

oR 'oR

dDoD

'

o rRRRR ========


Common Source Stage (CS-stage) Input resistance iR

+Drd

VoG -gsVµ Id

Assumptions :



28

∞∞∞∞≈≈≈≈iR

Vgs

RD

-

Vo

S

G+

-Vi

+

-

+

-

iR


Input resistance '

iRCommon Source Stage (CS-stage)

To Gate

R1

R2

Vgs

+D

RD

rd

-

Vo

S

G+

-Vi

+

-

+

-gsVµ Id0RS ====


29

∞= Bi RR '

21B RRR ====

'

iR


Common Drain Stage (CD-stage) Voltage GainvA

Assumptions :

Ignored signal source resistance RS


External load resistance RL = ∞


Vgs

+

D

RSN

rd

V

S

G+

-Vi

+

-

+

-gsVµ Id

30

(((( )))) 11Rr

R

V

VA

SNd

SN

i

ov ≈≈≈≈

++++++++========

µµ

RSN

-

Vo


Output resistance '

oRCommon Drain Stage (CD-stage)

Vgs

+

D

RSN

rd

-

Vo

S

G+

-Vi

+

-

+

-gsVµ Id


31

(((( ))))[[[[ ]]]]

(((( )))) mSNd

dSN

dSNoSN

'

o

g

1

1Rr

rR

1/rRRRR

≈≈≈≈++++++++

====

++++========

µ

µ

mSN g1Rand1 >>>>>>>>>>>>>>>>µ

-

oR 'oR


Input resistance iR

Common Drain Stage (CD-stage)

Vgs

+

D

R

rd

V

S

G+

-Vi

+

-

+

-gsVµ Id

Assumptions :



32

∞∞∞∞≈≈≈≈iR

RSN

-

Vo

iR


Input resistance '

iRCommon Drain Stage (CD-stage)

Vgs

+

D

RSN

rd

Vo

S

G+

-Vi

+

-

+

-gsVµ Id

BR

To Gate

R1

R2


33

∞= Bi RR '

RSN

-

Vo

'

iR

BR


A simple example circuit of the MOSFET amplifier

DG

VDD

C1

RDR1Voltage gain Av ?

Output resistance ? '

oR


34

S

VoVs

RS

RSN

C2

R2

o

Input resistance ? '

iR


D

S

G

VDD

RS

C1

C2

RDR1

Vgs

+

D

RSN

-

Vo

S

G+

-Vs

+

-

+

-gsmVg

Id

RD

RB

RS

IS



35

VoVs RSNR2

-

oR 'oR'

iRSmall-signal equivalent circuit

Assumptions :

∞∞∞∞≈≈≈≈dr

External load resistor∞∞∞∞≈≈≈≈LR


++++++++====

BS

B

SNm

sgs

RR

R

Rg1

VV

++++++++====

BS

B

SNm

SNmso

RR

R

Rg1

RgVV

Voltage GainvA

Vgs

+

D

RSN

-

Vo

S

G+

-Vs

+

-

+

-gsmVg

Id

RD

RB

RS

IS



36

⇒

++++++++====

BS

B

SNm

SNmv

RR

R

Rg1

RgA

Compare CD-stage

when

∞∞∞∞≈≈≈≈∞∞∞∞≈≈≈≈ Bd Randr


-

oR 'oR'

iR


Output resistance '

oR

Assumption :

∞≈dr

++++++++====

BS

B

SNm

SNmv

RR

R

Rg1

RgA

Vgs

+

D

RSN Vo

S

G+

-Vs

+

-

+

-gsmVg

IdRD

RB

RS

IS

Isc

R



37

-

oR'

oRBS

Bmssc

RR

RgVI

++++====

oSNmSN

SNm

SN

sc

sv

sc

o'

o RRg1RRg1

R

I

VA

I

VR ========

++++============


Vgs

+

D

R

S

G+

-Vs

+

-

+

-gsmVg

IdRD

R

RS

IS

Input resistance '

iR



38

RSN

-

VoRB

'

iR

∞= Bi RR '21B RRR ====


1iV'

1iR+

--

+'

1oR

1i1v VA 1oV

Linear model of the

CE-stage 1

Vs1

RS1

2iV'

2iR+

--

+'

2oR

2i2v VA 2oV

Linear model of the

CE-stage 2

RL2

Two cascaded CE-stagesCascaded Stages


39

Vs2

RS2

2S

'

1o RR ====

2s1v1i1v'

1i1s

'

1i1s VAVA

RR

RV ========

++++

Calculate first

1i

1o1v

V

VA ====Unloaded voltage gain

Output resistance'

1oR

Input resistance'

1iR


1iV'

1iR+

--

+'

1oR

i1v VA 1oV

Linear model of the

CE stage 1

Vs1

RS1

iV'

2iR+

--

+'

2oR

i2v VA 2oV

Linear model of the

CE stage 2

RL2

Cascaded Stages


Two cascaded CE-stages

40

Vs2

RS2

2iV'

2iR+

--

+'

2oR

2i2v VA2oV

Linear model of the

CE stage

RL2

Connect the linear model of the first

amplifier to the input of second amplifier.

Then calculate the second stage with

external load RL2

'

2oR

2o

2L

'

2o

2L2v'

2i2s

'

2i2s V

RR

RA

RR

RV ====

++++

++++

'

2iR 2vACalculate


Cascaded FET-stages

CS-CS

CS-CD

CS-CG Cascode (CS , Common Gate cascade)

Cascaded Stages



CE-CB Configuration (Cascode circuit)

πrR

VI

S

s1b ++++

====Base current of

the transistor Q1

Assumptions :

1and 0201 >>>>>>>>ββ

Compound Transistor Stages


Vo

+

-

Io

Ic1 Ie2Ic2Ib1

RSVs

+

-

CE-stage CB-stage

CRQ1 Q2

42

Collector current of the transistor Q1 2e1b01c III −−−−======== βThe current gain of the common-base

stage is unity when β0 is high. (((( )))) 2eo I1I −−−−≈≈≈≈ 10 bo II β≈⇒

0RIV Coo ====++++

πrR

VI

S

s1b ++++

====

1b0o II β≈≈≈≈

⇒π

βrR

RA

S

Cv +

−≈ 0 Voltage gain of the CE-stage with

higher band width.


An example of cascode amplifier

mA1II 2CQ1CQ ≈≈≈≈====

Ωk2002R1R ≈≈≈≈

Ω10385.0I

gCQ ≈≈≈≈≈≈≈≈

+

CB-stage

Vcc

10kΩ1.9MΩ 16kΩ

R1

R3

RC

C3

C2



43

Ω10385.0mV26

Ig

CQ

m ≈≈≈≈≈≈≈≈

2100 ≈≈≈≈β

Ωk45.5g

rm

0 ≈≈≈≈====β

π

Vo

-

RS=0

Vs

+

-

CE-stage

with RE

500224kΩ 4.2kΩR2 R4

RE

C1


+

CB-stage

Vcc

10kΩ1.9MΩ 16kΩ

R1

R3

RC

C3

C2

Input resistance of CB-stage: Ω26g

1R

m

iCB ≈≈≈≈====

Voltage gain of the CE-stage:

(((( ))))2

0E

iCB01v 1092.4

1Rr

RA −−−−××××−−−−≈≈≈≈

++++++++−−−−====

ββ

π

Note !

This is a loaded

An example of cascode amplifierCompound Transistor Stages


44

Vo

-

RS=0

Vs

+

-

CE-stage

with RE

500224kΩ 4.2kΩR2 R4

RE

C1

C3

Total voltage gain :

dBAAA vvvtot 5.258.1821 ≈−≈=

Voltage gain of the CB-stage:

383R

RA

iCB

C2v ≈≈≈≈≈≈≈≈ Note !

RS is set zero

This is a loaded

gain


(((( ))))0E

iCB01v

1Rr

RA

ββ

π ++++++++−−−−====

iCB

C2v

R

RA ≈≈≈≈


Compound Transistor Stages An example of cascode amplifier

45

⇒(((( )))) (((( ))))0E

C0

iCB

C

0E

iCB02v1v

1Rr

R

R

R

1Rr

RAA

ββ

ββ

ππ ++++++++−−−−====

++++++++−−−−====

Same as voltage gain of the CE-stage with

emitter resistance RE.


CC-CC Cascade (Darlington pair)

Q1

+

Ic1

Ic2

Ib1

Ic

Q2

I

2c1cc III ++++====

(((( )))) 1b002b02c I1II βββ ++++========

⇒



46

IEE

Composite

transistor

Ib2

(((( ))))(((( )))) 1b

2

01b00

1b01b00C

II2

II1I

ββββββ

≈≈≈≈++++====

++++++++====

⇒

2

0C0 ββ ≈≈≈≈Current gain of the

composite transistor

Darlington transistor is most often used as

an emitter follower.

Av 1


The End of Part 6

47

The End of Part 6


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