electric vehicle battery charging and low voltage grid

Electric Vehicle Battery Charging and Low

Voltage Grid Implications

A thesis submitted to The University of Manchester for the degree of

Doctor of Philosophy

In the Faculty of Science and Engineering

2017

Bryan Savage

School of Electrical and Electronic Engineering

2

Table of Contents

Table of Contents ................................................................................................................................ 2

Table of Figures .................................................................................................................................. 7

List of Tables ..................................................................................................................................... 12

Abstract ............................................................................................................................................. 13

Declaration ........................................................................................................................................ 14

Copyright statement .......................................................................................................................... 14

Acknowledgements ........................................................................................................................... 15

1. Introduction ................................................................................................................................ 17

1.1 EV background .................................................................................................................. 17

1.2 EV’s, power levels and connectors ................................................................................... 18

1.3 Vehicle to grid background ................................................................................................ 20

1.4 Project outline.................................................................................................................... 21

1.5 Project aims, motivation and objectives ............................................................................ 22

1.5.1 Project motivation ................................................................................................... 22

1.5.2 Project aims ............................................................................................................. 23

1.5.3 Project objectives .................................................................................................... 23

1.5.4 Original material ...................................................................................................... 23

1.6 Thesis outline .................................................................................................................... 24

2. Charger topology literature review ............................................................................................ 25

2.1 Ideal battery charger ......................................................................................................... 25

2.2 Battery charger survey and review ................................................................................... 25

2.1.1. Single and 3 phase diode bridge ............................................................................. 26

2.1.2 Single and 3 phase Half Bridge rectifier .................................................................. 27

2.1.3 PWM rectifier .......................................................................................................... 28

2.1.4 Boost Converter ...................................................................................................... 29

2.2.1 Forward Converter .................................................................................................. 33

2.2.2 Push Pull converter ................................................................................................. 34

2.2.3 Flyback Converter .................................................................................................... 35

2.1.10 Vienna rectifier ........................................................................................................ 36

2.1.11 Swiss rectifier .......................................................................................................... 37

2.3.1 Dual active bridge .................................................................................................... 38

3

2.1.15 Summary ................................................................................................................. 40

3. Flyback snubbers - literature survey and review ....................................................................... 43

3.1 Dissipative Snubbers ............................................................................................... 43

3.1.2 Non polarized snubbers .......................................................................................... 43

3.1.2.1 RC snubber .............................................................................................................. 43

3.1.3 Polarized snubbers .................................................................................................. 44

3.1.3.1 RCD snubber ............................................................................................................ 44

3.1.4 Unconventional dissipative snubbers ..................................................................... 44

3.1.4.1 RCD-R snubber ........................................................................................................ 45

3.1.4.2 Dual dissipative snubber ......................................................................................... 45

3.1.5 Non dissipative snubbers ........................................................................................ 45

3.1.6 Conventional diode clamp snubber ........................................................................ 46

3.1.6.1 Diode clamp snubber variation ............................................................................... 46

3.1.6.2 Basic capacitor clamp snubber ................................................................................ 47

3.1.7 Active clamp snubber .............................................................................................. 48

3.1.7.1 Active clamp variations ........................................................................................... 49

3.1.8 LCDD snubber .......................................................................................................... 51

3.1.8.1 Dual LCDD snubber .................................................................................................. 52

3.1.8.2 Transformer wound LCDD snubber ......................................................................... 53

3.1.8.3 Flyback LCDD snubber ............................................................................................. 53

3.1.9 Transformer dual switch snubber ........................................................................... 54

3.1.10 Other non-dissipative snubber designs ................................................................... 55

3.1.10.1 Dual transformer snubber ....................................................................................... 55

3.1.10.2 Single-stage snubber ............................................................................................... 56

3.1.11 Summary ................................................................................................................. 56

4. Flyback DC-DC converter design.............................................................................................. 58

4.1 Initial flyback design .......................................................................................................... 58

4.2 Flyback snubber configurations ........................................................................................ 63

4.2.1 Petkov snubber circuit ............................................................................................ 64

4.2.2 LLCC circuit ............................................................................................................. 66

4.2.2.1 Coupled inductor LLCC circuit ................................................................................. 69

4.2.3 Centre inductor circuit ............................................................................................ 71

4.2.3 RC LLCC snubber circuit ........................................................................................... 73

4.2.5 Circuit optimisation ................................................................................................. 74

4

4.2.6 Simulation optimisation .......................................................................................... 76

4.2.7 Final circuit .............................................................................................................. 78

4.2.8 3 phase configuration .............................................................................................. 79

4.3 Initial transformer design ................................................................................................... 80

4.3.1 Transformer theory ................................................................................................. 80

4.3.2 Transformer core material ...................................................................................... 81

4.3.3 Transformer design ................................................................................................. 82

4.3.4 Transformer FEMM simulation ............................................................................... 84

4.3.5 Transformer Leakage investigation ......................................................................... 86

4.3.6 Revised transformer design and interleaving ......................................................... 89

4.3.7 Transformer testing ................................................................................................. 95

4.4 Device comparison ............................................................................................................ 96

4.4.1 Calculating IGBT losses ............................................................................................ 96

4.4.2 Calculating IGBT conduction losses ......................................................................... 97

4.4.3 Calculating IGBT body diode conduction losses ...................................................... 98

4.4.4 Calculating IGBT switching losses ............................................................................ 99

4.4.5 Calculating IGBT body diode switching losses ....................................................... 101

4.4.6 Calculating IGBT total losses ................................................................................. 101

4.4.7 Calculating MOSFET losses .................................................................................... 102

4.4.8 Calculating MOSFET conduction losses ................................................................. 102

4.4.9 Calculating MOSFET body diode conduction losses .............................................. 102

4.4.10 Calculating MOSFET switching losses .................................................................... 103

4.4.11 Calculating MOSFET body diode switching losses ................................................. 104

4.4.12 Calculating MOSFET total losses ........................................................................... 104

4.4.13 IGBT and MOSFET comparison .............................................................................. 104

4.5 Capacitor lifetime study ................................................................................................... 106

4.5.1 Capacitor types ...................................................................................................... 106

4.5.2 Capacitor lifetime comparison .............................................................................. 108

4.5.2.1 AVX Corporation .................................................................................................... 108

4.5.2.2 Cornell Dubilier ...................................................................................................... 109

4.5.2.3 Illinois Cap ............................................................................................................. 110

4.5.3 Failures in time ...................................................................................................... 111

4.5.4 Conclusions ........................................................................................................... 113

4.6 Thermal considerations ................................................................................................... 113

5

4.6.1 Basic thermal circuit .............................................................................................. 114

4.6.2 Thermal insulation ................................................................................................ 114

4.6.3 Choice of cooling ................................................................................................... 115

4.6.4 Proposed cooling setup ......................................................................................... 118

4.6.5 Conclusion ............................................................................................................. 119

4.6.6 Advanced thermal modelling ................................................................................ 119

4.6.7 Foster thermal network ........................................................................................ 120

4.6.8 Cauer thermal network ......................................................................................... 122

4.6.9 Applying the Cauer model to the simulation model ............................................. 125

4.6.10 Conclusion ............................................................................................................. 126

4.7 AC input filter design ....................................................................................................... 127

4.7.1 Power Quality Standards ....................................................................................... 127

4.7.2 AC input filter design ............................................................................................. 128

4.7.3 Conclusions ........................................................................................................... 131

4.8 Control system ................................................................................................................ 132

4.8.1 Conclusions ........................................................................................................... 134

4.9 Additional circuits ............................................................................................................ 135

4.9.1 Gate drive circuit ................................................................................................... 135

4.9.2 Short circuit protection system ............................................................................. 135

4.9.3 Soft start circuit ..................................................................................................... 136

4.9.4 Output circuit ........................................................................................................ 136

4.10 Design Conclusions ........................................................................................................ 138

5. Fabrication of components and test rig ................................................................................... 139

5.1 Design of power stage PCB ............................................................................................ 139

5.2 Design of gate drive PCB ................................................................................................ 141

5.3 Transformer construction ................................................................................................ 143

5.4 Input filter construction .................................................................................................... 144

5.5 Cooling Rig design .......................................................................................................... 145

5.6 Final test rig images ........................................................................................................ 146

6. Results .................................................................................................................................... 150

6.1 Simulation results ............................................................................................................ 150

6.1.1 340 Vac to 320 Vdc Simulation ............................................................................. 150


6



6.2 Experimental test results ................................................................................................. 162

6.2.1 340 Vac to 320 Vdc prototype test ....................................................................... 162




6.3 Output power and Efficiency ........................................................................................... 172

6.4 Conclusions ..................................................................................................................... 172

7. Conclusions ............................................................................................................................. 174

7.1 Future improvements ...................................................................................................... 175

8. References .............................................................................................................................. 177

Final word count: 47,398

7

Table of Figures

Figure 1 - Typical battery charging profile ......................................................................................... 21

Figure 2 - Basic full bridge (a) Isolated full bridge (b) [28] [29] ......................................................... 27

Figure 3 - Basic 3 phase full bridge converter [30] ........................................................................... 27

Figure 4 - Basic half bridge (a) [29] , Isolated half bridge (b) [31]..................................................... 28

Figure 5 - 3 phase, half bridge converter .......................................................................................... 28

Figure 6 - Single phase PWM bridge rectifier [33] ............................................................................ 29

Figure 7 - Three phase PWM bridge rectifier [33] ............................................................................. 29

Figure 8 - Single and 3 phase Boost converter chargers ................................................................. 30

Figure 9 - Full bridge Boost PFC converter charger [34] .................................................................. 30

Figure 10 - Interleaved PFC Boost converter [36] ............................................................................ 31

Figure 11 - Active full bridge interleaved PFC boost converter [37] ................................................. 31

Figure 12 - Bridgeless PFC boost converter [41] .............................................................................. 31

Figure 13 - Single and 3-phase, voltage controlled active rectifier [45] ............................................ 32

Figure 14 - Single and 3-phase, current controlled active rectifier [46] ............................................ 33

Figure 15 - Basic forward converter topology [29] ............................................................................ 33

Figure 16 - Active clamp forward converter ...................................................................................... 34

Figure 17 - Forward Flyback converter [47] ...................................................................................... 34

Figure 18 - Basic push pull converter ............................................................................................... 35

Figure 19 - interleaved push pull converter [29]................................................................................ 35

Figure 20 - Basic flyback converter [48] ............................................................................................ 36

Figure 21 - Interleaved Flyback boost circuit [49] ............................................................................. 36

Figure 22 - Vienna rectifier [50] ......................................................................................................... 37

Figure 23 - Circuit topology of buck-type Swiss rectifier [50] ............................................................ 37

Figure 24 - Dual active bridge (a) with resonance (b) modified transformer (c) active bridge

transformer (d) half bridge ................................................................................................................. 38

Figure 25 - Dual battery charger ....................................................................................................... 39

Figure 26 - Resonant dual active bridge converter ........................................................................... 40

Figure 27 - Two switch flyback topology ........................................................................................... 40

Figure 28 - RC turn off snubber ........................................................................................................ 44

Figure 29 - RCD turn off snubber ...................................................................................................... 44

Figure 30 - RCD-R turn off Snubber ................................................................................................. 45

Figure 31 - Dual switch RCD snubber .............................................................................................. 45

Figure 32 - Conventional diode clamp snubber ................................................................................ 46

Figure 33 - Diode clamp variation ..................................................................................................... 47

Figure 34 - Basic capacitor clamp snubber ....................................................................................... 48

Figure 35 - Active clamp configurations, top: N-type clamp, bottom: P-type clamp ......................... 49

Figure 36 - Active clamp with auxiliary ZVS circuit ........................................................................... 50

Figure 37 - Transformer active clamp ............................................................................................... 50

8

Figure 38 - LCDD single switch snubber .......................................................................................... 51

Figure 39 - Dual LCDD snubber ....................................................................................................... 52

Figure 40 - Transformer wound LCDD .............................................................................................. 53

Figure 41 - Flyback LCDD snubber .................................................................................................. 54

Figure 42 - Transformer dual switch snubber ................................................................................... 54

Figure 43 - Dual transformer snubber ............................................................................................... 55

Figure 44 - single stage snubber ...................................................................................................... 56

Figure 45 - Worst case operation ...................................................................................................... 59

Figure 46 - Representation of power transferred at output ............................................................... 59

Figure 47 - Basic flyback topology .................................................................................................... 60

Figure 48 - Basic flyback waveforms showing primary current (I1), secondary current (I2), and switch

voltage ............................................................................................................................................... 60

Figure 49 - Two switch flyback topology ........................................................................................... 61

Figure 50 - Two switch flyback waveforms showing primary current (I1), secondary current (I2), and

switch voltage (Vsw) ......................................................................................................................... 61

Figure 51 - Petkov flyback topology with regenerative snubbers highlighted ................................... 62

Figure 52 - Flyback with Petkov snubbers waveforms showing primary current (i1), secondary current

(i2), snubber inductor current (iLs), switch voltage (Vsw) and snubber capacitor voltage (Vcs) ...... 63

Figure 53 - Two switch flyback topology (separate flybacks highlighted) ......................................... 63

Figure 54 - Petkov snubber ............................................................................................................... 64

Figure 55 - Petkov snubber waveforms showing primary current (I1), secondary current (I2),

transformer current (It) and switch voltages at the peak (960V) and settling voltage (680V) ........... 65

Figure 56 - Petkov snubber input power (top) and ouptut power (bottom) ....................................... 65

Figure 57 - LLCC snubber circuit ...................................................................................................... 66

Figure 58 - Key waveforms detailing the operation of the converter (not to scale) .......................... 67

Figure 59 - LLCC snubber switching waveforms .............................................................................. 68

Figure 60 - LLCC snubber input power (top) and output ower (bottom) ........................................... 69

Figure 61 - Coupled inductor LLCC design ....................................................................................... 69

Figure 62 - Switching waveforms for wound inductor LLCC ............................................................. 70

Figure 63 - Coupled inductor snubber input power (top) and output power (bottom) ....................... 70

Figure 64 - Centre inductor circuit ..................................................................................................... 71

Figure 65 - Switching waveforms for centre inductor circuit ............................................................. 72

Figure 66 - Centre inductor snubber input power (top) and output power (bottom) ......................... 72

Figure 67 - RC snubbers for, Snubber inductors, transistor switch and output diode ...................... 73

Figure 68 - RC LLCC snubber results ............................................................................................... 73

Figure 69 - RC LLCC snubber input power (top) and output power (bottom) ................................... 74

Figure 70 - Snubber capacitor sensitivity study showing primary current (top), secondary current

(middle) and switch voltage (bottom) as the snubber capacitor value is changed ........................... 75

Figure 71 - Snubber inductance sensitivity study showing primary current (top), secondary current

(middle) and switch voltage (bottom) as the snubber inductor value is changed ............................. 76

9

Figure 72 - 100nF capacitor impedance, capacitance in uF (top) and resistance in mΩ (bottom)

against frequency .............................................................................................................................. 77

Figure 73 - Final half phase design with parasitic elements highlighted (green elements belong to

snubber inductors, blue elements belong to the main snubber capacitors, red elements belong to

auxiliary snubber capacitors) ............................................................................................................ 78

Figure 74: Final design switching waveforms ................................................................................... 79

Figure 75 - Transformer equivalent circuit [102] ............................................................................... 80

Figure 76 - Cosmo CF139 core. Standard E100 size (left) and reduced cores (right) ..................... 82

Figure 77 - Transformer construction ................................................................................................ 82

Figure 78 - Magnetic circuit of the transformer showing MMF and reluctance ................................. 84

Figure 79 - Cosmo CF139, BH characteristic at 100°C .................................................................... 85

Figure 80 - FEMM model of the transformer ..................................................................................... 85

Figure 81 - FEMM model result showing average flux at the airgap ................................................ 86

Figure 82 - Core configuration and measurements used for Rogowski method. ............................. 87

Figure 83 - FEMM model result the magnetic field energy in the green area ................................... 89

Figure 84 - Transformer showing interleaving winding distribution................................................... 90

Figure 85 - Levels of transformer interleaving showing the windings both split into 3 groups and

wound on the core ............................................................................................................................. 91

Figure 86 - Leakage inductance at specified turns ratios and levels of interleaving ........................ 92

Figure 87 - FEMM simulation of 22/14 turns ratio showing flux above 325mT ................................. 92

Figure 88 - Effect of interleaving on Leakage inductance, simulated result against calculated result

.......................................................................................................................................................... 93

Figure 89 - Effect of interleaving on Leakage inductance, Calculated, Simulated and Measured

results ................................................................................................................................................ 94

Figure 90 - Final winding distribution ................................................................................................ 95

Figure 91 - Typical conduction characteristic of SGP20N60 at Tj =150°C showing the choice of gate

voltage (left) and the interpolation of the 15V curve to find RCE (right) [98] ...................................... 97

Figure 92 - Typical diode forward current against forward voltage [98] ............................................ 99

Figure 93 - Interpolation of switching losses. Turn off (left) Turn on (Right) [98] ............................ 100

Figure 94 - Representation of the gate-drain capacitance [118] .................................................... 103

Figure 95 - AVX Ceramic and Film capacitor lifetime against temperature .................................... 109

Figure 96 - Cornell Dubilier Film and Electrolytic capacitor lifetime against temperature .............. 110

Figure 97 - Illinois Capacitor Film and Electrolytic capacitor lifetime against temperature ............ 111

Figure 98 - FITs for Ceramic, Film and Aluminium Electrolytic ....................................................... 113

Figure 99 - Basic thermal circuit (left), Thermal circuit with insulation (right) ................................. 114

Figure 100 - Thermal resistance of insulation against size of insulation ........................................ 115

Figure 101 - Thermal network for air cooled heatsink .................................................................... 116

Figure 102 - Thermal network for liquid cooled heatsink ................................................................ 117

Figure 103 - Radiator characteristics. Cooling effect per tube (left) and Correction factor for air flow

speed (right) .................................................................................................................................... 118

10

Figure 104 - 3D model of proposed cooling setup .......................................................................... 119

Figure 105 - Transient thermal network (Cauer model) .................................................................. 120

Figure 106 - Foster thermal model .................................................................................................. 120

Figure 107 - Transient thermal resistance curve for single pulse ................................................... 121

Figure 108 - Calculated Foster model ............................................................................................. 121

Figure 109 - Datasheet (blue) and calculated (red) curves for thermal impedance ....................... 122

Figure 110 - Foster thermal model (left) and response (right) in SIMetrix ...................................... 122

Figure 111 - Cauer thermal model .................................................................................................. 123

Figure 112 - Calculated Cauer model ............................................................................................. 123

Figure 113 - Foster thermal model (left) and response (right) in SIMetrix ...................................... 124

Figure 114 - Datasheet (blue), calculated (red), Foster response (green) and Cauer response

(purple) curves for thermal impedance ........................................................................................... 125

Figure 115 - Single switch thermal setup ........................................................................................ 126

Figure 116 - Overall temperature rise ............................................................................................. 126

Figure 117: Junction temperature (top), Power dissipated (middle) Switching waveforms (bottom)

........................................................................................................................................................ 127

Figure 118 - AC input voltage (above) and current (below) waveforms ......................................... 129

Figure 119 - LC filter simulation test circuit ..................................................................................... 129

Figure 120 - Frequency spectrum for unfiltered AC current ........................................................... 130

Figure 121 - Filtered AC input voltage (above) and current (below) waveforms ............................ 131

Figure 122 - Frequency spectrum for filtered AC current (insert – spectra magnitudes below 4kHz)

........................................................................................................................................................ 132

Figure 123 - 3 phase switching waveforms (D=10%) ..................................................................... 133



Figure 126 - Gate drive circuit ......................................................................................................... 135

Figure 127 - Output protection design ............................................................................................ 136

Figure 128 - Soft start circuit ........................................................................................................... 136

Figure 129 - Complete output circuit ............................................................................................... 137

Figure 130: Power boards with devices arranged along the length (left) and along the width (right)

........................................................................................................................................................ 140

Figure 131: 3D Layout of power boards on heatsink, 3 underneath not shown ............................. 141

Figure 132 - Absorption loss in various shielding thicknesses ....................................................... 142

Figure 133 - Gate drive PCB in Altium ............................................................................................ 142

Figure 134 - 3D layout of Gate drive circuits ................................................................................... 143

Figure 135 - Transformer mounting ................................................................................................ 144

Figure 136 - Input filter and small circuit mounting ......................................................................... 145

Figure 137 - Rig technical views with radiator (left most) and fan (right most) ............................... 145

Figure 138 - Transformer construction ............................................................................................ 146

Figure 139 - Transformer side ........................................................................................................ 146

11

Figure 140 - Input filter side ............................................................................................................ 147

Figure 141 - Power stage with gate drive ....................................................................................... 147

Figure 142 - Power stage without gate drive .................................................................................. 148

Figure 143 - Cooling system ........................................................................................................... 148

Figure 144 - 3D image of constructed charger ............................................................................... 149

Figure 145 - 3D image of constructed charger ............................................................................... 149

Figure 146 - 340 Vac to 320 Vdc, simulated AC input results ........................................................ 151

Figure 147 - 340 Vac to 320 Vdc current harmonic spectra (low frequency upper right) ............... 152

Figure 148 - 340 Vac to 320 Vdc simulated switching results ........................................................ 153


Figure 150 - 340 Vac to 400 Vdc, simulated AC current harmonic spectra .................................... 155

Figure 151 - 340 Vac to 400 Vdc, simulated switching results ....................................................... 156


Figure 153 - 480 Vac to 320 Vdc, AC current harmonic spectra .................................................... 158

Figure 154 - 480 Vac to 320 Vdc, simulated switching results ....................................................... 159

Figure 155 - 480 to 400 AC input results ........................................................................................ 160

Figure 156 - 480 Vac to 400 Vdc, simulated AC current harmonic spectra .................................... 161

Figure 157 - 480 Vac to 400 Vdc, simulated AC Switching results................................................. 162

Figure 158 - 340 Vac to 320 Vdc, AC practical test results ............................................................ 163

Figure 159 - Experimental AC current spectra for 340 Vac to 320 Vdc .......................................... 163

Figure 160 - 340 Vac to 320 Vdc, practical switching test results .................................................. 164

Figure 161 - 340 Vac to 400 Vdc, AC experimental test results ..................................................... 165

Figure 162 - Experimental AC current spectra, 340 Vac to 400 Vdc .............................................. 166

Figure 163 - 340 Vac to 400 Vac practical switching test results ................................................... 166

Figure 164 - 480 Vac to 320 Vdc, practical AC test results ............................................................ 167

Figure 165 - Experimental AC current harmonic spectra, 480 Vac to 320 Vdc .............................. 168

Figure 166 - 480 Vac to 320 Vdc experimental switching test results 40 kHz clock (top), primary

current, I1 (second from top), secondary current, I2 (third from top) and IGBT switch voltage, Vsw

(bottom). .......................................................................................................................................... 169

Figure 167 - 480 Vac to 400 Vdc, practical AC test results ............................................................ 169

Figure 168 - Experimental AC current spectra, 480 Vac to 400 Vdc .............................................. 170

Figure 169 - 480 Vac to 400 Vdc, practical switching test results .................................................. 171

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List of Tables

Table 1 - Comparison of Electric Commercial Vehicles (top) with Electric Vehicles (bottom) .......... 18

Table 2 - Technical codes and standards associated with EVs ........................................................ 19

Table 3 - AC Charging modes........................................................................................................... 19

Table 4 - Preliminary Battery charger specification .......................................................................... 22

Table 5 - Transformer details ............................................................................................................ 82

Table 6 - Available turn ratios for revised transformer ...................................................................... 90

Table 7 - Comparison of turn ratios .................................................................................................. 91

Table 8 - Transformer parameters .................................................................................................... 95

Table 9 - IGBT loss calculation parameters ...................................................................................... 97

Table 10 - MOSFET loss calculation parameters ........................................................................... 102

Table 11 - IGBT comparison table .................................................................................................. 105

Table 12 - MOSFET comparison table ........................................................................................... 105

Table 13 - Capacitor comparison .................................................................................................... 108

Table 14 - FIT variable tables ......................................................................................................... 112

Table 15 - Maximum admissible harmonic voltages and distortion (%). [150] ............................... 128

Table 16: Component list ................................................................................................................ 139

Table 17 - Power and efficiency comparison between simulation and experiment ........................ 172

Table 18 - Charger initial specifications and prototype specifications ............................................ 175

13

Abstract

Name of University: The University of Manchester

Candidate’s name: Bryan Andrew Savage

Degree Title: Doctor of Philosophy

Thesis Title: Electric Vehicle Battery Charging and Low Voltage Grid Implications

Date: Sept 2016

In recent years, concerns over global warming and climate change have spurred on the research

and development of the electric car. With manufacturers such as Nissan, Renault, Tesla and more

producing affordable and effective automotive solutions, the public perception of electric vehicles has

changed and there are now around 80,000 vehicles on the road in the UK alone. However, the uptake

of electric vans and delivery vehicles has been much slower, in part due to manufacturers focusing

on the non-commercial vehicle. With this, electric van technology is largely, behind.

With 4 million vans on the UKs roads, as well as other large vehicles such as busses and trucks,

represents a significant portion of all vehicles that remain non electrified and therefore prime

candidates for electrification.

The next five years will see a substantial increase in the number of all-electric (EVs) and hybrid

electric vehicles (HEVs) utilizing on-board electrochemical energy storage devices (batteries) that

require full or part recharging by connection to a low voltage utility network that supply domestic or

light industrial users. The utility connection requires a battery charger composed of a uni- or bi-

directional power electronic converter that converts the AC supply to DC or vice versa.

For larger vehicles higher energy/power is required and thus a number of batteries may have to be

connected in parallel to obtain the required energy levels or satisfy the peak power demands, or

simply to improve the fault tolerance capacity due to the technical challenges associated with the

assembly and management of large (electro-chemical) cell structures.

The expectation for future automotive power electronic converter products is lifetimes of 10 years

and over, and operation in arduous temperature environments, factors that compromise existing

power converter topologies, in particular those employing electrolytic capacitors.

This thesis discusses a novel 9kW battery charger design that is modular, has a balanced three-

phase input, is near unity power factor and has no electrolytic capacitors. Several key areas are

discussed, analysed through calculations, simulations and then constructed and validated through

test results.

14

Declaration

No portion of the work referred to in the thesis has been submitted in support of an application for

another degree or qualification of this or any other university or other institute of learning.

Copyright statement

The author of this thesis (including any appendices and/or schedules to this thesis) owns certain

copyright or related rights in it (the “Copyright”) and s/he has given The University of Manchester

certain rights to use such Copyright, including for administrative purposes.

Copies of this thesis, either in full or in extracts and whether in hard or electronic copy, may be made

only in accordance with the Copyright, Designs and Patents Act 1988 (as amended) and regulations

issued under it or, where appropriate, in accordance with licensing agreements which the University

has from time to time. This page must form part of any such copies made.

The ownership of certain Copyright, patents, designs, trademarks and other intellectual property (the

“Intellectual Property”) and any reproductions of copyright works in the thesis, for example graphs

and tables (“Reproductions”), which may be described in this thesis, may not be owned by the author

and may be owned by third parties. Such Intellectual Property and Reproductions cannot and must

not be made available for use without the prior written permission of the owner(s) of the relevant

Intellectual Property and/or Reproductions.

Further information on the conditions under which disclosure, publication and commercialisation of

this thesis, the Copyright and any Intellectual Property and/or Reproductions described in it may take

place is available in the University IP Policy (see

http://documents.manchester.ac.uk/DocuInfo.aspx?DocID=487), in any relevant Thesis restriction

declarations deposited in the University Library, The University Library’s regulations (see

http://www.manchester.ac.uk/library/aboutus/regulations) and in The University’s policy on

presentation of theses.

15

Acknowledgements

I would like to express my appreciation and thanks to my Supervisor Dr Roger Shuttleworth of the

University of Manchester. Thank you for always having your door open for when I ran into issues, for

your immense expert knowledge and for helping me become a better engineer. I could not be more

privileged to have you as my supervisor. Enjoy your retirement!

Thank you to my friends for their stimulating discussion, occasional lunches and a sympathetic ear.

To Ku: thank you for being a wonderful friend to me, understanding my (our) struggle and most

importantly, listening to my endless insane rants. You are nearly there, you can do it. To Nur: I

couldn’t wish for a better person to share an office with, your bright smile often cheered me along.

Thank you for putting up with my noise. To Luis: thank you for being a good friend to me. Most

importantly, thank you for being the (second) strongest foot on the pitch! You still owe me a game in

your back yard! And to those missed or forgotten, may we meet again.

To the wonderful city of Manchester, thank you for giving me a home

To my twin Robert. You are the strongest person I know, and not just because you have giant biceps.

Thank you for putting up with me and my occasionally rough brotherly love. Thank you for keeping

me sane and grounded. You inspire me daily. I hope I can continue to make you proud.

To my elder brother Mark. I don’t think you ever realised how much of a profound effect you had on

me growing up. Giving me our first games console (the old Sega Master System) probably started

me on the path I am on today. Since then, your occasional prompts to give you help fixing things

kept me more or less interested in electronics for as long as I can remember. Thank you for all your

support. (Remember, I’ll have to start charging you before long!)

To the AL-Najjars. Thank you for your endless encouragement, support and understanding. !كرا ش

I owe my most profound gratitude to my wife, Shada. Your understanding, patience and love made

me push on through the long days and the longer nights. Thank you for your continuous

encouragement throughout the last 5 years and for pretending to be interested in my work. This all

wouldn’t be possible without you. It’s over, I now belong to you! (=^_^=)

Finally, I would like to give my deepest, most heartfelt thanks to my mother, Angela. For as long as

I can remember she has stood by me, fought my corner and made me believe in myself. She is my

single greatest inspiration, I cannot repay you enough for all this power you gave me to chase a

dream. This thesis and my work is dedicated solely to you.

- Bryan Savage. 2017

16

And the moral of the story is:

Work!

Til your arms fall off,

Til your abs get hard,

And your bones go soft.

Work!

Til your hands go numb,

And they cramp,

And the fans in the stands go home.

- G. Watsky

17

1. Introduction

1.1 EV background

Over the last ten years there has been a steady increase in the adoption of electric vehicles (EVs)

so as to meet concerns about global CO2 production and climate change [1]. Currently there are

around 75,000 plug in EVs in the UK [2]. Consumers require that these vehicles are optimised to

produce as little CO2 as possible. The optimisation of an EV design requires the drivetrain and battery

package to be carefully chosen for the purpose in mind and requires knowledge of how the EV will

be operated. Battery sizing is important, since to achieve the best performance from the vehicle, the

battery capacity, size and weight must all be considered. Of further concern is the time taken to

recharge the battery so as to make it ready for the next driving session, whether that session is on

the same day or the next day.

Despite gradual technical improvements in EVs there are still concerns over range, cost and

refuelling (recharging) times, although these concerns have been slowly mitigated through improved

vehicle designs, manufacturing and technology. There are now many EVs on the market and several

companies are making their second or third iterations of EVs. However there are currently only 13

light vans and 5 heavy duty trucks available to the general public. [3]

Currently, of the approximately 75,000 plug-in EVs in the UK [2], only 4000 are Electric vans. There

are over 3 million commercial vehicles in the UK, around 28% of which are used for collection and

delivery of goods by major logistic companies [4] thus delivery vehicles are prime candidates for

electrification.

Commercial delivery vehicles, such as vans and trucks, have different requirements to cars mainly

due to their higher weight and larger size. These two differences require a higher power drivetrain to

overcome mechanical friction and drag losses. Additionally commercial vehicles are usually required

to make longer journeys than cars and often several journeys in quick succession. These needs

mean that electric commercial vehicles require a higher energy storage on board, if the range

compared to petrol or diesel commercial vehicles is to be competitive.

Large hybrid EVs such as buses have widespread use throughout the world, particularly in the UK,

USA and China, however these EVs are supplemented with a traditional engine or sometimes solar

panels. Pure EVs of this type are less common, although there is an increasing uptake in east asia

(China, Japan, Korea) as well as the USA, and a with few selected services and routes in other

countries across the world. [5]

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1.2 EV’s, power levels and connectors

Table 1 summarises UK Electric Commercial vehicles currently available (upper section) with a

selection of car EVs as a comparison (lower section). It can be seen that the Smith Newton

Commercial vehicle has the highest energy storage capacity. In the future it is expected that most

commercial electric vehicle manufacturers will improve the range and increase the storage capacity

of their vehicles to that of the Smith Newton. As a consequence high power rapid chargers will be

required to reduce charge times.

Manufacturer and Make Battery

capacity (kWh)

On board Charger Power (kW)

/phases

Rapid charge?

Range (mi)

Nissan e-nv200 24 6.6 / 1 Y 106

Citroen Berlingo Electrique 22.5 1.8 / 1 Y 59

Peugeot Partner 22.5 2.8 / 1 Y 106

Iveco Daily 40 3.5 / 1 Y 173

Mitsubishi minicab MiEV 16.5 3 / 1 Y 93

Smith Newton 120 15 / 3 Y 100

Smith Edison 50 6.2 / 3 Y 100

Renault Kangoo Maxi Z.E 22 2.7 / 1 N 106

Mercedes-Benz Vito E-cell 36 6 / 1 N 81

BMW i3 27.2 3.8 / 1 Y 118

Renault Zoe 22 43 / 3 N 130

Tesla Model X 75 22 / 3 Y 250

Nissan Leaf 30 6.6 / 1 Y 155

Chevrolet Spark 21 3.3 / 1 Y 132

Ford Focus Electric 23 6.6 / 1 N 122

Volvo C30 Electric 24 3.3 / 1 Y 90

Table 1 - Comparison of Electric Commercial Vehicles (top) with Electric Vehicles (bottom)

A popular battery charging solution is to use dedicated charging points which can deliver up to 50kW.

However currently in the UK only 15% of motorway service stations are equipped with rapid AC (43

kW), DC (50 kW) or Super (120 kW) charging points [6]. For a commercial vehicle fleet dedicated

depot charge points are required. Such charge points can be extremely costly For example, the Fed-

Ex company has a fleet of 48,000 vehicles [7]. If 10% of these vehicles were electrified it would cost

in excess of £5 million to provide a 22kW charge point for each [8]. This cost is a significant obstacle

to the adoption of an electrified fleet of commercial vehicles.

There are also additional standards surrounding EV charging that dictate the electrical connectors

required, power level and safety standards, see Table 2. These standards vary from country to

country and there is no set convention as yet. The charging modes are as in Table 3.

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Document name Document Title/section

SAE J-1772 SAE EV and PHEV Conductive Charge Coupler

SAE J-2344 Guidelines for Electric Vehicle safety

SAE J-2464 EV/HEV rechargeable energy storage system (RESS) safety abuse

testing

SAE J-2910 Design and test of hybrid electric trucks and buses for electrical safety

SAE J-2929 EV/HEV propulsion battery system safety standard

UL 2202 Safety of EV charging system equipment

UL 2231 Safety of personnel protection system for EV supply circuits

UL 225a Safety of plugs, receptacles, and couplers for EVs

NFPA 70E Electrical safety in the workplace

NFPA 70 National Electrical Code (NEC); Article 220, Branch Circuit, Feeder and

service calculations; Article 625, EV charging systems

DIN V VDE V 0510-11 Safety requirements for secondary batteries and battery installations

ISO 6469-1/2/3:2009 EV safety specifications – Part 1; on board rechargeable energy

storage system

ISO 15118-1/2/3:2015 V2G communication interface - General information

IEC TC 69 Safety and charger infrastructure

IEC TC 64 Electrical installations and protection against electrical shock

IEC 61851 Electric vehicle conductive charging system - General requirements

IEC 62196 Plugs, socket-outlets, vehicle connectors and vehicle inlets -

Conductive charging of electric vehicles - General requirements

Table 2 - Technical codes and standards associated with EVs

Referring to Table 3, Mode 1 charging is typically a non-dedicated, passive connection of the EV to

the AC mains, either 250 V single phase or 480 V 3 phase including earth, at a maximum current of

16 A. The connection does not have extra control pins and requires no additional infrastructure to be

fitted. [9]

Charging modes Single Phase 3 phase

Mode 1 MAX 16A – 3.7kW MAX 16A – 11kW



Table 3 - AC Charging modes

In some countries Mode 1 charging is prohibited due to earthing standards. Mode 2 was developed

to give a semi-active connection of the EV to the mains at a maximum current of 32 A. A cable

protection device provides earth fault detection as well as over current protection. Mode 2 is more

expensive than Mode 1 due to the added infrastructure. Mode 3 charging is an active connection to

fixed, dedicated supply equipment, however additional control and protection functions with

communication lines are required which adds to costs. Finally, there is a charging mode not included

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in Table 3, known as mode 4. In mode 4 a dedicated DC charging station which is not part of the

vehicle, is used.

1.3 Vehicle to grid background

With the increasing adoption of EVs, the power demand on the electrical grid will increase sharply.

Currently a control system is being developed called Vehicle to Grid (V2G) that manages groups of

charging EVs and communicates with them in order to manage their on board charging. V2G is

advantageous to the grid as it can help manage peak demand response, and allow the supply

authorities to tap into the stored energy or reduce the charge rate of a group of EVs (load shedding)

in order to minimise peak demands. There are two types of V2G; unidirectional V2G or bidirectional

V2G. Unidirectional V2G is where the energy is sent from the grid to the EV under charge without

return flow whereas bi-directional V2G is where the power can be returned to the grid from a charged

EV if required. It is also suggested that EVs should be used to store excess energy from wind

generation (a process called ‘buffering’) and return the energy to the grid during times of high load,

thereby stabilising the intermittency of wind generation. [10]

In the UK, V2G is intended to be implemented as part of a nation-wide ‘smart grid’ [11], providing

more control, better reliability, higher security and higher efficiency. These gains would be

accomplished through; dynamic optimization of grid operations and resources, deployment and

integration of distributed resources and generation, development of demand response, deployment

of real-time, automated and interactive technologies that improve the user end experience and ease

of use, deployment of advanced electricity storage and development of standards for communication

of appliances and equipment connected to the grid. [12]

The adoption of V2G at present is difficult due to the UK’s outdated grid infrastructure. Until this

infrastructure is improved, overloads may occur due to EV charging in the distribution power lines or

transformers, and voltage deviations or harmonic distortion could also occur. A part mitigation of

these effects may be achieved through coordinated charging, which optimises time and power

demand and prevents grid overloads. Coordinated charging can only work up to a certain EV load

level. Above this level the demand will be too great and the grid infrastructure may need to be

replaced at high cost. For bidirectional power flow, infrastructure in the low and mid voltage levels

will have to be modified as the majority of grid structures only supports reverse power flow distribution

level, and reverse power flow is severely limited by the grid’s (mostly) radial topology. Both voltage

control and protection systems operate on the basis that voltage tends to decrease as distance from

the National Grid transmission system increases [13], so there systems may need modification.

Interconnections between low voltage levels may need to be established in order to re-direct power

locally. Also grid protection between voltage levels will need to be updated as this generally only

works for conventional, unidirectional, generation to load, supply. Further, the communications

required for these upgrades will need to be established at high cost. [14]

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1.4 Project outline

This project is an investigation into the design of a 9 kW on-board battery charger for a Smiths

commercial vehicle, which eliminates the need for expensive external charging points.

Considering the uptake of electric vehicles and the comparative lack of commercial electric vehicles,

it is evident that research into the area of heavy electric vehicles is still in its infancy. With increasing

pressures from the UK government to reduce carbon emissions, a significant portion of the existing

pollution could be reduced through more electric public transport and heavy vehicles. The focus in

this project is to develop a high power, 3-phase, on-board battery charger which minimises the

complexity of external charging points. The charger will be for electrical commercial vehicles with 2

or more batteries. There are significant challenges in the design of EV battery chargers. These

chargers must: have a low cost, be light weight, have a small size, and must have a low internal heat

generation, a high efficiency and a high power density while complying with relevant standards. It is

also important to have the ability to control output current and to have the ability to adhere to a

constant voltage charging profile such as is shown in Figure 1. Also, galvanic isolation is desirable

to electrically disconnect the vehicle from the grid, which can be achieved using a transformer

integrated into the converter.

Figure 1 - Typical battery charging profile

There are inevitable concerns about power factor, power quality and phase imbalance produced by

the charging equipment. Present harmonic standards require charger systems to take low levels of

current harmonics [15] [16]. Additionally fundamental current should substantially be in-phase with

voltage to keep poor power factor charges low. Furthermore the supply to EV garages should not be

grossly imbalanced by the charger load [17] [18]. Therefore these standards and conditions must be

taken into account in the design of the charger.

Additional requirements of on-board chargers are that they must be able to withstand temperature

extremes met by the vehicle, vehicle vibrations, have a long operating life and a low mass. Operating

22

specifications set for the project are shown in Table 4. Requirements for output power were taken

from Smiths Electric data on Battery voltage levels [19].

Parameter Value

Three phase Input voltage 340 to 480 Vac

Frequency 50/60 Hz

Power Factor >0.9

Ambient air temperature -20 to +50 0C

Output power >7 kW

Mass <15 kg

Output Voltage 320 to 420 Vdc

Efficiency As high as practicable

Input THD <8% [16]

Battery current ripple <5A per 100Ah capacity [20]

Table 4 - Preliminary Battery charger specification

It is also preferable to offer the flexibility to determine where the charger output power goes. For

instance, depending upon the EVs mode of operation, should one battery be discharged more than

another, it may be desirable to charge one battery alone, or several batteries together or possibly

charge the batteries of other vehicles via a vehicle-to-vehicle DC link.

In the project, simulations were carried out using SIMPLIS/SIMetrix software which is based on

PSpice [21]. This software is accurate enough for simulating switching transients and manufacturer’s

device and component models can be imported into it to improve accuracy. Graphs from physical

tests were plotted in MATLAB [22] and magnetic components were simulated in FEMM [23].

The hardware was designed with appropriate safety margins, constructed and then tested in the lab.

1.5 Project aims, motivation and objectives

This PhD is concerned with the design build and test of a 3-phase battery charger for commercial

EVs.

1.5.1 Project motivation

As stated at the start of this introduction, there are concerns over global CO2 levels and one of the

main causes of rising CO2 levels is the traditional combustion engine. There is a technological

movement by vehicle manufacturers towards creating sustainable EVs. However a significant portion

of traffic on the road comprises large commercial vehicles and public transport vehicles in the form

of buses. At present only a small proportion of these large vehicles are electrified and therefore there

are prime candidates for electrification.

Two of the major obstacles to the uptake of EVs are the lack of range and the long charging times.

A significant change in battery technology is required to significantly increase the range of the

majority of EVs, however, for very large commercial EVs, a larger proportion of the vehicle can be

allocated to batteries and therefore to increasing the range. This approach is very costly, increases

23

the overall weight of the vehicle and reduces the cargo/passenger space. Furthermore, charging time

increases with increasing battery capacity. Thus it may be that providing higher power, faster charger

is a better improvement in the long term.

1.5.2 Project aims

The main aim of the project was to develop a 3-phase battery charger that will compete with existing

high power chargers in the 9-12 kW range. This charger will meet present power quality standards

as well as relevant EV standards.

1.5.3 Project objectives

The project objectives were set out as follows:

To research existing charging technology.

To decide and justify the chosen charging technology.

To conduct research on capacitor technology with regards to lifetime and reliability.

To identify and conduct research on every major component in the chosen topology to

determine selection and optimisation of the ideal components required.

To research and develop a relevant snubber technology, so as to improve the charger

efficiency.

To research and develop a relevant cooling solution for the chosen topology.

To develop a simulation of the chosen system in SIMetrix.

To construct and test the system in the lab.

To develop a basic controller for the constructed system.

1.5.4 Original material

In this thesis, certain aspects are considered to be original. These novel aspects are as follows:

A novel IGBT snubber circuit was designed, implemented, tested and validated.

A study was conducted into the differences in mean time between failures (MTBF) and

lifetime between capacitor technologies. No extensive study into the lifetime or MTBF of

capacitor technology was found in the literature.

A battery charger was constructed from 3, single phase battery chargers connected in delta.

No papers can be found that show this.

Flyback technology was designed and validated at 1.5 kW, whereas flyback technology is

typically used for sub 300W supplies [24].

A study was conducted into the interleaving of transformer windings in order to reduce

leakage inductance. While this is not novel in itself, no extensive documentation was found

showing the reduction in leakage inductance as the amount of interleaving is increased.

24

Extensive research into modelling of thermal simulations was conducted, and a method to

transform Foster thermal models to Cauer thermal models was devised and the response

verified against relevant device datasheets.

Copper heat spreaders were used throughout the project and the benefits were documented.

These novel aspects largely provide the contribution the work described in this thesis makes to

general knowledge about power electronics with regards to battery charging. Further to this list, a

novel contribution has been made through the completion and validation of the project.

1.6 Thesis outline

This introductory chapter provides an overview of the various EV charger technologies in use today

and summarises the basis for the project. Also this chapter outlines the aims and objectives, and

details the motivation behind the project and outlines the parameters for design of the charger.

Chapter 2 details a literature review into charger topologies and narrows down the selection process

for the desired topology, and giving a brief discussion on the requirements of an ideal topology and

the compromises and challenges behind the chosen topology. Chapter 3 discusses snubber

technology and highlights the design choices made as a result.

Chapter 4 discusses the design evolution of the chosen converter including the basic equation,

modelling and the simulation stage, design of the transformer, snubber and input filter. Also the

selection and design of the switching device (wide bandgap devices not considered – see chapter

4), research into operating temperature and lifetime of capacitors and choice and design of control

system, are discussed. Thermal aspects of the design are included and safety circuits are designed.

Chapter 5 details the design and construction of the transformers, PCBs and additional circuits as

well as shielding and packaging. This chapter also details the design and construction of the cooling

rig for testing.

Chapter 6 details the testing and results, and chapter 7 summarises the project, discusses which

targets were met and any improvements or adaptions that could be made in the future. Chapter 8

lists the references.

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2. Charger topology literature review

2.1 Ideal battery charger

Initial work to determine the best topology for the desired battery charger involved establishing

suitable criteria. Following this a literature survey of existing charger topologies and power converters

was conducted. The following major criteria list the ideal requirements of the proposed charger and

determine if they are essential or desirable for operation of the charger.

Galvanic isolation – Essential – Galvanic isolation is an essential feature for the charger as

demanded by Smith Electric.

Low device count – Desired – In order to reduce losses through switching and conduction

losses as well as overall cost of charger.

Input voltage – Essential – 340 to 480VLL(RMS) at 50/60Hz in order to meet standard 3 phase

voltages

Power input – Desired – 9kW as set out in Table 4.

Output voltage control – Essential – In order to meet the battery voltage range required by

the specification in Table 4.

3 phase operation – Essential – In order to meet the input voltage range required by the

specification in Table 4.

Adherence to power quality standards – Essential – The charger meeting standards

associated with Total Harmonic Distortion (THD) and Power Factor (PF).

Low Cost and weight – Desired – Reducing cost and weight as much as possible is desired

however not essential for the initial prototype.

Simple control – Essential/Desired – Making the control system for the charger as simple

as possible in order to better focus time on designing and testing the prototype. Not essential

for finished product.

Efficiency – Essential – Making the efficiency of the charger as high as possible, at least

greater than 90%

Temperature range – Essential/Desired – Temperatures need to be kept as low as possible

so the life of the charger is not compromised.

From this list of criteria, the most demanding requirements are those for galvanic isolation, operation

from a 3- wire supply, and the range of 3 phase input voltages.

2.2 Battery charger survey and review

A review of battery chargers was completed to ensure the proposed design was novel and also

technologically competitive. A number of designs had been reviewed in a literature survey conducted

by B.N. Singh [25] [26]. The designs reviewed by Singh are basic and based on: buck, boost, buck-

boost, multiphase and multilevel converters (both off-board and on-board) with uni-directional or bi-

26

directional operation. The majority of these basic designs reviewed by Singh are not included in this

survey.

Unidirectional charging is a preferred option for the charger design as it limits hardware requirements,

simplifies interconnection issues, and tends to reduce battery degradation as the battery is cycled

less. A bidirectional charging system allows battery energy injection back to the grid if required.

However the vehicle batteries can then be cycled more often due to discharging to the grid. Typical

on-board bi-directional chargers have limited power capability because of weight, space, and cost

constraints and may be integrated with the electric drive to overcome these constraints.

Most EV charging typically takes place at home overnight in a garage where the EV is plugged into

a power outlet for slow charging, whereas commercial vehicles are often charged together overnight

in large on-site charging stations. Semi-fast charging is typically the primary method for both private

and public facilities and requires a 240 Vac outlet. Future developments are focusing on semi-fast

charging which provides ample power and can be implemented in most environments [27]. Usually

single phase solutions are used for slow and semi-fast charging. Fast and dc fast charging are

intended for commercial and public applications, operating like a filling station, and three-phase

solutions normally apply. Stations for public use are likely to use semi-fast or fast chargers installed

in parking lots, shopping centres, hotels, rest stops, theaters, restaurants, etc.

The following literature review targets single and 3 phase chargers suitable for charging batteries at

any power level and discusses the advantages and disadvantages of the topologies as well as

highlighting essential features for the prototype charger. This review mainly outlines the most popular

variations of battery charger as well as some more novel concepts. The converters are assumed

unidirectional unless stated otherwise.

2.1.1. Single and 3 phase diode bridge

The next logical iteration to the half bridge rectifier is the full bridge rectifier, is shown in Figure 2(a).

It utilizes 2 more diodes, or switches. With the increase in components there is also an increase in

cost however this puts less stress on the components. Furthermore this topology requires more

pulse-width modulation (PWM) to add to the complexity of the control circuitry. The efficiency of the

circuit depends on the difference in voltage between the battery and the source therefore if the gain

of the DC-DC converter stage is greatly different from 1, the efficiency of the circuit is reduced. Also

the circuit is unable to offer a wide range of output voltages and measures against noise would need

to be taken [28] .

In Figure 2(b) an isolated version is shown, this setup has the benefit of being able to compensate

for the poor efficiency when the DC-DC converter gain does not equal 1. The switches are operated

in diagonal pairs, the voltage across the transformer is the same as Vin and the primary current will

be half of the current in the half bridge, which helps further reduce stress on the devices and increase

efficiency [29]. This configuration compensates for the loss of efficiency by replacing the DC-DC

converter with a setup that behaves like a buck or boost depending on how the transformer is wound.

27

The authors claim the circuit also has the additional benefit of isolating the battery from the source,

which helps reduce noise in the system.

Figure 2 - Basic full bridge (a) Isolated full bridge (b) [28] [29]

The bridge circuit, like the half bridge circuit, can be expanded into a 3 phase circuit, which is shown

in Figure 3. In both single phase and 3 phase configurations, both half and full bridge converters

would require additional circuitry to further reduce losses in the switches and isolation transformer,

as well as an input filter to achieve power quality standards in both uni-directional and bi-directional

modes [30].

Figure 3 - Basic 3 phase full bridge converter [30]

2.1.2 Single and 3 phase Half Bridge rectifier

The half bridge rectifier is a very basic converter typically consisting of 2 diodes, or 2 switches for

unidirectional power flow. This design is often used as it consists of fewer components, meaning a

lower cost, however driving the devices at high voltages/currents exhibits high stresses on the

components in order to achieve higher power from the . Furthermore, in its most basic configuration

in Figure 4(a), there is no isolation between the input and the output of the charger. An advantage of

this topology is that the switch voltage cannot exceed Vin [31].

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Figure 4 - Basic half bridge (a) [29] , Isolated half bridge (b) [31]

Improvements can be made to the circuit such as in Figure 4(b), where a transformer can be added

for isolation and increased functionality at the cost of a more complex voltage-mode control in order

to balance the voltage midpoint between C1 and C2. Also its efficiency will suffer as a result of the

leakage energy in the transformer [29]. The basic half bridge in Figure 4(a) can also be configured

for 3 phase operation as in Figure 5 [32].

Figure 5 - 3 phase, half bridge converter

The half bridge topology in general can easily be modified for bi-direction functionality with a small

increase in control system complexity. The circuit can also be modified for 3 phase operation either

by use of a single phase charger, per phase or an integration of circuits between phases. Power

output is generally low with good power quality with PFC methods.

2.1.3 PWM rectifier

In order to achieve power factor correction and decrease THD that is typically present in traditional

rectifiers (as seen in sections 2.1.1 and 2.1.2). Here the operation principle is the same as for the

diode bridge, however the rectification can be controlled through Pulse Width Modulation (PWM)

which changes the conduction modes of the devices used in order to maintain power factor correction

[33]. The circuit is set out as in Figure 6.

29

Figure 6 - Single phase PWM bridge rectifier [33]

This topology still does not meet the requirements set out at the start of the chapter as there is no

galvanic isolation, the topology cannot meet the required output voltage and the control is more

complex than the basic diode bridge.

There is also a 3 phase topology of this circuit which follows the same layout as the 3 phase, full

bridge rectifier, this can be seen in Figure 7. This suffers from the same limitations as the single

phase variation.

Figure 7 - Three phase PWM bridge rectifier [33]

2.1.4 Boost Converter

The Boost converter does not have isolation, provides control of low output voltage and provides a

low power quality. Basic single phase and three phase boost converters can be seen in Figure 8.

Sometimes the circuit is favored over the Buck converter for battery charger designs as it can give a

high output voltage from a low input voltage. The reliability of the boost converter is high as

components are not often stressed with high voltage or current however there is an issue if the battery

is fully discharged as there is no control over the output current of the converter.

30

Figure 8 - Single and 3 phase Boost converter chargers

An improvement on this circuit is in [34]. This improvement incorporates a full bridge LLC resonant

converter with a boost PFC converter as in Figure 9. The topology combines the full bridge converter

shown earlier with a PFC boost converter, to provide isolation and enable the output voltage to be

stepped down. Here a more complex control scheme is required in order to manage both the full

bridge switches and the boost converter switch.

The synchronous rectifier part of the circuit has 2 modes of operation - full-bridge rectifier mode or

half-bridge rectifier mode. When the input voltage is high, the synchronous rectifier works as a full-

bridge. If the input voltage is low, the synchronous rectifier operation is changed to the half-bridge

rectifier mode which effectively doubles the input voltage. The transformer leakage flux will put

additional voltage stress on the full bridge switches.

Figure 9 - Full bridge Boost PFC converter charger [34]

An alternative interleaved boost design is shown in Figure 10 and is proposed in [35] and [36]. Here,

2 boost converters are operated out of phase by 180°, so that current is constantly delivered to the

battery, and as the two inductor currents are out of phase, they reduce the input ripple current caused

by the boost switching action. The interleaved boost converter has the advantage of paralleled

semiconductors. Furthermore, the input EMI filter is relatively small.

However, interleaving requires increased circuit complexity (greater number of power-handling

components and more auxiliary circuits), leading to a higher parts and assembly cost and reduced

reliability. Also, a problem of unequal load sharing between the interleaved power stages is present

and therefore the complexity of the control increases as it needs to address this problem as well as

to incorporate the 180° phase shift and the doubling of the switching frequency. The operation places

31

high stresses on the input bridge diodes and the charger is typically limited to 3kW due to cooling

concerns.

Figure 10 - Interleaved PFC Boost converter [36]

Topologies combining both the active full bridge and interleaved PFC designs have also been

developed in [37] [38] [39] and [40], an example can be seen in Figure 11. Here the addition of an

active full bridge gives the ability of ZVS via the leakage inductance of the transformer, an external

inductor and the output capacitance of the switch, Thereby increasing the efficiency of the charger.

An alternative configuration is where the full bridge is at the front end followed by the boost converter

but this second topology offers no significant changes or improvements.

Figure 11 - Active full bridge interleaved PFC boost converter [37]

As opposed to adding an active full bridge, a design in which the input rectifier-bridge is modified to

give, in effect, a bridge-less design in an effort to reduce the losses incurred in the bridge rectifier,

was and presented by B. Lu et al [41]. The proposed circuit is in Figure 12.

Figure 12 - Bridgeless PFC boost converter [41]

The circuit utilises a boost converter, which is split around a rectification section controlled by

switches Q1 and Q2, where inductors L1 and L2 are used for PFC of the source. An advantage of

32

the circuit is its improvement in efficiency and PFC over the standard rectifier boost configuration. A

further change could be to modify the active full bridge boost converter shown in Figure 11 to a

“bridgeless type” as seen in [42] to increase the efficiency.

Although the circuit structure of Figure 12 is simple, the location of the boost inductor on the AC side

makes it difficult to sense the AC line voltage and inductor current, and the circuit suffers from high

common mode noise. A paper by F. Musavi et al [43] includes an improvement on the design where

two more slow diodes are included in the bridgeless configuration to link the ground of the PFC to

offer a conduction path back to the input.

In addition to increasingly improving circuit topologies, improvements to control methods and

schemes are made. This is highlighted in [44], as voltage control and current control for active

rectifiers. Due to conventional battery chargers having issues with power factor and therefore

efficiency, some battery chargers have been developed with power factor correction (PFC) in mind.

There are 2 major types of active rectifier, the voltage controlled active rectifier and the current

controlled active rectifier. In the case of the voltage controlled rectifier [45], as seen in Figure 13, the

circuit comprises a rectifier and additional line inductance(s) LC. The rectifier controls the AC voltage

at its input in a PWM fashion and the inductance, apart from decoupling the input from the grid, helps

in filtering out the high frequency harmonic currents injected into the grid.

Figure 13 - Single and 3-phase, voltage controlled active rectifier [45]

The advantages of the design include its simple structure, low component count and simple control

system required to drive the circuit. However the input current is susceptible to distortion due to the

introduction of inductance.

The other design is the current controlled rectifier [46], as shown in Figure 14, which consists of the

same components as the voltage controlled variation; however the inductance LC is now placed after

the rectification section. In this case, by changing the duty cycle of the switch, T, the current drawn

from the source is forced to be sinusoidal and in phase with the voltage.

33

Figure 14 - Single and 3-phase, current controlled active rectifier [46]

As with the voltage controlled rectifier, the current controlled model does not fully eliminate distortion

of the source current. Therefore more complicated methods of correction will be needed if a simple

rectifier is used.

Three phase expansion of this circuit does not automatically allow the achievement of an improved

power factor, each phase of the rectifier conducts for two intervals during the utility period therefore,

due to the maximum length of each interval being shorter than the utility period, the current drawn is

discontinuous.

2.2.1 Forward Converter

A natural progression to the Flyback converter is the forward converter in Figure 15, the circuit

consists of a tertiary wound transformer, 3 diodes and both an inductor and capacitor on the output.

When the switch is closed, the output choke, L, is charged linearly. Once the switch is closed, the

choke transfers the stored energy to the output. The advantage of using the tertiary wound

transformer is to provide a return path through the primary side diode to demagnetize the core;

otherwise saturation would occur after a few switching cycles. However the output voltage of the

converter is limited and depends heavily on the transformer turns ratio, the switch voltage is high

(typically 2 x Vin) and in order to reset the transformer, the maximum duty cycle is limited [29].

Figure 15 - Basic forward converter topology [29]

An active clamp forward converter is shown in Figure 16, instead of the tertiary wound transformer

an N channel MOSFET is used with a capacitor to clamp the switch voltage to the input voltage The

clamping is achieved by charging the clamp capacitor to greater than Vin, then when the main switch

34

is turned off and the NMOS switch is turned on, the voltage through the primary of the transformer is

reversed and the magnetizing current will decrease as the energy stored in the magnetizing

inductance is transferred into the clamp capacitor. This action removes the complexity of constructing

a transformer with 3 windings and also reduces losses. However for high power applications, the N

channel MOSFET and clamp capacitor will have to be high power devices, and expensive.

Figure 16 - Active clamp forward converter

Another variation on the forward converter is achieved by combining it with the flyback [47]. The new

topology incorporates another secondary winding on the transformer and creates a flyback output in

order to give the circuit the functionality of both forward and flyback designs. When the switch is on,

the circuit charges the magnetizing current and the choke, L. When the switch turns off, the

magnetizing energy in the transformer and the choke are transferred to the output. As the output

capacitor charges above the magnetizing voltage, the rest of the energy is discharged through the

primary side capacitor.

Figure 17 - Forward Flyback converter [47]

2.2.2 Push Pull converter

Another topology which is seldom used for electric vehicle charging is the push pull topology; the

basic circuit is shown in Figure 18. A uni-directional, interleaved version of this circuit is proposed in

[29] and is shown in Figure 19. The circuit works by using bidirectional excitation of the transformer.

In the circuit the transformer primary is supplied with current from the input through pairs of transistors

35

alternately switching on and off, periodically reversing the current in the transformer. As opposed to

buck-boost converters, in which the input current is supplied by a single transistor during half the

switching cycle, in the push pull converter line current is drawn during both halves of the switching

cycle. Hence the circuit is generally more efficient than the buck-boost configuration, however the

peak stress placed on the primary switches is usually more than double the input voltage.

Figure 18 - Basic push pull converter

Figure 19 - interleaved push pull converter [29]

2.2.3 Flyback Converter

The basic flyback converter is shown in Figure 20. The flyback circuit is essentially the buck-boost

topology with a transformer for isolation and, by varying the turns ratio, a wide range of output

voltages can be achieved and also multiple outputs are possible. The topology is very simple

consisting of a transformer, a switch and an output diode, however input and output capacitors are

usually required for smoothing and the peak currents in the circuit are high, so that the transformer

flux will be high and the transformer large. Another issue is the leakage inductance in the transformer,

if this leakage is high, a high switch voltage can result. The control of the flyback circuit is generally

very simple [48].

36

Figure 20 - Basic flyback converter [48]

The topology is seldom used as a battery charger due to the aforementioned disadvantages; typically

the circuit is combined with a forward converter in order to mitigate the problems. An example of a

modified flyback circuit is found in [49] where the circuit is combined with a boost converter to give

the circuit in Figure 21. Here the transformer acts as the input inductor for the boost converter and a

high switching frequency is used to reduce the size of the magnetic components. When in step up

mode, the circuit acts as a boost converter, using the transformer as an inductor. When in step down

mode, the circuit acts as a flyback converter supplying a low DC voltage to the output. As the output

voltage in this mode is usually very low (10-15V) this severely limits its operation as a charger.

Figure 21 - Interleaved Flyback boost circuit [49]

2.1.10 Vienna rectifier

The Vienna rectifier in Figure 22 is a three phase, three-level, three switch PWM rectifier with a

controlled output voltage. In each phase of the converter, a switch is used to control the line current

in phase with its respective voltage by varying the duty cycle of the switch. When the phase switch

is on, the phase current rises through the corresponding inductor connected to a centre point

between the two capacitors. When the switch turns off, the current then discharges through the diode

half bridge to the output. A disadvantage of the circuit is that a large electrolytic capacitor is needed

as well as a complex control scheme. Also multiple devices are used, lowering the efficiency of the

circuit and this rectifier can only function as a uni-directional charger.

37

2.1.11 Swiss rectifier

A very recently developed design [50], is presented in Figure 23, and combines 3 DC/DC buck

converters (not shown) and an active 3rd harmonic current injection circuit. Visually similar to the

Vienna rectifier, the Swiss rectifier differs by allowing current in the active switches (T+ and T-) to be

formed proportionally to the two phase voltages involved in the formation of the output voltage of the

diode bridge. When the difference of these currents are fed back to the mains phase via a current

injection network, a sinusoidal input current shape can be assured for all mains phases while the

DC/DC converters can maintain output voltage regulation.

Figure 22 - Vienna rectifier [50]

The advantage of the Swiss rectifier is that the power quality is kept high (high PF and low THD) for

all input configurations. However in the current injection circuit, high performance devices are needed

to keep the losses low however this is generally at high cost. Furthermore the control scheme for the

converter is extremely complex. A disadvantage of the circuit is that a large electrolytic capacitor is

needed. Currently this design is only being used in off board chargers and like the Vienna rectifier,

the rectifier can only function as a uni-directional charger.

Figure 23 - Circuit topology of buck-type Swiss rectifier [50]

38

2.3.1 Dual active bridge

The dual active bridge topology has been extensively researched and a number of variations

produced, the most interesting are listed below. With the addition of another half or full bridge circuit,

a Dual Active Bridge circuit is made. The basic circuit is shown in Figure 24(a). Two full bridge circuits

are used with a transformer, to achieve zero voltage switching (ZVS) on the DC side and zero current

switching (ZCS) on the AC side when appropriate techniques are used. The large number of

components will increase costs and losses, and stresses on the devices can be severe when the

transformer ratio exceeds 2:1.

For ZVS and ZCS, modulation and control of the circuit is quite complex and the switching frequency

is limited. To apply these control schemes it is important that the switch parameters are the same in

order to balance the 3 phase source, otherwise issues with switching voltage and ZVS can occur.

Furthermore, losses can occur due to transformer leakage flux. The topology is proposed for both

single phase [51] and 3 phase [52] configurations.

Figure 24(b) shows a modified circuit with an LC filter and LC transfer element. The circuit is an

attempt to improve on the basic design with the LC filter helping the input power quality, and the in

line LC filter improving the efficiency by reducing switching losses. Phase-shift modulation is used to

control the bidirectional power flow in the converter [53] [54] [55] . A 3 phase version of the charger

is demonstrated in [56].

Figure 24 - Dual active bridge (a) with resonance (b) modified transformer (c) active bridge transformer (d) half bridge

Figure 24(c) shows the active bridge, but instead of a full bridge, a transformer with two windings

and two switches on the primary side are used. These switches are switched in opposition and

39

depending on which switch is active, the transformer secondary voltage can be +ve input, -ve input

or zero. The output switches are then switched in pairs to give a DC output. The configuration

simplifies the control system by creating a linear relationship between the control variables and the

output power [57]. A similar 3 phase variation is seen in [58].

Figure 25 - Dual battery charger

The circuit seen in Figure 24(d) uses a half bridge. LC Filters are placed on the input and output.

Combined phase-shift and frequency control is used to achieve ZVS over the full range of the AC

line voltage. The input rectifier stage is eliminated by using bidirectional switching devices. [59] [28].

A variation on Figure 24(b) is posed in [60] [61] and utilizes an additional full bridge rectifier, a

selective switch and a high frequency transformer to redirect energy from the vehicle battery to an

auxiliary battery, see Figure 25. The selective switch also enables unity power factor. The charger

acts as a resonant half-bridge converter for both directions of power flow. The advantages of this

charger area high efficiency through ZVS and ZCS with low switch stress and small circulating

current. A version with a PFC filter is shown in [62], which compensates for harmonics caused by

the rectification stage of the charger.

Another variation is in [63] and the topology is shown in Figure 26. In this topology the leakage

inductance forms a resonant circuit with the voltage-clamped capacitors, CP, Cs1 and Cs2. All

switches are all turned on and off with ZCS; thus the switching losses are reduced. When the AC

line voltage is lower than the battery voltage, the secondary switches turn on, so the losses caused

by the secondary switches are very small. One part of the energy transferred is stored in the

transformer leakage inductance and then transferred to the battery. The other part of the energy is

directly transferred from the ac source to the battery. The presented topology possesses a high-

power output capability by combining both energy transfer patterns. The topology has been used in

a battery charger made by Brusa. A clamped capacitor version is described in [64].

A further topology based on the full bridge is the phase-shifted ZVS full bridge which emphasizes the

use of ZVS to achieve high efficiency. The bridge switches are delayed and the primary side of the

transformer is clamped to the voltage rail during power transfer. The primary current flows into the

switch capacitance and when the other switches are turned on and the first set turned off, ZVS is

achieved. [65]

40

The full bridge topology in general can easily be modified for bi-direction functionality with an increase

in control system complexity. The circuit can also be modified for 3 phase operation either by using

three a single phase chargers, or by an integration of circuits between phases. Power output is

generally low however can be in the order of a few kW or tens of kW with good power quality through

PFC methods. Resonant converters can be unreliable as high repetitive currents are present across

the capacitors causing their lifetime to shorten and faults to occur.

Figure 26 - Resonant dual active bridge converter

2.1.15 Summary

From this survey it was determined that the 2 transistor Flyback converter would be used as the

basis of the battery charger. This topology will be 2 of these topologies per phase, wired in delta

configuration since a neutral supply cannot be guaranteed. Each flyback topology is to supply 1.5

kW mean to the battery (assuming 100% efficiency). A single flyback topology is seen in Figure 27.

Figure 27 - Two switch flyback topology

The interleaving of converters that effectively doubles the switching frequency and introduces smaller

input current ripple [66], so the size of the input EMI filter is reduced as well as it being used to

41

increase the power output of the converter easily but at the cost of more components. Also the

importance of careful design of the DC-DC converter element can prevent or minimise the need for

an active filter or PFC measures while keeping the power factor high. Some important design features

were seen while the survey was conducted, such as utilizing a MOSFET in parallel with an IGBT to

utilize the fast turn-on capability of the MOSFET to lower turn on losses but also utilize the low on

resistance of the IGBT to avoid losses through the device [67]. Also noticed from the survey very few

chargers are designed using 3 single phase chargers. Further summary papers were also read and

considered [10] [25] [26] [68] [69] [70] [71] and nothing was found to be close to the design proposed.

The flyback topology has the advantages of being isolated, being a simple circuit with few

components and therefore low cost, and having a simple control in uni-directional operation. The

topology could be an improvement over existing designs as it meets all the essential conditions

outlined at the start of this chapter:

Galvanic isolation – The flyback incorporates isolation as part of its design whereas most

other topologies do not include this.

Low device count – Has a low component count

Output voltage control – Output voltage range achievable through careful design of the

coupled inductor/transformer.

3 phase operation – Capable through either 3 phase rectification or 3, single phase

chargers, in delta or star configuration.

Adherence to power quality standards – Inherently high power factor and low THD

Simple control – Simple control system for uni-directional operation however the 3 phase

rectifier/inverter circuits would need control loops to force the current to be sinusoidal.

Efficiency – High (>90%) efficiency with careful magnetics design

Power factor correction – The flyback topology, if operated in Discontinuous Current Mode

(DCM) with a fixed duty ratio, naturally performs Power Factor Correction (PFC) in a single

phase system [72].

Electrolytic converters – As electrolytic capacitors are not suitable for this topology as the

ambient temperatures can be between -10°C and 80°C and electrolytic degrade: see section

4.5. Other topologies rely heavily on electrolytic capacitors.

A further advantage of the flyback converter is an “energy pump”. It passes packets of energy from

the mains supply to the battery at a frequency, fs, and is not very sensitive to battery voltage (with

careful design).

Regarding disadvantages of the flyback converter, such as transformer size and high current peaks,

these disadvantages can be minimised with careful design and additional circuits. Further to this,

transformer leakage energy is seen across the switch at turn off, and so the topology requires a

snubber to reduce the effect of the leakage energy on the switch. Snubbers are discussed in the next

chapter.

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The flyback topology has advantages over the designs discussed as it has a greater output power

capability and higher efficiency than basic designs such as bridge rectifiers. Active rectifiers tend to

suffer greater device losses due to the higher number of devices used. There is an advantage over

both buck and boost converters as these both lack isolation of the input from the output. This

advantage is also reflected in the Sepic, Cuk and Zeta converters. Furthermore with a flyback

converter, the output can be easily manipulated through careful design. More advanced forward

converter designs require a multi winding transformer in order to operate, whereas a similar operation

can be achieved with a flyback converter and a simpler transformer. Vienna, Swiss and multilevel

converters use a high number of semiconductor devices and require a complex control in order to

operate effectively, and also require unreliable electrolytic capacitors.

As for the overall charger topology, it was decided that a 3-phase charger would be comprised of 3

single phase chargers: which in turn are comprised of 2 parallel flyback converters. These would be

connected in a delta configuration so that the charger can operate from a 3-wire, 3 phase supply,

and hence avoiding neutral currents. Also notices from the survey, was that very few chargers.

Further summary papers were read and considered [26] [25] [36] [68] [69] [71] [73] and nothing was

found to be close to the design proposed.

A survey and a review of standards associated with EV charging showed that, from the perspective

of the utility, power factor correction and keeping the power quality high are important aspects of the

charger design. Power delivery, overall efficiency, THD, ease of control, cost, size and weight are

important aspects from an EV manufacturer perspective.

Integrated and bi-directional converters were investigated to a degree and while the integrated

battery chargers can save money in the short term by already having the majority of components in

the EV infrastructure, the maintenance costs, should something break, would be extremely

expensive and therefore integration of a battery charger into the EV was not considered for this

project. However, the use of a bi-directional charger could be very useful as the charging of a

commercial vehicle fleet is often likely to take place at the same time; it is possible that the stored

energy in the batteries of the EVs could be used to support the grid if needed. This extra functionality

is at the cost of extra circuits/components, a more complex control system and potentially reduced

charger performance therefore initially the charger was designed to be uni-directional with a view for

bi-directional functionality in the future.

The survey and a review of standards associated with EV charging also shows that, from the

perspective of the utility, power factor correction and keeping the power quality high are important

aspects of the charger design. Power delivery, overall efficiency, THD, ease of control, cost, size and

weight are important aspects from an EV manufacturer perspective.

For the highest efficiency, the flyback converters require snubbers. The next chapter will look at these

in detail however there are no switching losses at turn on (due to discontinuous current mode, DCM),

therefore Chapter 3 will only consider turn off snubbers.

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3. Flyback snubbers - literature survey and review

The previous chapter discussed charger topologies and concluded that the two transistor flyback

topology will be the basis of the charger. A disadvantage of using the flyback topology in DCM is that

at the end of the switching period, there are ‘turn off’ switching losses, which will reduce the efficiency

of the converter, and can also damage the semiconductor switch. The switching losses at turn off

occur because the switch has high voltage across it and simultaneously high current through it. [74]

A well-known technique for reducing switching losses is to implement a turn off snubber circuit. The

snubber circuit reduces the dv/dt across the switch, enabling the switch to turn off its current at a

relatively low voltage, reducing heat dissipation in the switch and prolonging the switch lifetime.

Snubbers also have the advantage of reducing electromagnetic interference. There are numerous

topologies for snubbers and they can be largely split into two groups; dissipative and non-dissipative

snubbers [74].

Dissipative snubbers are relatively simple to design and implement, and collect the switching energy

and dissipate it in a resistor. However the energy is then lost in the resistor and the overall efficiency

of the converter is reduced. However these are relatively simple to design and implement.

Non-dissipative snubbers typically recycle the switching energy and reuse it, returning the energy to

the source. Thus non-dissipative snubbers reduce the stress on the switch and also increase the

efficiency of the converter. However non-dissipative snubbers can be complex to design and

implement and have varying degrees of success.

There are many possible snubber configurations available therefore this thesis presents a summary

of the most basic and common snubber circuits, focusing on non-dissipative snubbers for use in

flyback converters.

3.1 Dissipative Snubbers

Dissipative snubbers are considered simple and effective but inefficient. A further way to classify

dissipative snubbers is through polarization - they can either be polarized or non-polarized.

3.1.2 Non polarized snubbers

The RC snubbers shown are classified as non-polarized, and can be placed in many configurations

and will still operate correctly.

3.1.2.1 RC snubber

One of the most common kinds of dissipative snubbers is the RC shunt, where a series combination

of resistor and capacitor are placed in parallel with the switch, as in Figure 28. The combination limits

the rate of rise of the voltage across the switch at turn off and when the switch turns on again the

44

charge collected by the capacitor is dissipated in the resistor. The configuration only reduces the

switch turn off losses [75].

Figure 28 - RC turn off snubber

3.1.3 Polarized snubbers

These snubbers are classified as polarized since they can be placed in only specific configurations

to ensure correct operation.

3.1.3.1 RCD snubber

Based on the non-polarized RC snubber, this circuit employs an additional diode, Dc see Figure 29.

At turn off the RCD snubber limits controls the rate of rise of voltage across the switch. When the

switch is turned off, current flows to the capacitor Cc via Dc. At the next turn on instant, the stored

energy in capacitor Cc is mostly dissipated in the resistor Rc. The snubber is widely applied because

of its simplicity and the use of only passive components [75].

Figure 29 - RCD turn off snubber

3.1.4 Unconventional dissipative snubbers

There are also dissipative snubbers that have been developed to suit different applications or to

tackle additional issues in the circuit; these will only be briefly mentioned here.

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3.1.4.1 RCD-R snubber

The RCD-R snubber is shown in Figure 30. In this circuit the transformer leakage inductance, Lk, is

drawn separate to the rest of the transformer. This circuit is adapted from the conventional RCD

snubber. The snubber basically operates as a clamp and protects the switch from high overvoltages.

It does not reduce the switch dv/dt and does not significantly reduce switch turn off loss. [76]

Figure 30 - RCD-R turn off Snubber

3.1.4.2 Dual dissipative snubber

The RCD snubber circuit can be applied to the proposed two transistor flyback circuit as shown in

Figure 31. However, since the aim of the project is to have a high efficiency, it was decided to

investigate non-dissipative snubbers.

Figure 31 - Dual switch RCD snubber

3.1.5 Non dissipative snubbers

In modern converters, the use of non-dissipative snubbers is much more common. There are many

of possible combinations for snubbers in modern converters, however not all are applicable to the

flyback configuration. This section will only describe the most basic and common non-dissipative

snubbers for the flyback converter.

46

3.1.6 Conventional diode clamp snubber

The basic diode clamp circuit, as shown in Figure 32, is used to clamp the voltage across the primary

of the transformer to the input voltage. By this means, should the reflected output voltage to the

transformer primary side be higher than the input voltage the switches are protected. Additionally

some or all of the leakage inductor energy is returned to the input source [77]

Figure 32 - Conventional diode clamp snubber

The main disadvantage of the circuit is that if the converter is fed from a rectifier, then the energy

cannot be returned, unless a capacitor is connected across its supply. Consequently the topology

cannot be used for power factor correction. There are variations on this snubber; the most common

are shown in the next section.

3.1.6.1 Diode clamp snubber variation

A variation proposed by D. Murthy-Bellur et al, [78] is to insert switches in parallel with the diodes

and use a clamping capacitor to limit the voltage across the transformer primary. in this circuit the

transformer is modelled as an ideal transformer with external leakage and magnetising inductance.

In Figure 33, Co1, Co2, Co3 and Co4 are the switch parasitic capacitances.

47

Figure 33 - Diode clamp variation

The operation of the snubber is much the same as the conventional diode snubber with the exception

that clamping capacitor, Ca, resonates with the leakage inductance to limit the peak voltage across

switch, S2. Additionally diode voltage drops are reduced by virtue of S3 and S4, which improves

efficiency. However to discharge switch parasitics Co1 and Co2 or Co3 and Co4 to create ZVS

across the switches and therefore raise efficiency. However an additional control to trigger switches

S3 and S4 is needed which increases losses and complexity.

The circuit has the advantage of being able to be supplied directly from an AC rectifier as the leakage

energy is returned the the transformer by S3.

3.1.6.2 Basic capacitor clamp snubber

Another variation of this circuit is the diode clamp circuit shown in Figure 34, developed by S. Kam-

Wah and L. Yim-Shu. [77] In this circuit the transformer is shown with its leakage inductance as a

separate element. This simple regenerative clamping circuit uses two diodes, D1 and D2, a clamping

capacitor, Cclamp, and an auxiliary switch, S2, to achieve soft switching across the main switch, S1.

The operation is as follows: Assume the top plate of capacitor, Cclamp is initially positively chared

with respect to its lower plate, first the main switch and auxiliary switch are both turned on and the

clamping capacitor, Cclamp, begins to discharge through the magnetizing inductance, Lm, and the

leakage inductance, Lk. Once Cclamp is completely discharged, diode, D1, is forward biased and

the current in the leakage and magnetizing inductance increases linearly.

When both switches are turned off, the magnetizing current charges the main switch parasitic

capacitance, Coss1, until diode, D2, conducts. Once D2 is on, the magnetizing current diverts to

charge Cclamp and the auxiliary switch parasitic capacitance, Coss2. When the voltage across

Cclamp is larger than NVo, the output diode, Do, conducts. When Do conducts, the output current

increases (thus the primary input current decreases) linearly and all magnetizing current flows to the

48

output. When the magnetizing current reduces to zero, a resonance current flows through Lm and

Lk which discharges the parasitic elements of the circuit and when the parasitic capacitances are

fully discharged, the switches can then be turned on again to start the next switching cycle. [77]

Figure 34 - Basic capacitor clamp snubber

The advantages of this topology are in its simplicity, as it uses very few components to achieve Zero

Voltage Switching, ZVS across the main switch, S1. This reduces the switch turn-off loss and

maximizes the conversion efficiency. The circuit is claimed to be 89% efficient at 100W output power,

which is good. No additional control is needed as both switches are triggered simultaneously.

A disadvantage of the topology is that it is only suitable for low to medium power applications due to

the converter not sharing voltage equally between both switches. It would be very difficult to devise

a dual switch converter using the capacitor clamp snubber topology and the result would have 4

switches, making it potentially less inefficient.

3.1.7 Active clamp snubber

A commonly used snubber topology is the active clamp topology. This topology borrows from the

diode clamp as it reduces the stress on the switch by clamping the voltage across the primary to the

input voltage plus the voltage across the clamping capacitor. There are 2 configurations of the circuit

which are shown in Figure 35. In both configurations the leakage and magnetising inductances are

shown separate to the ideal transformer.

For both the N and P channel clamps the operation is basically the same. Initially switch Sa is off,

and Cc is charged so that its left hand plate is positive. When the switch, Sw, turns on, the current in

the primary side increases linearly. When Sw turns off, the switch parasitic capacitance Coss is

charged by the magnetizing current and the drain-source voltage of Sw increases.

When Vds = Vin - Vc, the diode across Sa turns on and power is delivered to the output. The energy

delivered by the leakage inductance is stored in capacitor Cc, the primary current decreases linearly

49

and the magnetizing current is transferred to the secondary side. The diode in Sa turns off and the

energy is delivered to the load.

When this period is over, Sa is turned on and Cc discharges through Lm and Lk. The energy in Cc

is then delivered to the output. The auxiliary switch Sa is then turned off, leaving Cc with its right

hand plate charged negatively.

Tests in [79] [80] [81] show that the efficiency at 100W is typically around 90% with this snubber

topology, however a feedback control system is needed for the auxiliary switch, Sa and this can be

complex.

It may be possible to develop a two switch version of this converter with 2 active voltage clamps,.

The circuit would be reliable as the issue of voltage sharing is guaranteed, however a disadvantage

of the active clamp snubber is that the clamping transistors are MOSFETs.. N and P channel

MOSFETs typically have a Vmax of around 600V, although higher rated devices are available but

are expensive [82]. IGBTs could be used instead, but would have extra conduction losses

Figure 35 - Active clamp configurations, top: N-type clamp, bottom: P-type clamp

3.1.7.1 Active clamp variations

There are variations on the active clamp topology. The first, devised by K. Gwan-Bon and Y Myung-

Joong, [83] is shown in Figure 36. This topology implements the N-type active clamp with a

highlighted auxiliary circuit. The auxiliary circuit helps achieve Zero Voltage Switching, ZVS by fully

discharging the switch capacitances of S1 and auxiliary switch, S2, storing the energy in capacitor

Caux and returning it to the output when clamping capacitor, Cc discharges. The topology increases

the overall efficiency by ensuring ZVS for each switch (also reducing the stress on each switch) and

returning energy back to the circuit; however the circuit still has the fundamental issue mentioned in

the previous section. A feedback control circuit is needed from S2.

50

Figure 36 - Active clamp with auxiliary ZVS circuit

Another variation on the active clamp was pioneered by N.P. Papanikolaou and E.C. Tatakis, [84].

The topology is a variation on Figure 36, in that it replaces the auxiliary inductor with a transformer

with a secondary connected to the output, as shown in Figure 37.

Figure 37 - Transformer active clamp

Here, when both switches S1 and S2 are on, the current is delivered to the primary of the transformer

and capacitor, Cs, draws charge up through the auxiliary transformer, Ls. When S1 turns off,

transformer L1 discharges through Ds and into Cs and Ls. And when S2 is off, Cs discharges into

Ls and rings around the diode configuration. The addition of the Zener diode helps regulate the

voltage delivered to the output through Ls.

This method of operation is more efficient than that in the previous methods. Previously the leakage

energy would have to be cycled through the main switch twice before it is outputted. Once on the

initial turn on and again when it is released from the clamping capacitor. The circuit shown in Figure

37 releases the energy through the auxiliary transformer to the output.

However there will be need for additional snubbers so as to recover the energy from the auxiliary

transformer leakage inductance therefore energy will be lost to these additional components. Also

51

the addition of the auxiliary transformer makes the circuit impossible to use in an efficient dual switch

topology.

3.1.8 LCDD snubber

The LCDD regenerative snubber Is shown in Figure 38. This snubber clamps the voltage across the

switch T, limits the dv/dt seen by the switch, and recovers energy from the leakage inductance and

returns it to the supply. The topology has been developed multiple times in several papers [85].

Figure 38 - LCDD single switch snubber

In Figure 38 the ideal transformer has been omitted for simplicity and represented by Lm and Ls

alone. When transistor T turns off, most of the energy in leakage inductance Ls is absorbed by

capacitor C, via the loop: Ls-C-D2-Lm, producing a reduced transistor voltage slope, voltage

overshoot and switch turn-off loss. The remainder of the leakage inductance energy is dissipated in

the load, Ro. When iLs reaches zero the polarity of the capacitor, C, is as shown, without circles, and

its voltage depends on the energy balance in the loop. If Vc is higher than the source plus the output

capacitance voltage (Vs+Vco) then the capacitor discharges through the loop C-Ls-Lm-Vs-D1-L and

transfers energy to the load (since this is in parallel with Lm) and power source, Vs.

When T is turned on, C discharges completely through C-T-D1-L and changes polarity (to the signs

shown circled) ready for the next transition.

This snubber topology is low cost and straightforward to implement. This is a very simple, easily

controlled and cheap topology. The only drawback it has is the unfavourable turn-off switching

conditions in which the switch is stressed by both maximum current and voltage. The snubber

capacitor C restrains this negative effect by reducing the overlap time of the switch current and

voltage (and in turn the loss) during switch-off transition. The energy stored in C is transferred to the

load very efficiently. However, the value of C must not be too large since that will produce increased

losses in the snubber components (D1, D2, L,) and an additional turn-on loss in the transistor. A

further advantage is that the snubber circuit can be applied to the proposed two transistor flyback

converter.

52

3.1.8.1 Dual LCDD snubber

A dual switch version is shown in Figure 39 [86]. The 2 snubbers are connected through the diode,

Dp and the operation is practically identical to the single switch version.

Figure 39 - Dual LCDD snubber

At t=0, S1 and S2 are turned on simultaneously under a zero current condition. The transformer

primary current passes through S1 and S2 and increases linearly meanwhile the clamping capacitors

Cs discharge through Ls in a resonant manner. In this mode, the magnetising inductance L1 and the

leakage inductance Llk (both not shown) are charged up linearly by the input voltage source Vi.

S1 and S2 are turned off simultaneously under zero voltage soft switching. The magnetising current

begins to charge up Coss1 and Coss2 in the switches to the point where the diode DP begins to

conduct. The magnetising current is diverted through DP to charge up the capacitors Cs1, Cs2,

Coss1 and Coss2. When Vcs1+Vcs2 = nVo and the output diode Do begins to conduct. The output

current starts to increase and the leakage inductor current begins to decrease. When the leakage

inductance ilk, drops to zero the voltage across the primary side of the transformer is nVo. The

remaining magnetising current flows into the output. When Vp > Vi+nVo, Cs1 and Cs2 discharge to

the output. The magnetizing current in the secondary falls to zero and the switch voltage rings around

vi/2 due to the transformer inductance and switch capacitance and S1 and S2 are turned on for the

next cycle.

While this dual switch improves the ZCS and ZVS conditions, there is no guarantee of voltage sharing

in the switches, which may lead to a problem if there is a delay in the control to one switch or if one

switch is particularly lossy. It is possible one switch will take the full voltage and be damaged as a

result.

53

3.1.8.2 Transformer wound LCDD snubber

A novel variant of the LCDD snubber has been developed a number of times and is featured in

numerous papers [87] [88] [89] [90]. The circuit is shown in Figure 40. This is a standard LCDD

snubber however the snubber inductor is wound onto the flyback transformer as a tertiary winding,

there by assisting movement of some energy to the output of the converter in the same way the

transformer active clamp worked previously.

Figure 40 - Transformer wound LCDD

The circuit requires an extra winding on the transformer, with good coupling to the secondary winding,

adding complexity. For a two transistor flyback converter, two windings would be needed and the

transformer would become larger. For this reason it was decided that this snubber topology is not

suitable.

3.1.8.3 Flyback LCDD snubber

This circuit is similar to the transformer wound snubber topology, however the tertiary winding is

replaced by an auxiliary transformer connected to a switch controlled flyback configuration producing

another output [91]. The configuration is shown in Figure 41 and is similar in principle to the

transformer active clamp and the transformer wound LCDD snubbers topology mentioned previously.

As with the previous topology, this circuit is deemed to be complicated, producing a bulker design,

with extra mass. For these reasons the topology is considered unsuitable for the proposed battery

charger.

54

Figure 41 - Flyback LCDD snubber

3.1.9 Transformer dual switch snubber

The transformer dual switch snubber is an uncommon design that has been pioneered and

developed several times by E. Konishi et al [92]. The converter consists of two passive lossless

snubbers with power regeneration loops for energy recovery in conjunction with a three winding

auxiliary high frequency transformer, auxiliary capacitors and diodes. The circuit is shown in Figure

42.

Figure 42 - Transformer dual switch snubber

The authors claim that the topology can produce 1 kW at 93% efficiency. A disadvantage to this

circuit is the number of components used. As the power output increases, the losses within the

devices will increase offsetting the efficiency at high power. Further the circuit is complex and has an

extra transformer which will add weight and bulk, detracting from its suitability as an onboard battery

charger.

55

3.1.10 Other non-dissipative snubber designs

There are other snubber designs that do not borrow from the above designs, and are typically only

covered in a single paper and not developed further. However elements of these designs may be

useful in the design of new snubbers or the designs may be improved or reduced to create new

snubber designs. Some of these are described in the following section.

3.1.10.1 Dual transformer snubber

This flyback converter uses a series input, parallel output, interleaved snubber design, that clamps

the voltage of the switches to the input voltage and increases efficiency by recycling the switching

energy though the transformers to the output. Because of its design the authors claim it can have a

maximised power density [93]. The converter circuit is shown in Figure 43.

Figure 43 - Dual transformer snubber

The operation is as follows: Switch, Q1, is in turn-on state. Vin/2 is provided to series connected

transformer magnetizing inductance, Lm1, and leakage inductance, Llkg1. Currents, iLm1 and iLlkg1

are increased linearly and Lm2 transfers its stored energy to the secondary side through diode, Dr2.

ILm2 decreases with the slope of nVout/Lm2 and Q1 is then turned off.

The magnetizing and leakage current now charge the parasitic capacitance, Coss1, in Q1, once

Voss1 = Vin/2+nVo, diode Dr1 is turned on. When Dr1 is on, iLm1 decreases linearly with the slope

of nVo/Lm1. The leakage charges Coss1 in a resonant fashion. The current difference of iLm1 and

iLlkg1 is delivered to the secondary through Dr1. When the voltage across S1, Vq1=Vin, Dc1 is

turned on. The energy stored in Llkg1 is transferred to snubber capacitor, Cb2, and the input source

and iLlkg1 decreases linearly.

After iLlkg1 becomes zero and Dc1 is turned off, Lm1 and Lm2 deliver their stored energy to the

secondary side of the converter via Dr1 and Dr2. iLm1 and iLm2 decrease linearly and Q2 is turned

on. This operation is now repeated symmetrically for the second transformer until Q1 is again turned

on. The outputs of the converter are interleaved to supply the load.

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The advantages of the circuit are that transistor the switching stresses are reduced and the energy

in the transformer leakage inductances is recovered.

The issue of voltage sharing is not discussed by the authors. A disadvantage of the circuit is the use

of 2 transformers which will be expensive and add bulk and weight to the battery charger.

3.1.10.2 Single-stage snubber

This single-stage, single switch snubber was designed by C. Tae-Jin et al [94] and has an auxiliary

transformer connected across the output of the converter. It is claimed the topology can effectively

reduce the voltage stress on the link capacitor and can achieve power factor correction (PFC) without

a dead band occurring at line current zero crossings, thereby reducing harmonic distortion in the AC

line current. The converter circuit is shown in Figure 44.

Figure 44 - single stage snubber

The snubber proposed is complicated as it requires double the number of transformers and a large

amount of components therefore making it lossier. Furthermore this circuit is not easy to implement

in a two transistor flyback converter therefore meaning this converter is rejected.

This topology had two transformers and only suitable for low power applications due to the single

switch. It is considered that forming a two transistor version would be difficult. The auxiliary

transformer will require additional snubbers to capture the energy from its leakage inductance. The

overall efficiency is claimed to be 82% and is poor in comparison to some designs previously shown.

The design is considered to be unsuitable for use in the proposed battery charger

3.1.11 Summary

In conclusion, non-dissipative snubbers are superior to dissipative snubbers. The most commonly

used snubber types are the active clamp and the LCDD snubbers. These are both simple, have high

efficiency and help reduce the stress on the flyback switch.

The active clamp circuit is a topology that could be developed as it clamps the voltage across the

switch to the input voltage, and in some cases, the input voltage plus a snubber capacitor voltage.

57

Thus all the energy lost in the high voltage switching transients caused by the transformer leakage

inductance, is recovered in the snubber and therefore the efficiency is high. However the use of an

additional switch in the snubber means that a control system is needed and the complexity is

increased. Another disadvantage is the use of the power MOSFET as the additional switch as

MOSFETs high power ratings are expensive. Some work would also need to be done to developing

a dual switch variation.

The various improvements to the active clamp described in the literature show that the efficiency can

be further improved by using a coupled inductor in the snubber, so the energy recovered can be sent

to the output directly, avoiding a return of the energy through the switch and incurring further parasitic

losses. The disadvantage here is that snubbers will be needed to protect the switch against the

snubber transformer leakage inductance current discharging into the switch at turn on, and

furthermore, extra components are needed with a consequent reduction in efficiency.

The LCDD snubber is a particularly attractive design as it is simple and efficient, has low parasitic

losses in the few components used and can recover energy from the transformer leakage inductance

at turn off. The topology can use IGBT switches which are relatively cheap and have high voltage

and current ratings, so that a high power dual switch converter can be developed. A disadvantage of

the snubber is that it is still limited by voltage transients across the switch at high power; therefore

an additional clamping component may be needed and voltage sharing across the switches is not

guaranteed in every instance.

Using a tertiary winding in the LCDD snubber is proven to increase the efficiency by directing the

recovered energy to the output, avoiding additional parasitic losses in the switch. A dual switch

version of this topology would need to be investigated to determine the advantages.

It was decided that the LCDD snubber circuit would be will be investigated further, with the aim of

developing a two-transistor flyback converter topology suitable for use in the proposed battery

charger. The next section details the flyback converter design.

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4. Flyback DC-DC converter design

In the previous chapters it was determined that the 3-phase charger will comprise two paralleled, two

transistor flyback topologies per phase, and each phase will be connected in a delta configuration so

that the flyback converters operate from line to line. By having two flyback converters per phase,

operating in phase opposition (ie the transistors in one converter conduct when the transistors in the

other are off and vice versa), a smoother transfer of power to the battery will occur, and input filtering

is eased. The converters will operate in discontinuous conduction mode (DCM) in order to endure

the charger appears as a resistive load to the supply and provides close to unity power factor. DCM

additionally provides a simple means of control, compares to continuous conduction mode (CCM).

The supply voltages are to be between 380V and 440V (rms line to line) and the output voltages are

to be between 320 Vdc and 420 Vdc.

Estimating the peak transformer current to be approximately 30 A and the switching frequency to be

33 kHz, equation (1) determines the power requirement that can be met over the specified range of

input and output voltages, if the primary transformer inductance is 250 µH (in a single phase unit)

and if its leakage inductance could be kept lower than 10 µH. This requires a peak primary current

of 27A. The peak power transferred is then given by [95]:

𝑃 = ½ ∙ 𝐿 ∙ 𝐼2 ∙ 𝑓 (1)

where f= 33kHz, L = 250μH and I = 27A

Thus, the peak power transferred is: ½ ∙ 0.000250 ∙ 272 ∙ 33000 = 3 kW, halving this gives the mean

to be 1.5 kW as before. However, in order to keep transformer size and losses down, it is

advantagous to minimise the magnetizing inductance. This can be done by increasing the peak

current. From the various 1.2kV devices analysed in chapter section 4.4, a typical collector current

is around 50A, derating this for a worst-case case temperature of 80°C gives approximately 39A and

derating this futher for safety [96] gives 31A. Keeping the desired power level, the new magnetizing

inductance is now 190μH. Therefore: ½ ∙ 0.000190 ∙ 312 ∙ 33000 = 3 kW.

4.1 Initial flyback design

Figure 47 shows a single phase flyback converter; here, two phases of the three phase supply are

fed into the single phase bridge rectifier. The peak output of the bridge rectifier is 680 Vdc, and can

be considered constant over one switching cycle. Also constant are: the output voltage (420V dc),

the switching frequency (40kHz), the magnetizing inductance and subsequently the leakage

inductance (190uH/10uH) and turns ratio (1:0.647).

The output of the bridge rectifier supplies the flyback circuit, which has three distinct stages of

operation. The first stage is when the switch is closed, current ramps up in the transformer primary,

and energy is stored in the magnetizing inductance of the transformer. The second stage is when

the switch is opened and the magnetizing inductance energy is released into the load through a diode

59

that prevents energy returning to the primary. The third stage is when all the magnetic energy has

been supplied to the battery, but before the switch is turned on again [97].

For the simulations and experiments in this project there are 4 extremes of operation. These

extremes of operation are: high input and output voltage, high input and low output voltage, low input

voltage and high output voltage and low input and output voltage. In each of these 4 cases the worst

case is always at the peak of the input voltage, where the transformer flux is at its maximum, this is

shown in Figure 45. This diagram ignores losses, leakage inductance effects and snubber action.

For the final envisioned flyback converter, the power transferred at the peak of the input voltage

waveform, will be double the average power sent to the battery. A representation of the output power

can be seen in Figure 46.

Figure 45 - Worst case operation

Figure 46 - Representation of power transferred at output

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Switching waveforms can be seen in Figure 48, showing the primary side current, I1, the secondary

side current, I2, and the switch voltage Vsw. At turn on, I1 rises for the length of the duty period until

switch turn off. At turn off the magnetic energy is transferred to the secondary side (I2) and

simultaneously the leakage energy in the transformer produces a voltage across the switch, S. The

switch voltage increases above the input voltage due to the leakage energy in the transformer, and

rises to 1.5kV. After the leakage energy dissipated, Vsw reduces to a value equal to the sum of the

input voltage and the reflected output voltage 1.2 kV, until I2 has decayed to zero and the transformer

has demagnetized. In the third stage (after approximately 114.997 msecs) the switch voltage returns

to 680 Vdc but has oscillations superimposed upon it due to switch capacitance and transformer

inductance. In the worst case the switch must withstand at least 1160 Vdc (680Vin + 480Vout) plus

a further voltage due to transformer leakage inductance. In this particular simulation the switch has

absorbed the transformer leakage energy and has clamped the voltage to 1.5 kV. In practice the

switch would probably be destroyed.

Figure 47 - Basic flyback topology

Figure 48 - Basic flyback waveforms showing primary current (I1), secondary current (I2), and switch voltage

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Typically, mains powered equipment transistors are de-rated to 80% of their peak voltage [98]. One

possible solution to reducing switch voltages is to use two series connected 1200 V IGBT switches

in place of one switch, however the transistors would require voltage sharing circuits which

incorporate resistive energy loss components and the concept was considered too inefficient. A

further solution is to place the IGBT switches either side of the primary side of the transformer. Adding

a transistor to either side of the transformer halves the switching voltage by sharing it across both

transistors. At this stage of circuit development, the additional transistor can be added either side of

the transformer to create voltage sharing in this way, however, at the introduction of a snubber (see

section 4.2.7) the switches are placed either side of the transformer to ensure voltage sharing by

balancing the circuit. This modification produces a simpler and more efficient voltage sharing

technique. The revised circuit can be seen in Figure 49.

Figure 49 - Two switch flyback topology

Figure 50 - Two switch flyback waveforms showing primary current (I1), secondary current (I2), and switch voltage (Vsw)

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In the simulation two identical switches are switched simultaneously and voltages are shared equally

providing the conditions of simultaneous switching are adhered to. This is because the switches can

be seen as simple resistances and capacitances. Ideally, these resistances and capacitances are

identical and the voltage is distributed evenly between them – this is why any snubber circuity is

placed identically across both switches. In practice, the transistors would differ slightly in terms of,

turn on and turn off times and therefore create an imbalance in the voltage transients seen by the

transistors. This can be part mitigated through use of a high value resistor across the collector and

emitter of the device, creating a further voltage divider, making the difference smaller. The capacitor

on the output of the bridge rectifier is small and can be ignored in this analysis. However the leakage

inductance of the transformer is still a problem, since it can create a high voltage across the IGBTs

at turn off and damage them. The transformer leakage energy can be controlled and prevented from

overvolting the transistors through the use of snubbers to dissipate the energy. Figure 50 shows the

simulated switching waveforms for the two switch topology, illustrating the switch voltages rising to

just above 1.5kV then settling at the input voltage 680V. Again, in this simulation, the switches have

dissipated the leakage energy, but in practice they would have been destroyed.

Figure 51 shows the chosen flyback topology with snubbers in place. The design used is based on

a paper by Petkov and Hobson [85], see chapter 3. The snubber circuits remove the energy in the

leakage inductance of the transformer and deposit it in the capacitor, C whilst reducing the switching

losses in the circuit. The energy stored in C is then used on the next switching cycle. Figure 52 shows

the operation of the snubbers in detail; when the transistors turn-on, current, I1, increases linearly

and at the same time the snubber capacitors, Cs1 and Cs2, discharge via Ls1 and Ls2, the snubber

inductors. The inductor Ls1, diode, D1 and capacitor Cs1 form a resonant circuit, so that by t1 the

voltage across Cs1 has reversed. Similarly the voltage across Cs2 is reversed by time t1. When the

switches turn off at t2, the current in the leakage inductance of the transformer diverts to Cs1 and

Cs2 and the rate of rise in Vsw is limited. Also the rate of rise of I2 is limited and the capacitors Cs1

and Cs2 are recharged to their original levels. The chosen single phase topology is shown in Figure

53.

Figure 51 - Petkov flyback topology with regenerative snubbers highlighted

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Figure 52 - Flyback with Petkov snubbers waveforms showing primary current (i1), secondary current (i2), snubber inductor current (iLs), switch voltage (Vsw) and snubber capacitor voltage

(Vcs)

Figure 53 - Two switch flyback topology (separate flybacks highlighted)

In the proposed design there are to be two flyback converters per phase, which are interlaced by

connecting the two power stages in parallel across the rectifier bridge DC output and operating the

converters out of phase with each other, see Figure 53. The two converter outputs are applied to the

battery. Since the two converters operate in phase opposition, the AC input current ripple frequency

is doubled and the size of the filter components can be reduced [99]. Also interleaving converters in

this way gives a more continuous battery current, producing lower battery heating.

4.2 Flyback snubber configurations

From this initial analysis, it was determined that the Petkov snubber design [85] is suitable for this

application as it recovers energy effectively from the leakage inductance of the transformer while

64

managing to keep the transistor voltages and currents below 960V and 31A respectively. In the next

section, modifications are made to the circuit in an attempt to improve on the operation and ultimately

the efficiency, are described. All simulations in this section are for a single phase circuit, set to

achieve a primary current peak of 31A and 960V across the transistor. Also the flyback transformer

exhibits a 5% leakage inductance. The maximum input voltage is 680V (≈480 × 1.414) and the

battery output voltage is 420Vdc in every simulation. For the SIMetrix waveform results, a current of

10A is represented by a voltage of 1 kV, due to the scaling factor used.

4.2.1 Petkov snubber circuit

Figure 54 shows the circuit diagram, where Ls1 and Ls2 are the snubber inductances, Cs1 and Cs2

are the snubber capacitors and Ds1 and Ds2 are the snubber diodes.

Figure 55 shows simulations results, for the conditions where Ls1 and Ls2 are 100uH, and Cs1 and

Cs2 are 100nF. The results closely follow conventional flyback operation with the primary current, I1,

rising from turn on, to its peak value (31A) then dropping rapidly at turn off, where the energy is

transferred to the transformer secondary side. The transfer can be seen in current I2 and the switch

voltage, Vsw, as they both rise to their respective peaks (31A and 960V respectively). The snubber

action can be clearly seen as the rate of rise in both I2 and Vsw is slower than previously (Figure 50)

and also the peak of current I2, is reduced as a result of the snubber action limiting the rate of rise

in I2, therefore reducing the output power of the converter.

Figure 54 - Petkov snubber

Here, Ls1 and Ls2 control the rate of rise of primary current I1. Making the values of Ls1 and Ls2

larger limits the primary and secondary peak currents and the output power of the converter, whereas

reducing their values enables complete charge reversal for Cs1 and Cs2 before I1 has reached its

peak value for I1, but a half sinusoid impulse in the transistor current waveform. Cs1 and Cs2 control

the rate of rise of the switch voltage Vsw. Setting their values too small can overvolt the switch.

From the results in Figure 55 it appears the required de-ratings in transistor voltage and current can

be met, however when the switches are turned off, the switch voltage rises to over 70% of its final

65

value before I1 is zero, so that the transistors are subject to hard switching conditions and losses will

occur within them. The input and output power of the topology can be seen in Figure 56, the average

input power is 1.05kW, the average output power is 1.11kW meaning the efficiency is 94.2%.

Figure 55 - Petkov snubber waveforms showing primary current (I1), secondary current (I2), transformer current (It) and switch voltages at the peak (960V) and settling voltage (680V)

Figure 56 - Petkov snubber input power (top) and ouptut power (bottom)

66

4.2.2 LLCC circuit

By merging two of the snubber diodes and creating a central leg a modification of the Petkov snubber

results, which reduces component count and therefore, losses in the circuit. The circuit is shown in

Figure 57 and Ls1 and Ls2 are set to 100uH and Cs1 and Cs2 are set to 80nF in order to achieve a

peak switch voltage of 960V, and a peak switch current of 31A, Figure 58 shows explanatory

waveforms.

Figure 57 - LLCC snubber circuit

Interval t0 – t1: At t0, both transistors are switched on and the transformer primary winding is

clamped to the input voltage. At the same time, the snubber capacitors, Cs1 and

Cs2, begin to reverse their charge through the snubber inductances, Ls1 and Ls2.

The transformer magnetising current, Itrans increase linearly. The transistor current,

I1, also increases linearly, but additionally has the snubber capacitor current, which

produces the half sinusoidal hump which ends at t1, added to its current. As the

snubber capacitors reverse their charge, so the voltages on the left hand plate of

Cs1 and the left hand plate of Cs2 head towards each other.

Interval t1 – t2: At t1 the voltages on the left hand sides of Cs1 and Cs2 become equal and at the

time Ds3 begins to conduct, but only for a short time, as shown in the bottom

waveform, ID. The transformer current, Itrans, continues to increase linearly until the

switches turn off at t2.

Interval t2 – t3: At t2, the transistors turn off and current I1 rapidly falls to 0. The transformer leakage

and magnetising inductances charge Cs1 and Cs2 via Ds3, and the transistor

voltages rise almost linearly until t3. During this interval the transformer secondary

voltage is increasing as the voltage builds up across the magnetizing inductance. At

some point secondary current begins to flow and I2 increases, reaching a maximum

at t3, when Itrans becomes zero. Consequently the transistors are subjected to a

relatively slow voltage rise, which reaches a peak when Itrans = 0A and I2 = NI1.

67

Interval t3 – t4: At t3, all the magnetizing current flows to the output of the converter. Ds3 therefore

turns off, and the transistor voltages collapse to 680V.

Interval t4 – t5: From t4 to t5, the voltage across the transistors and Cs1 and Cs2 remain constant

while I2 discharges linearly to 0.

Interval t5 – t6: When I2 becomes zero and t5, the voltage across the primary winding collapses and

the transistor voltages head towards 340V in an oscillatory manner. Additionally the

capacitors Cs1 and Cs2 discharge via the transformer primary winding, Ls1, Ls2 and

diodes Ds1, Ds2 into C.

Figure 58 - Key waveforms detailing the operation of the converter (not to scale)

Figure 59 shows simulated results, with numerical values. From the waveforms in Figure 59, it is

seen that the 1200V IGBT devices in the charger are pushed to their limits as the peak voltage

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reaches 960V, which is acceptable when a 20% derating is considered. The switch still has a degree

of hard switching. However the voltage across the switch at turn off is much lower than in the Petkov

circuit, being at around 25% of its maximum value (here, approximately 250V of the 960V maximum).

Thus the LLCC circuit has lower losses than the Petkov circuit. The initial turn off voltage in this

topology is lower due to the snubber being more effective. The additional diode provides an additional

discharge path for the snubber capacitances, meaning that the voltage across these capacitors is

lower at turn off. Also visible is ringing in the transistor voltage waveform after I2 has reached its

peak value. The ringing can be reduced through careful use of RC snubbers across the IGBTs. After

this circuit was developed a similar circuit was found in [86], however that circuit was not tested to

any significant power levels. The input and output power of the topology can be seen in Figure 60,

the average input power is 1.47kW, the average output power is 1.39kW meaning the efficiency is

94.2%. This is the same as the Petkov snubber however here the power output is significantly higher

at the same extremes of operation. A problem is that the device temperatures are high (Tj > 110°C)

in this configuration.

Figure 59 - LLCC snubber switching waveforms

69

Figure 60 - LLCC snubber input power (top) and output ower (bottom)

4.2.2.1 Coupled inductor LLCC circuit

A variation of the LLCC configuration is shown in Figure 61. Here the snubber inductors are wound

on the same core in order to save space. As seen in Figure 62, at turn off, the switch voltage rises

to around 30% of its final value, as compared to 25% for the LLCC snubber circuit without coupled

inductors. Thus the coupled inductor circuit is slightly less efficient then the uncoupled LLCC circuit.

Figure 61 - Coupled inductor LLCC design

70

Apart from the slight increase in losses there is effectively no difference in the operation. However

the construction of the converter would be more complex, and it is possible that a bespoke snubber

inductor component would have to be made. The input and output power of the topology can be seen

in Figure 62, the average input power is 1.32kW, the average output power is 1.22kW meaning the

efficiency is 92.19%. This topology is not considered as its efficiency and output power is low.

Figure 62 - Switching waveforms for wound inductor LLCC

Figure 63 - Coupled inductor snubber input power (top) and output power (bottom)

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4.2.3 Centre inductor circuit

A second variation combines the snubber inductors in to a centre leg, see Figure 64. The topology

could save PCB area and reduce cost through lowering the number of board mounted inductors.

However the efficiency of the circuit will6 suffer, as in this configuration the switch voltage rises

rapidly, the switching losses are greater and the efficiency is lower. In this topology the snubber

inductance has to remain small, since otherwise the turn off voltage transient becomes too high. In

the simulation, see Figure 65, it is set to 1nH. In order to keep the switch voltage as low as possible,

the snubber capacitors have to be very large (>100uF) which is impractical.

Figure 64 - Centre inductor circuit

The simulation results in Figure 65 show the presence of resonances in both secondary current and

switch voltage which cannot be completely removed by additional snubbers. Also the switch voltage

rises to its maximum (the transistors here have broken down at 1.5 kV) before the secondary current

maximum, thereby increasing the losses. A wound inductor version is also unsuitable since the effect

of the leakage inductance was merely transferred into the auxiliary primary winding.

72

Figure 65 - Switching waveforms for centre inductor circuit

Figure 66 shows the input and output power of the centre inductor snubber topology. The average

input power is 1.49kW, the average output power is 1.28kW meaning the efficiency is 86.01%. This

topology is not considered as, both the output power and efficiency are low.

Figure 66 - Centre inductor snubber input power (top) and output power (bottom)

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4.2.3 RC LLCC snubber circuit

In the LLCC snubber, ringing is present in both the switch voltage and the secondary current. The

ringing can be reduced through use of an RC snubber across the switches and across the snubber

inductors. A further RC snubber across the output diode helps reduce the peak voltage across the

transistors in comparison to the standard LLCC snubber configuration. Careful adjustment of these

snubbers in SIMetrix showed that the ringing can be reduced and also means that the snubber values

can be kept low (100Ω and 1nF). The snubber connections are detailed in Figure 67 and the SIMetrix

results are in Figure 68. Comparing Figure 68 with Figure 59, the RC snubbers have helped reduce

the ringing.

Figure 67 - RC snubbers for, Snubber inductors, transistor switch and output diode

Figure 68 - RC LLCC snubber results

74

Figure 69 - RC LLCC snubber input power (top) and output power (bottom)

Figure 69 shows the input power and output power of the RC LLCC snubber circuit. The average

input power is 1.46kW, the average output power is 1.39kW meaning the efficiency is 95.05%. Adding

the RC snubbers to the LLCC snubber circuit marginally improves the efficiency however the main

advantage of adding in the RC snubbers is reducing the ringing in the circuit and therefore reducing

the device junction temperature to 100° (as opposed to 110°C+ for the LLCC snubber in section

4.2.2).

From these investigations of the various snubbers it was decided that the best topology to use would

be the LLCC snubber circuit, shown in Figure 57 combined with the RC snubbers in Figure 67, as

this gives the highest efficiency.

4.2.5 Circuit optimisation

In order to achieve optimal operation of the LLCC converter, the snubber components must be

adjusted to meet the limits set at the start of this thesis, incorporating any deratings required. In order

to do this a sensitivity study was conducted in SIMetrix. Assuming the simulation was accurate, the

snubber inductances, Ls, were set to a sensible value (50uH) and the snubber capacitances, Cs,

were varied and the circuit simulated. The results are shown in Figure 70. In both these studies the

75

input and output voltages were set to their respective maximums (680 V and 420 Vdc), the duty cycle

was set to 50%, and the transformer leakage inductance was set at 5% of the primary inductance.

Figure 70 - Snubber capacitor sensitivity study showing primary current (top), secondary current (middle) and switch voltage (bottom) as the snubber capacitor value is changed

Figure 70 shows that for 50uH snubber inductors, increasing Cs reduces the rise time of Vsw,

increases I1rms and also limits the peak secondary current. The most important factor in deciding

the value of Cs is the switch voltage, Vsw, which must be limited to the maximum transistor switch

voltage (derated to 80%). Therefore the optimal value of Cs is around 80nF. The snubber

capacitances were only varied between 1nF and 100nF as above 100nF the snubber effect is too

great and output power is limited through the reduction of secondary current, I2. Next, Cs was fixed

to 80nF and Ls was varied over a range and the results analysed the results are shown in Figure 71.

76

Figure 71 - Snubber inductance sensitivity study showing primary current (top), secondary current (middle) and switch voltage (bottom) as the snubber inductor value is changed

From the primary current results, it can be seen that to keep within the established current limit of

31A, any value over 20uH is acceptable. However, snubber current, ILs, does not reduce significantly

for values >20uH. The snubber inductance was only varied from 1uH to 200uH as smaller values

had little effect and increasing values have little to no effect but at a higher cost. and since a high

current, high value inductor costs more than a high current, low value inductor (>£10 per part as

opposed to <£3 per part) 60uH was chosen to give a balance between performance and cost.

This process could be continued until more accurate values for Ls and Cs are established,

alternatively values could be calculated through circuit analysis however the final circuit is too

complex and would require significant time to determine the optimum values for Ls and Cs. As a

consequence it was decided that Ls would be 60uH and Cs would be 80uF in the future design.

4.2.6 Simulation optimisation

In order to improve the accuracy of the final simulations, the chosen Ls and Cs components were

analysed using an LCR meter and their parasitic elements were incorporated into the simulation. The

chosen diode model (type STTH3012W see chapter 5) can be imported into SIMetrix and placed in

the simulation to improve accuracy, however the switching device models (HGTG18N120BND IGBT

used for testing or the SCT2080KEC MOSFET recommended after analysis in chapter section: 4.4)

could not be imported into SIMetrix as SPICE models for these do not currently exist.

The transformer design is described in chapter section: 4.3, and its parasitic elements were

determined in that section.

77

As an example, the input filter capacitors EPCOS B32653A0104J000 100nF are tested in the LCR

meter and the impedance against frequency is seen in Figure 72

Figure 72 - 100nF capacitor impedance, capacitance in uF (top) and resistance in mΩ (bottom) against frequency

For the input filter capacitors, taking the value at the resonance point (1.28MHz in Figure 72) series

inductance can now be calculated with (2) and parasitic resistance is measured directly by the LCR

meter.

𝐿𝑃 = 1

(2𝜋𝑓)2×𝐶𝑆 (2)

Here, the series resistance, Rs can be ignored as it is a very low value. Also the parallel resistance

can be ignored as it is a high value. The same procedure was completed for the remaining capacitors

and a similar procedure for the snubber inductor where the parasitic capacitance was calculated

using (3).

𝐶𝑃 = 1

(2𝜋𝑓)2×𝐿𝑆 (3)

The parasitic values were then added to the simulation.

78

4.2.7 Final circuit

Following the iterations in topologies outlined in the previous sections, a final design was determined,

see Figure 73. The use of snubbers across the devices, inductors and the output diode have reduced

ringing and switching loss, and high voltage MOSFET switches have been employed to further

reduce losses. The snubber components are identical, to promote voltage sharing across the

transistors.

The simulation accurately models, real world components and includes resistances for the

transformer windings. From the simulation the efficiency of the design is 93.5% at 1.35kW output

power (8.1kW, 3 phase). The switching waveforms are shown in Figure 74. Losses in the transformer

due to eddy currents, hysteresis and copper loss [100] account for approximately 50W (~4%).

Switching and transistor conduction losses provide for approximately 40W (~2%) and 30W (~1-2%)

of the losses.

Figure 73 - Final half phase design with parasitic elements highlighted (green elements belong to snubber inductors, blue elements belong to the main snubber capacitors, red elements belong to

auxiliary snubber capacitors)

From the switching waveforms in Figure 74 it can be seen that the transistor operates within the

derated limits for the device (31A primary current, 960V switch voltage), In comparison to other

circuits, this circuit is more complex as it has been developed past the theoretical stage, most circuits

are not given in this level of detail, however the highlighted components in Figure 73 are all parasitic

elements and therefore can be removed, reducing complexity. In terms of volume and weight, the

charger does not use electrolytic capacitors therefore saving on volume, however weight is increased

by the transformer, however this provides galvanic isolation, which is essential.

79

Figure 74: Final design switching waveforms

4.2.8 3 phase configuration

Before the start of this project, an investigation of presently available commercial battery chargers,

both single and three-phase, was undertaken at an EV manufacturer’s site. During testing, the

chargers’ DC outputs were connected to half-charged vehicle batteries and supplied from a three-

phase source. The single-phase chargers were connected in star configuration, and the star point

connected to the supply neutral to produce a three-phase, 4-wire charger.

It was seen that the three, star-connected, single-phase units required a low impedance neutral

(fourth wire) connection if they are to operate correctly. Measurements showed that a high

impedance neutral connection produced phase imbalance and consequent over voltages on some

phases, which could damage the single-phase chargers. [101]

In order to prevent this, a three phase delta connected input was chosen. This also has the advantage

of redundancy since if one phase is lost; the other 2 phases continue to operate. However, this

means that the current that would leave through the neutral, circulates in the Delta winding, this

includes harmonics. This means that the windings would heat up and more copper area would be

required to carry the current. Heating and current issues can be mitigated through use of larger

winding wire on the transformer.

80

4.3 Initial transformer design

As discussed in chapter 2, one of the most important aspects of the flyback converter design is the

transformer. The transformer provides galvanic isolation to the circuit and enables a wide range of

voltage output levels in the converter. The transformer also is important in terms of converter

efficiency as a transformer with a high leakage inductance will increase the losses in the circuit, due

to the recirculation of leakage inductance energy through the snubber components and transistors.

Additionally the winding resistances must be as low as practicable to minimize losses in them.

From basic transformer theory a proposed design for a reduced size transformer was examined. The

transformer design was simulated in FEMM (Finite Element Method Magnetics) and the model

checked against the proposed design. The FEMM model was modified until the simulation and

proposed design matched, and then, a typical primary current waveform was applied to the

transformer model and transformer parameters were measured. Following this the transformer was

constructed, and its parameters tested.

4.3.1 Transformer theory

The classical transformer model, frequently known as the approximate model [102] is shown in

Figure 75.

Figure 75 - Transformer equivalent circuit [102]

As shown in Figure 75, Rp and Rs represent the primary and secondary winding resistances

respectively, and, Xp and Xs represent the leakage reactances of the primary and secondary

windings respectively. Rm and Xm represent the core losses and the magnetizing reactance

respectively, To complete the model an idealized transformer is incorporated with a turns ratio of

Np:Ns, and this ration ensures that Es=(Ns/Np)*Ep. The approximate model can be derived (making

suitable approximations) from a basic physical mode, using the equations given in (4) and (5). These

equations represent the mutual inductance between the two windings by M [103].

𝑉𝑝 = 𝐼𝑝 ∙ 𝑅𝑝 +𝐿𝑝∙𝛥𝐼𝑝

𝛥𝑡− 𝑀𝑝𝑠

𝛥𝐼𝑠

𝛥𝑡 (4)

𝑉𝑠 = 𝐼𝑠 ∙ 𝑅𝑠 +𝐿𝑠∙𝛥𝐼𝑠

𝛥𝑡− 𝑀𝑠𝑝

𝛥𝐼𝑝

𝛥𝑡 (5)

81

𝑀𝑝𝑠 is the mutual inductance seen by the primary winding due to changes in secondary current.

Similarly 𝑀𝑠𝑝 is the mutual inductance seen by the secondary winding due to the primary current.

Hence;

𝐿𝑝 = 𝑁𝑝2 ∙ ℘𝑝 and 𝐿𝑠 = 𝑁𝑠

2 ∙ ℘𝑠 (6), (7)

Where Lp is the primary inductance and Ls is the secondary inductance. Also ℘ is the permeance of

the flux path (℘𝑝 = ℘𝑝𝑝 + ℘𝑝𝑠 𝑎𝑛𝑑 ℘𝑠 = ℘𝑠𝑝 + ℘𝑠𝑠) so;

𝐿𝑝 ∙ 𝐿𝑠 = 𝑁𝑝2 ∙ 𝑁𝑠

2 ∙ ℘𝑝 ∙ ℘𝑠 = 𝑁𝑝2 ∙ 𝑁𝑠

2 ∙ (℘𝑝𝑝 + ℘𝑝𝑠) ∙ (℘𝑠𝑝 + ℘𝑠𝑠)

Due to reciprocity: 𝑀 = 𝑀𝑝𝑠 = 𝑀𝑠𝑝 and ℘𝑝𝑠 = ℘𝑠𝑝 then:

𝐿𝑝 ∙ 𝐿𝑠 = 𝑁𝑝2 ∙ 𝑁𝑠

2 ∙ ℘𝑝𝑠2 ∙ (1 +

℘𝑝𝑝℘𝑝𝑠

⁄ ) ∙ (1 +℘𝑠𝑠

℘𝑝𝑠⁄ ) = 𝑀2 ∙

1

𝑘2 (8)

Solving for M:

𝑀 = 𝑘 ∙ √𝐿𝑝𝐿𝑠 (9)

where k is the coupling coefficient (typically 0.99).

4.3.2 Transformer core material

Typically for power electronic transformers, ferrite cores are used, due to their low eddy current and

hysteresis loss, and ability to operate efficiently at high frequencies. However, ferrite cores can be

prone to de-magnetization, due to having a low curie temperature (~200°C). [104]

For the project a COSMO CF139 core was chosen in industrial E100 size. The core has a flux density

saturation limit of 325mT at 100°C and was primarily chosen due to its easy availability. An industrial

bobbin was chosen to provide a base for the primary and secondary windings; a Formers Ltd EI

84x29.5 bobbin.

The COSMO CF139 core material is a Manganese-Zinc (MnZn) ferrite for use in applications below

5MHz. The CF139 material is classed as a “soft” ferrite since it has a low coercivity, and the

magnetization of the ferrite can reverse direction easily without dissipating excessive energy in

hysteresis losses. Furthermore, high resistivity helps prevent losses through eddy currents in the

core. [105]

82

Figure 76 - Cosmo CF139 core. Standard E100 size (left) and reduced cores (right)

4.3.3 Transformer design

A wire diameter of 1.4mm was chosen. Wire of a greater diameter was deemed as being too difficult

to bend around the rectangular former. The original cores, see Figure 76, were reduced in length, as

will be explained later in this section. The transformer is a shell type transformer as this construction

reduces losses due to leakage flux by making the magnetic coupling as high as possible.

Figure 77 - Transformer construction

In designing this first transformer, the details in Table 5 were used.

Circuit details Core details

Transformer turns ratio, N 1.54545 (17:11) Core material Cosmo

CF139 Magnetizing inductance, Lm 190 μH

Duty ratio, D 0.5 Relative permeability, µC 4000 H·m−1

Switching Frequency, Fs 33 kHz Max flux density, Bmax 325 mT

Current density in wire, J 4A [106] Window size, Aw 1072.7 mm2

Peak input current, Ipk 31 A Effective area, Ae 748 mm2

Table 5 - Transformer details

83

First the primary current, Ip, is calculated [107]:

Ip = I𝑝𝑘 ∙ √D

3= 12.655 A𝑟𝑚𝑠 (Is = N ∙ Ip = 19.558 Arms) (10)

The minimum copper area for the wire used for the windings is:

Minimum copper area: Ip

J= 2.943185 mm2 (11)

Using 1.4mm wire, it is necessary to have stranded wires:

Primary winding: 𝑀𝑖𝑛 𝑐𝑜𝑝𝑝𝑒𝑟 𝑎𝑟𝑒𝑎

(𝜋∙𝐶𝑆𝐴24⁄ )

= 1.9119 → 2 𝑠𝑡𝑟𝑎𝑛𝑑𝑠 are needed (12)

Secondary winding: 𝑁 ∙ 𝑝𝑟𝑖 𝑠𝑡𝑟𝑎𝑛𝑑𝑠 = 2.954745855 → 3 𝑠𝑡𝑟𝑎𝑛𝑑𝑠 are needed (13)

The turns ratio can be achieved by making Np = 17 and Ns = 11

The total number of conductors is 67 and the total cross-sectional area of the two windings is:

Total XSA: 𝑐𝑜𝑛𝑑𝑢𝑐𝑡𝑜𝑟𝑠 ∙ (𝜋 ∙𝐶𝑆𝐴

2

2) = 103.13849 mm2 (14)

The packing factor is: 𝑇𝑜𝑡𝑎𝑙 𝑋𝑆𝐴𝐴𝑤⁄ = 0.09614 which is low. A more realistic packing factor is 0.4

(for a transformer wound by hand, a machine wound transformer would be typically >0.8) thus the

ferrite cores can be shortened to achieve a higher packing factor, see figure Figure 76.

Now the flux density can be calculated:

Flux density: 𝐼𝑝𝑘∙𝐿𝑚

𝑁𝑝∙𝐴𝑒= 0.458 𝑇 (15)

This is above the maximum flux density of the CF139 ferrite material, therefore adjustments will need

to be made to reduce the peak flux density. Next the core air gap can be calculated:

Air gap: 𝐿𝑔 =µo∙𝑁𝑝2∙𝐴𝑒

𝐿𝑚= 0.722 𝑚𝑚 gap both sides (16)

Hence the basic physical details for the transformer have been determined. However, it is useful at

this stage, before building a prototype, to carry out some additional calculations to estimate the

inductances of the transformer more accurately.

From equations (4) and (5), the primary and secondary self-inductances of the transformer can be

calculated using the magnetic circuit shown in Figure 78:

84

Figure 78 - Magnetic circuit of the transformer showing MMF and reluctance

Permeance, ℘, is the reciprocal of Reluctance, ℛ. Ie: ℘ = 1ℛ⁄

So equations (6) and (7) become [108]:

𝐿𝑝 =𝑁𝑝

2 ℛ𝑝

⁄ and 𝐿𝑠 =𝑁𝑠

2 ℛ𝑠

⁄ (17), (18)

Where Rp and Rs are the reluctance of the primary and secondary magnetic paths respectively.

Core reluctance: ℛ𝑐𝑜𝑟𝑒 = 𝐿𝑒𝑛𝑔𝑡ℎ 𝑜𝑓 𝑓𝑙𝑢𝑥 𝑝𝑎𝑡ℎ

(µc∙µo∙Ae)= 43563 𝐻−1 (19)

As can be seen from Figure 78, the reluctances for both windings are the same and it can be

assumed that the flux divides equally between the two external legs, so ℛ𝑝 = ℛ𝑠 = ℛ𝑐𝑜𝑟𝑒.The gap

reluctance is:

Gap reluctance: ℛ𝑔 = 𝐿𝑒𝑛𝑔𝑡ℎ 𝑜𝑓 𝑎𝑖𝑟𝑔𝑎𝑝

(µo∙Ae)= 1521052 𝐻−1 (20)

So the total reluctance for the flux path is: 1564616.61 𝐻−1. The self-inductance of the transformer

can be calculated using (17) and (18):

𝐿𝑝 = 184.71 𝜇𝐻 and 𝐿𝑠 = 77.3352 𝜇𝐻

And from (9) we can get the mutual inductance: (assuming k=0.99)

𝑀 = 118.3229 𝜇𝐻

These values, were calculated automatically in an excel spreadsheet, so that quick recalculations

could be made, should the transformer parameters need to be changed.

4.3.4 Transformer FEMM simulation

Before the design was revised to meet peak flux demands it was modelled in FEMM. The transformer

size, in mm, was plotted FEMM view. The 0.7mm air gap was put into the model between the 2 cores

and the windings were arranged around the centre leg. The Cosmo CF139 core material was not in

85

the FEMM library, and so the BH characteristic had to be plotted by hand. The plot is shown in Figure

79. As can be seen from the plot the maximum flux before saturation is around 325mT [109].

Figure 79 - Cosmo CF139, BH characteristic at 100°C

The peak current (31A) was then applied to the primary of the FEMM transformer, with the secondary

open circuit, to determine if the flux is flowing as expected in the model. The model can be seen in

Figure 80.

Figure 80 - FEMM model of the transformer

The result is shown in Figure 81. The coloured areas dictate the concentration of flux. The darker

the colour, the higher the flux is in that area. An investigation was carried out to determine if the peak

flux level in the core matches that calculated by equation (15). This was done by applying a vector

to the transformer (at the airgap) and a line integral calculated to determine the average flux – the

result is shown in the small window of Figure 81.

86

Figure 81 - FEMM model result showing average flux at the airgap

As we can see the peak flux is about 12% less than that was calculated using (17), however the

result is the average over the cross section of the centre leg, not the peak flux. So the peak flux is

probably closer to the calculated value. The self-inductances were also determined by the software,

and found to be: Lp = 163.59 μH and Ls = 68.46 μH which are similar to the calculations in chapter

section 4.3.3. These inductances are about 11.5% less than calculated, which may be caused by

inaccuracies in the geometry of the core plotted in the simulation. Nonetheless the calculations and

results provide a reasonable degree of confidence in the preliminary design.

From Figure 81, it can be seen that the core is heavily saturated throughout, and the majority of the

core flux density exceeds 325mT. A way to correct this could be to increase the length of the air gap,

however increasing the airgap length also increases losses through increased leakage flux. Another

solution is to incorporate interleaved windings, which is investigated in the next section.

4.3.5 Transformer Leakage investigation

The next step of the transformer investigation attempts to estimate the leakage inductances in the

primary and secondary windings. This is particularly useful, since keeping the leakage flux as low as

possible is essential for high efficiency of the converter. However, the leakage flux in the transformer

depends on the type of transformer constructed, the winding configuration, the dimensions and

material of the core used, as well as other parameters. Consequently a literature search was carried

out to find papers which describe techniques for estimating leakage inductances.

Several papers were found on estimating the leakage flux of a transformer, and while many of them

seem to offer little in the way of actual calculations, there are 3 papers that were particularly useful

in describing methods of calculating the leakage inductance of a transformer:

87

Two, a papers by Balakrishnan [110] [103] attempts to develop a complete magnetic circuit

comprising the core, airgap and fringing reluctances, and then from this determine the leakage

inductance. The Balakrishnan method was investigated and the equations put into an excel

spreadsheet to be solved. However one of the intermediate permeance calculations created an

incorrect result, and it was concluded that the technique was flawed. It was later found that due to

the construction of the transformer, the majority of the losses may arise only due to partial coupling

of the windings and not fringing, so the Balakrishnan method may not be suitable for this application.

A paper by Kantor [111] gives precise and simple formulas for determining the area of the reduced

leakage channel of concentric windings of equal heights. The paper shows and describes

Rogowskii’s formulas very briefly, however the formulas proposed later are extremely complex and

require exact measurements of the windings which are impossible to obtain until the core is

constructed, at which point it would be more time effective to measure inductance using an LCR

meter.

A brief search for “Rogowski transformer leakage” produced a paper by Doebbelin and Lindemann

that describes Rogowski’s methods as well as some methods by Petrov and Lebedev [112]. The

Rogowski method in particular was applied to a similar shell type transformer, therefore this method

is chosen to be investigated further. The Rogowski methods are approximation methods in which

geometrical parameters of the transformer are used to calculate its leakage inductance. In this

method the heights of the conductors in the windows are assumed to be the same height. The

configuration is shown in Figure 82.

Figure 82 - Core configuration and measurements used for Rogowski method.

The Rogowski formula is [112]:

Primary leakage inductance: 𝐿𝑃𝐿 = µo ∗ NP2 ∗ 𝑙𝑚 ∗ 𝜆 ∗ 𝐾𝜎 (21)

Where uo is the permeability of free space and Np is the turns of the coil in question:

𝑙𝑚 = mean length of turn = 109.4 mm,

88

𝜆 = relative leakage conductance = 1

𝑏(𝛿 +

𝑎1+𝑎2

3) (22)

And 𝐾𝜎 = The Rogowski correction factor = 1 −𝑎2+𝛿+𝑎1

𝜋∗𝑏(1 − 𝑒−[

𝜋∗𝑏

𝑎2+𝛿+𝑎1]) (23)

So making c = 1 mm, for the gap the bobbin creates between the core and windings; δ = 1 mm, for

the gap between windings; and a1, a2 and b the approximate widths and height of the two windings,

all in metres, equation (19) becomes:

Rogowski factor: 𝐾𝜎1 = 0.949 and 𝐾𝜎2 = 0.92

Relative leakage conductance: 𝜆1 = 0.08123 S and 𝜆2 = 0.1255 S

Hence the Primary leakage inductance: 𝐿𝑃𝐿 = 4.03 𝜇𝐻

And the secondary leakage inductance: 𝐿𝑆𝐿 = 2.51 𝜇𝐻

These values indicate that just over 3% leakage flux will occur.

In the Doebbelin paper [112], a variation on Rogowski’s formula is shown in equation (22). In this

formula, the Rogowski correction factor, Kσ, is removed enabling the calculation of the leakage

inductance for interleaved transformers with partition windings, as shown later in this chapter.

Leakage inductance (related to the primary side): 𝐿𝐿 = µo ∗ NP2 ∗

𝑙𝑚

𝑛𝑖𝑓2∗𝑏

∗ (𝛴𝑎

3+ 𝛴𝛿) (24)

Where; lm is the average length of the windings, nif is the number of insulating interspaces between

sub windings, b is the height of the coils, Σa is the sum of all the widths of the coils and Σδ is the sum

of the width of the insulating interspaces.

Putting in the required information for a non-interleaved example gives: 𝐿𝐿 = 15.6 𝜇𝐻, which indicates

there will be around 8% leakage flux.

Leakage inductance can also be estimated from the FEMM model, by selecting the areas where

leakage will occur and integrating over the area to provide the magnetic field energy as seen in

Figure 83.

89

Figure 83 - FEMM model result the magnetic field energy in the green area

From the magnetic field energy, the total leakage inductance can be calculated as:

𝐿 =2∗𝑊

𝐼2 = 8.28 𝜇𝐻 (25)

At around 5% leakage flux, this result is close to what has been calculated using the traditional

Rogowski formula in (19) and half the result of the variation using (22). It is worth noting that the

leakage inductance calculations do not take an air gap into account, and give a lower leakage result

than would be found in a constructed transformer.

In the next section the transformer is revised and interleaving is explored.

4.3.6 Revised transformer design and interleaving

In an effort to reduce leakage inductance, the transformer windings can be interleaved. This is done

by splitting the primary winding, secondary winding or both windings, and winding them around the

core in segments, thereby increasing the area of the windings so that more of the leakage flux is

intercepted. However the technique increases inter-winding capacitance and the resistance for the

interleaved coil. The leakage inductance usually decreases inversely proportional to the number of

interleavings in parallel. However parasitic capacitance is almost proportional to the number of

interleavings in parallel [113].

For the transformer devised, it was seen from (13) and Figure 81 that the flux in the transformer is

high and saturates the core. The most direct ways to decrease the peak flux are; reducing the primary

current, increasing the transformer air gap and increasing the primary turns. It was determined that

the primary current should be reduced to 28A and, to preserve the power level, the switching

frequency should be increased to 40 kHz. Also, to keep leakage flux to a minimum, the transformer

primary turns should be increased as opposed to increasing the transformer air gap. Table 6 shows

the transformer turns ratios for different primary and secondary winding turns. In Table 6, the turn

90

ratios available are highlighted in green. These turn ratios were analysed using the calculations

outlined in chapter section 4.3.3 and the results are shown in Table 7. A representation of an

interleaved core as seen from the top of the E core, is shown in Figure 84. Primary and secondary

coils are shown in different colours.

Figure 84 - Transformer showing interleaving winding distribution

Num

ber

of tu

rns o

n p

rim

ary

17 1.55 1.42 1.31 1.21 1.13 1.06 1.00 0.94 0.89 0.85 0.81 0.77 0.74

18 1.64 1.50 1.38 1.29 1.20 1.13 1.06 1.00 0.95 0.90 0.86 0.82 0.78

19 1.73 1.58 1.46 1.36 1.27 1.19 1.12 1.06 1.00 0.95 0.90 0.86 0.83

20 1.82 1.67 1.54 1.43 1.33 1.25 1.18 1.11 1.05 1.00 0.95 0.91 0.87

21 1.91 1.75 1.62 1.50 1.40 1.31 1.24 1.17 1.11 1.05 1.00 0.95 0.91

22 2.00 1.83 1.69 1.57 1.47 1.38 1.29 1.22 1.16 1.10 1.05 1.00 0.96

23 2.09 1.92 1.77 1.64 1.53 1.44 1.35 1.28 1.21 1.15 1.10 1.05 1.00

24 2.18 2.00 1.85 1.71 1.60 1.50 1.41 1.33 1.26 1.20 1.14 1.09 1.04

25 2.27 2.08 1.92 1.79 1.67 1.56 1.47 1.39 1.32 1.25 1.19 1.14 1.09

26 2.36 2.17 2.00 1.86 1.73 1.63 1.53 1.44 1.37 1.30 1.24 1.18 1.13

27 2.45 2.25 2.08 1.93 1.80 1.69 1.59 1.50 1.42 1.35 1.29 1.23 1.17

28 2.55 2.33 2.15 2.00 1.87 1.75 1.65 1.56 1.47 1.40 1.33 1.27 1.22

29 2.64 2.42 2.23 2.07 1.93 1.81 1.71 1.61 1.53 1.45 1.38 1.32 1.26

30 2.73 2.50 2.31 2.14 2.00 1.88 1.76 1.67 1.58 1.50 1.43 1.36 1.30

31 2.82 2.58 2.38 2.21 2.07 1.94 1.82 1.72 1.63 1.55 1.48 1.41 1.35

32 2.91 2.67 2.46 2.29 2.13 2.00 1.88 1.78 1.68 1.60 1.52 1.45 1.39

33 3.00 2.75 2.54 2.36 2.20 2.06 1.94 1.83 1.74 1.65 1.57 1.50 1.43

34 3.09 2.83 2.62 2.43 2.27 2.13 2.00 1.89 1.79 1.70 1.62 1.55 1.48

35 3.18 2.92 2.69 2.50 2.33 2.19 2.06 1.94 1.84 1.75 1.67 1.59 1.52

11 12 13 14 15 16 17 18 19 20 21 22 23 Number of turns on secondary

Table 6 - Available turn ratios for revised transformer

From Table 6, the most suitable configurations are highlighted in green. The other configurations

were eliminated due to having a high peak flux density, or having 4 or more secondary strands, which

were considered as difficult windings to manufacture. From there configurations the leakage

91

inductances can be calculated for different levels of interleaving using (22). The different levels of

interleaving are shown in Figure 85.

N1 N2 I1rms (A) I2rms

(A) N1

Strands N2

Strands Packing Factor

Lp self (uH)

Ls Self (uH)

Bpk (mT)

Gap (mm)

17 11 12.66 19.56 2 3 0.10 184.71 77.34 413.81 0.72

18 12 12.66 18.98 2 3 0.10 185.27 82.34 390.82 0.81

19 12 12.66 20.04 2 4 0.12 185.74 74.09 370.25 0.90

20 13 12.66 19.47 2 3 0.11 186.15 78.65 351.74 1.00

21 14 12.66 18.98 2 3 0.12 186.50 82.89 334.99 1.10

22 14 12.66 19.89 2 3 0.12 186.81 75.65 319.76 1.21

23 15 12.66 19.41 3 3 0.13 187.07 79.57 305.86 1.32

24 16 12.66 18.98 2 3 0.14 187.31 83.25 293.11 1.44

25 16 12.66 19.77 2 3 0.14 187.52 76.81 281.39 1.56

26 17 12.66 19.36 2 3 0.15 187.70 80.25 270.57 1.69

27 17 12.66 20.10 2 4 0.18 187.87 74.48 260.54 1.82

27 18 12.66 18.98 2 3 0.16 187.87 83.50 260.54 1.82

29 19 12.66 19.32 2 3 0.17 188.15 80.76 242.58 2.10

30 19 12.66 19.98 2 4 0.20 188.27 75.52 234.49 2.25

30 20 12.66 18.98 2 3 0.17 188.27 83.67 234.49 2.25

31 20 12.66 19.62 2 3 0.18 188.38 78.41 226.93 2.40

32 21 12.66 19.28 2 3 0.18 188.48 81.17 219.83 2.56

33 21 12.66 19.89 2 3 0.19 188.57 76.36 213.17 2.72

33 22 12.66 18.98 3 3 0.19 188.57 83.81 213.17 2.72

34 22 12.66 19.56 2 3 0.19 188.65 78.98 206.90 2.89

35 22 12.66 20.13 4 4 0.23 188.72 74.57 200.99 3.06

35 23 12.66 19.26 2 3 0.20 188.72 81.50 200.99 3.06

Table 7 - Comparison of turn ratios

Figure 85 - Levels of transformer interleaving showing the windings both split into 3 groups and wound on the core

Calculating the leakage inductance for the different cases in Table 7 will help determine the optimum

turns ratio and level of interleaving. A graph in Figure 86 shows the leakage inductance of each turns

ratio from when it is not interleaved to when it is interleaved 10 times (5 primary part turns and 5

secondary part turns). The points on the lines in Figure 86 indicate possible interleaving where no

part turns are used.

92

Figure 86 - Leakage inductance at specified turns ratios and levels of interleaving

As shown in the graph, interleaving exponentially reduces leakage inductance, so that interleaving

becomes less and less effective the more it is done. Also keeping the turns as low as possible helps

to keep leakage inductance low. However, interleaving may not always be possible, for instance a

turns ratio of 29/19 cannot be interleaved 6 times as this breaks down to 9.666/6.3333 turns per

layer, which is not possible. Therefore only interleaving that can be split evenly into integers is

considered and is highlighted on the graph. From Figure 86, the best option is 24/16, interleaved 8

times. However, despite a minor increase in leakage inductance, 22/14 interleaved 4 times was

selected for ease of construction.

Figure 87 - FEMM simulation of 22/14 turns ratio showing flux above 325mT

The new turns ratio was next verified in simulation, as shown in Figure 87. It can be seen that the

peak flux density in the core is closer to the desired limit of 325mT and also close to the 319mT

calculated in Table 7. Only areas of the core that are over 325mT are highlighted in the figure and

93

saturation can be seen, especially on the inside corners of the windows of the core. This is an

expected problem and can be mitigated through slightly increasing the air gap.

The interleaving was next verified through simulation using FEMM, and the results are shown in

Figure 88 against the result from the calculation in Figure 86.

Figure 88 - Effect of interleaving on Leakage inductance, simulated result against calculated result

From Figure 88 the simulated leakage inductances are between approximately 1.5 to 2 times the

calculated values. This difference is probably because the calculations are only approximate. Both

results however follow the same trend. As the transformer is interleaved more and more, the

difference between the two curves remains constant. It should also be noticed that curve suggests

that having more primary part windings than secondary part windings (as in 5 or 7 interleaving levels)

reduces the leakage inductance more than having equal primary and secondary part windings (in 6

or 8 interleaving levels). This is because the primary windings surrounds the secondary coil, thereby

intercepting all the flux from the secondary. Whereas in an even numbered interleaving configuration,

some flux escapes into free space and does not couple with the primary winding.

In the next stage of the design process, sample cores were wound with a single conductor each to

reduce the build time, and the interleaving was constructed as shown in Figure 90.

The leakage inductances of the sample cores were measured using an LCR meter set to series

inductance mode and the secondary winding was short circuited while the leakage inductance

(referred to the primary) was measured. The results for the interleaved cores are shown in Figure

89. The sample cores were only interleaved up to 6 times, since interleaving beyond this level is too

imprecise.

94

Figure 89 - Effect of interleaving on Leakage inductance, Calculated, Simulated and Measured results

From the results shown, there is a significant difference between the measured and simulated

results. This difference is because the calculated, and simulated to a lesser extent, results are ideal

in terms of construction and material. In the constructed windings, the core material is non ideal and

the spaces between the windings were slightly greater, increasing leakage flux. Also from these

results it is seen that interleaving with a greater number of primary part windings gives a greater

reduction in leakage inductance, indicated in the previous section. This reduction is due to the

primary winding surrounding all the secondary winding, thus increasing the coupling of the windings.

The simulated and calculated results offer an idealised approximation for the leakage inductance,

however experiment seems to show that in practice around twice the leakage inductance can be

expected.

From these results, it was decided that level 5 interleaving (3 primary part windings and 2 secondary

part windings) would be carried out for the finished cores. Thus enough room is also provided to

include the required strands, which in turn increases the packing factor of the winding. It was

mentioned earlier that part windings cannot be accommodated and in this configuration the primary

would have to be split into 7.333 turns per part winding. In practice the part turns would be merged

into a single turn and placed in the part winding closest to the centre limb, making the primary part

turn distribution 8/7/7 = 22 primary turns. This additional winding should have little effect on the

operation of the transformer. The winding distribution is shown in Figure 90 and is as close to scale

as possible.

95

Figure 90 - Final winding distribution

Simulating this in FEMM shows the total leakage inductance to be around 3μH and the peak flux

density averaged across the centre limb to be 316mT. From this design the required transformers

can be constructed.

4.3.7 Transformer testing

Taking the constructed transformer and performing open and short circuit tests with an LCR meter

will give the self and leakage inductances, as well as the series resistances. The turn to turn

capacitances can also be measured by short circuiting the primary and secondary windings, and

measuring the capacitance between the short circuited coils [114]. All these parameters are then

added to the simulation to improve accuracy. From the testing it is seen that the transformer leakage

inductance is very low at 1.8% of the self-inductance.

Parameter Value

Primary turns, Np 22 turns

Secondary turns, Ns 14 turns

Primary resistance, Rp 3.8mΩ

Secondary resistance, Rs 2.4mΩ

Primary self-inductance, Lpself 197mH

Secondary self-inductance, Lsself 79.2mH

Primary leakage-inductance, Lpleak 3.4mH

Secondary leakage-inductance, Lsleak 1.34mH

Weight 726g

Size 523.25cm3

Airgap length 2.8mm

Table 8 - Transformer parameters

96

4.4 Device comparison

In order to minimise conduction and switching losses in the charger, the choice of semiconductor

device is vital. Typically, IGBT devices have more losses than MOSFET devices. IGBT devices are

better suited to low frequency applications with low duty cycles and MOSFET devices are better

suited to high frequency, hard switching applications [115]. Furthermore, IGBTs are suited to high

voltage, high power, topologies and MOSFETs tend to be used in low voltage, lower power, and

switch mode topologies [116].

Another consideration that arose was the use of wide bandgap devices in place of regular IGBTs or

MOSFETs. This gives significant advantages over traditional silicon or gallium IGBT or MOSFET

devices as energy losses are reduced, higher voltage and temperature operation can be achieved

as well as higher switching frequencies can be utilised. All these advantages give further

improvements to the charger in terms of being able to reduce overall weight and size of the charger

as well as improve the efficiency. Wide bandgap devices have become an increasingly adopted

technology as cost per unit has reduced and availability of the devices has increased significantly

over the last 4 years. However, a wide bandgap device hasn’t been adopted for this project as a

decision on a device was made soon after the start of the project at a time when wide bandgap

devices were very expensive and still largely unavailable. The device comparison made at the time

was expanded to include some wide bandgap silicon carbide devices however these were still at a

price that couldn’t be justified for this project.

In this application the battery charger is comprised of three, single-phase 3kW chargers, each of

which are composed of two, 1.5kW chargers. At this power level, IGBT devices would probably be

more suitable than MOSFET devices. However both types of device will be considered and

compared in terms of their losses, to ensure the right choice is made.

In switched semiconductor devices there are two types of losses; switching and conduction losses

which occur in both the device and its body diode. For the two switch topology, the devices must be

capable of withstanding 1200V to accommodate the minimum voltage overshoot, and passing 28A.

Both types of loss are dependent on the case temperature of the device as well as how the device

is being driven, therefore all the devices considered are assumed to be at the same temperature and

operating conditions (or as close as possible).

4.4.1 Calculating IGBT losses

Due to time constraints it is not possible to closely test and analyse each device to form a

comparison, however it is possible to estimate losses from the device datasheets [117]. The

requirements are listed in Table 9.

97

IGBT parameters Thermal parameters

Duty Cycle (D) 50% Maximum junction temperature (Tj Max) 100°C

Gate drive voltage (Vg) 15V Maximum case temperature (Tc Max) 80°C

Gate resistance (Rg) 4.7Ω Maximum ambient temperature (Tamb

Max) 60°C

Collector current (Ic) 28A

Rms collector current (Icrms) 11.43A Thermal resistance Heatsink to ambient – water (Rth – hsW)

0.001°C/W

Average collector current (Icav) 5.437A Thermal resistance Heatsink to ambient – air (Rth – hsA)

2.7°C/W

Switching frequency (Fs) 40 kHz Thermal resistance of insulation layer – water (Rth – ins)

0.115°C/W

Table 9 - IGBT loss calculation parameters

The thermal values are determined by the chosen cooling system design (see later in this section).

4.4.2 Calculating IGBT conduction losses

First the worst conduction losses of the device are calculated using the worst voltage, current and

temperature extremes.

The conduction loss during the on state of the IGBT is the product of the collector current and the

collector-emitter voltage drop (VCE). Simply it is 𝑃𝑐𝑜𝑛𝑑 = 𝐼𝐶 × 𝑉𝐶𝐸 . This equation does not consider

the period the device is on, the turn on voltage of the switch or the internal switch resistance with

respect to temperature or gate voltage. Therefore, the device conduction characteristics, shown in

Figure 91, are used to determine the internal resistance of the device at the maximum junction

temperature and specific gate voltage.

Figure 91 - Typical conduction characteristic of SGP20N60 at Tj =150°C showing the choice of gate voltage (left) and the interpolation of the 15V curve to find RCE (right) [98]

98

Also, from Figure 91, the turn on voltage Vce can be estimated as:

𝑉𝑐𝑒 = 𝑉𝑇𝑂 + 𝐼𝐶 × 𝑅𝐶𝐸.

Next the saturation voltage of the device is determined at the operating temperature, VCESAT (Tj), and

the maximum operating temperature, VCESAT (Tjmax), from the device datasheet. This is used to scale

the output characteristic to the given junction temperature, Tj, so:

𝑉𝑐𝑒 = (𝑉𝑇𝑂 + 𝐼𝐶 × 𝑅𝐶𝐸) ×𝑉𝐶𝐸𝑠𝑎𝑡(𝑇𝑗)

𝑉𝐶𝐸𝑠𝑎𝑡(𝑇𝑗𝑚𝑎𝑥).

Also the maximum turn off voltage can be determined:

𝑉𝑇𝑂𝑀𝐴𝑋 = 𝑉𝑇𝑂 + (𝑉𝐶𝐸𝑠𝑎𝑡(𝑇𝑗𝑚𝑎𝑥) − 𝑉𝐶𝐸𝑠𝑎𝑡(𝑇𝑗)) .

In the flyback circuit, the collector current rises linearly from zero at turn on to a peak value, Ic, at turn

off. For a periodical signal with a given duty cycle the conduction losses are given in equation (24):

[117]

𝑃𝐶𝐼 = 1

6× 𝐼𝑐 × 𝐷 × (2 × 𝐴 × 𝐼𝑐 + 3 × 𝐵) (26)

Where: A = RCE ×VCEsat(Tj)

VCEsat(Tjmax) and: B = VTOMAX ×

VCEsat(Tj)

VCEsat(Tjmax) (27) (28)

In equation (26), VTOMAX is used to achieve worst case losses.

4.4.3 Calculating IGBT body diode conduction losses

As well as the IGBT losses, the losses in the body diode (if present) have to be calculated. The

instantaneous value of the diode conduction loss is: [117]

𝑃𝐶𝐷(𝑡) = 𝑉𝐷(𝑡) × 𝑖𝐷(𝑡) = 𝑉𝐷𝑜𝑛 × 𝑖𝐹(𝑡) + 𝑅𝐷 × 𝑖𝐷2(𝑡)

And if the average diode current is IDav and the rms diode current is IDrms, the average diode

conduction losses across the switching period is in equation (27): [117]

PCD = VDon × IDav + RD × IDrms2 (29)

Both the turn on voltage of the diode (VDon) and the on resistance of the diode (RD) can be found in

the diode forward current vs forward voltage curve shown in Figure 92:

99

Figure 92 - Typical diode forward current against forward voltage [98]

4.4.4 Calculating IGBT switching losses

For the IGBT switching losses, no simple expression can be found to accurately determine the

voltage and current transient at turn on and turn off, therefore the parameters concerning the

switching losses were taken from the device datasheet. Typically, the parameters used refer to a

specific test performed on the device that simulates an inductive load to determine switching energy

losses. The switching losses consist of the turn on and turn off energy multiplied by the switching

frequency:

𝑃𝑠𝑤𝐼 = (𝐸𝑜𝑛𝑀 + 𝐸𝑜𝑓𝑓𝑀) × 𝑓𝑠 (30)

However, in the case of the flyback converter, the current in the primary side always returns to zero

at the end of the on state, therefore Eon = 0 and only the turn off losses are needed. Using the graph

for switching losses on the device datasheet, it is possible to interpolate the curves and calculate the

turn on losses, like in Figure 93. However the simulated test is using different gate drive resistors,

test voltage and temperature so some scaling will need to be applied.

100

Figure 93 - Interpolation of switching losses. Turn off (left) Turn on (Right) [98]

Equation (31) the turn off losses:

EoffI = Aoff × IC + Boff (31)

Where: 𝐴𝑜𝑓𝑓 = 𝛥𝐸

𝛥𝐼𝐶 and 𝐵𝑜𝑓𝑓 = 𝐸𝑜𝑓𝑓 𝑎𝑡 𝐼𝑐 − 𝐴𝑜𝑓𝑓 × 𝐼𝐶

If the gate resistor used in the simulation test is different from what is required, then scaling is needed.

So the turn off losses against gate resistance curve is used and the two values are taken at the

datasheet gate resistance (𝐸𝑜𝑓𝑓 𝑅𝐺 𝑑𝑎𝑡𝑎) and the user resistance (𝐸𝑜𝑓𝑓 𝑅𝐺 𝑢𝑠𝑒𝑟) and then used to scale

EOFF:

𝐸𝑜𝑓𝑓𝐼 = (𝐴𝑜𝑓𝑓 × 𝐼𝐶 + 𝐵𝑜𝑓𝑓) × (𝐸𝑜𝑓𝑓 𝑅𝐺 𝑢𝑠𝑒𝑟)

(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑑𝑎𝑡𝑎)

Next the switching voltage is taken into account, and the switching voltage used for the test on the

datasheet (𝑉𝐷𝐶 𝑑𝑎𝑡𝑎) and the user voltage (𝑉𝐷𝐶 𝑢𝑠𝑒𝑟) are taken and used to scale EOFF:

𝐸𝑜𝑓𝑓𝐼 = (𝐴𝑜𝑓𝑓 × 𝐼𝐶 + 𝐵𝑜𝑓𝑓) × (𝐸𝑜𝑓𝑓 𝑅𝐺 𝑢𝑠𝑒𝑟)

(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑑𝑎𝑡𝑎) ×

(𝑉𝐷𝐶 𝑢𝑠𝑒𝑟)

(𝑉𝐷𝐶 𝑑𝑎𝑡𝑎)

Finally, the junction temperature needs to be considered and the junction temperature used for the

datasheet test (𝐸𝑜𝑓𝑓 𝑇𝑗 ) and, for the worst case losses, the maximum junction

temperature: (𝐸𝑜𝑓𝑓 𝑇𝑗𝑀𝐴𝑋 ), are used to scale EOFF giving equation (32):

EoffI = (Aoff × IC + Boff) × (Eoff RG user)

(Eoff RG data) ×

(VDC user)

(VDC data) ×

(Eoff Tj )

(Eoff TjMAX ) (32)

This can be then simplified into (33):

EoffI = A2 × IC + B2 (33)

101

Where: 𝐴2 = 𝐴𝑜𝑓𝑓 ×(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑢𝑠𝑒𝑟)

(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑑𝑎𝑡𝑎)×


(𝑉𝐷𝐶 𝑑𝑎𝑡𝑎)×

(𝐸𝑜𝑓𝑓 𝑇𝑗 )

(𝐸𝑜𝑓𝑓 𝑇𝑗𝑀𝐴𝑋 )

And: 𝐵2 = 𝐵𝑜𝑓𝑓 ×(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑢𝑠𝑒𝑟)

(𝐸𝑜𝑓𝑓 𝑅𝐺 𝑑𝑎𝑡𝑎)×


(𝑉𝐷𝐶 𝑑𝑎𝑡𝑎)×

(𝐸𝑜𝑓𝑓 𝑇𝑗 )

(𝐸𝑜𝑓𝑓 𝑇𝑗𝑀𝐴𝑋 )

PswI = (EoffI) × fsw (34)

4.4.5 Calculating IGBT body diode switching losses

The switching losses of the body diode (if present) have to be considered. The turn off energy losses

mostly consist of the reverse recovery energy (EonD) which consists of the reverse recovery charge

(Qrr) multiplied by the diode recovery voltage for the rise and fall periods, as seen in equation (35):

EonD =1

4 × QrrVDrr (35)

PswD = (EonD) × f𝑠𝑤

For the worst case losses, VDrr is the supply voltage. Since the turn off energy EoffD is close to zero,

this energy loss is typically neglected.

4.4.6 Calculating IGBT total losses

To determine the total losses in the device, the conduction and switching losses plus the diode

conduction and switching losses, must be combined, as in equation (36):

Ptot = PCI + PCD + PswI + PswD (36)

102

4.4.7 Calculating MOSFET losses

To form a comparison, the losses of the MOSFET devices were calculated in the same way as the

IGBT losses [118], and as with the IGBT devices, the worst possible losses were used. So the worst

voltage, current and temperature extremes were again used in calculating the losses. The thermal

parameters are assumed to be the same as in the IGBT calculations.

MOSFET parameters

Duty cycle (D) 50%

Gate drive voltage (Vg) 15V

Gate resistance (Rg) 3Ω

Supply voltage (Vdd) 1200V

Collector current (Ic) 28A

Collector current (Icrms) 11.43A

Collector current (Icav) 5.43A

Switching frequency (fs) 40000Hz

Table 10 - MOSFET loss calculation parameters

4.4.8 Calculating MOSFET conduction losses

As with the conduction losses of the IGBT, the conduction loss during the on state of the MOSFET

is the product of drain current (iD) squared and drain-source on state resistance (RDSon) at iD.

Therefore:

PCM = RDSon × iDrms2 (37)

Where RDSon is taken from the MOSFET datasheet at the correct iD, temperature and at the correct

gate-source voltage (VGS).

4.4.9 Calculating MOSFET body diode conduction losses

As well as the MOSFET losses, the losses in the body diode (if present) must be calculated [119].

This is calculated in the same way as for the IGBT body diode:

PCD(t) = VD × iF av + RD × iF rms2

Where VD is the diode effective voltage, iF is the diode forward current and RD is the diode effective

on resistance.

The values needed for this equation are not always available from the device manufacturer and

therefore diode losses are often approximated.

103

4.4.10 Calculating MOSFET switching losses

For the MOSFET, switching losses consist of the turn on and turn off energy loss multiplied by the

switching frequency:

PswM = (Eon + Eoff) × fs (38)

Where:

𝐸𝑜𝑛 = 𝑉𝑑𝑑 × 𝐼𝑑𝑟𝑚𝑠 × (𝑡𝑟𝑖+𝑡𝑓𝑣

2) = 0. Since Idrms is zero at the start of the switching cycle, so the

MOSFET switching energy loss involves the turn off losses only:

EoffM = Vdd × Idrms × (trv+tfi

2) (39)

Where the voltage rise time (trv) is:

𝑡𝑟𝑣 = (𝑡𝑟𝑣1+𝑡𝑟𝑣2

2)

𝑡𝑟𝑣1 = (𝑉𝑑𝑑 − 𝑅𝐷𝑆𝑜𝑛 (100°𝐶) × 𝐼𝑑𝑟𝑚𝑠) ×𝐶𝑔𝑑1

𝐼𝐺𝑜𝑓𝑓 and 𝑡𝑟𝑣2 = (𝑉𝑑𝑑 − 𝑅𝐷𝑆𝑜𝑛 (100°𝐶) × 𝐼𝑑𝑟𝑚𝑠) ×

𝐶𝑔𝑑2

𝐼𝐺𝑜𝑓𝑓

And the current fall time (tfi) is [118] [119]:

𝑡𝑓𝑖 = (𝑅𝑔 𝑖𝑛𝑡𝑒𝑟𝑛𝑎𝑙 + 𝑅𝑔) × 𝐶𝑖𝑠𝑠 (𝑉𝑑𝑑) × log (𝑉𝑡ℎ+

𝐼𝑑 𝑟𝑚𝑠𝑔𝑓𝑠

𝑉𝑡ℎ)

Where the gate current is: 𝐼𝑔𝑜𝑓𝑓 = −𝑉𝑝𝑙𝑎𝑡𝑒𝑎𝑢

𝑅𝑔, the MOSFET threshold voltage is Vth, and gfs is the

device transconductance. Cgd1 and Cgd2 are the gate source capacitances of the MOSFET at

different values of Vdd and Ciss(Vdd) is the input capacitance at Vdd. All 3 of these values are found from

the typical capacitances graph on the device datasheet as shown in Figure 94:

Figure 94 - Representation of the gate-drain capacitance [118]

104

4.4.11 Calculating MOSFET body diode switching losses

The switching losses of the body diode (if present) have also to be considered. These consist of turn

on and turn off losses, and as the turn off losses are typically very small in comparison to the turn on

losses, the turn off losses can be ignored [118]. Thus the turn off loss equation is the same as in the

IGBT case:

EonD =1

4 × QrrVDrr

4.4.12 Calculating MOSFET total losses

The total losses in the MOSFET are found by combining the device conduction and switching losses

plus the diode conduction and switching losses:

𝑃𝑡𝑜𝑡 = 𝑃𝑐𝑜𝑛𝑑𝑀 + 𝑃𝑐𝑜𝑛𝑑𝐷 + 𝑃𝑠𝑤𝑀 + 𝑃𝑠𝑤𝐷 (40)

4.4.13 IGBT and MOSFET comparison

Calculating these losses for a variety of potential IGBT and MOSFET devices allows the most

efficient devices to be found. Being able to compare the devices by cost and rating ensures that the

optimal device will be chosen for the project. Table 11 shows a comparison between selected

potential IGBTs, which have the minimum suitable circuit parameters (Vce = 1.2 kV, Ic = 28A).

The table features the maximum operating voltage (VCE), the maximum operating current at a case

temperature of 60°C, maximum power dissipation at a junction temperature of 110°C (Pd), the total

calculated device losses, the cost per device, and then the cost and losses for 12 devices (2 switch

configuration). As can be seen the majority of the devices are either over or very close to their power

operating limits, The device that appears most suitable, the Infineon IGW40N120H3, is shown in bold

text. It can be seen that the switch losses are all higher than 10% of the charger maximum output

power, so that the efficiency will be less than 90%, which is unacceptable.

Table 12 below shows the same comparison made for the MOSFET devices. Two of the MOSFET

devices are over the maximum power dissipation limit, and one does not meet the required drain

current level. Despite the limitations of the MOSFET devices, it can be seen that the losses are

generally lower than the IGBT devices and in 3 cases the losses are lower than 10% of the chargers

capability. Out of the 4 suitable MOSFET devices, only the ROHM SCT2080KEC device is suitable.

105

Name Vce (kV)

Ic (A)

Pd (W)

Device losses (W)

Cost (per

device)

Losses per 12 (kW)

Cost\12

Infineon IHW30N160R2

1.6 44 175 292.8 £4.98 3.513 £59.76

IXYS IXGF32N170 1.7 38 200 499.9 £12.25 5.998 £147.00

Fairchild HGTG18N120BND

1.2 43 124 199.9 £5.93 2.398 £71.16

I.R. IRGPS40B120UDP

1.2 63 238 177.1 £14.93 2.125 £179.16

Infineon IKW40N120H3

1.2 61 220 179.1 £ 8.06 2.179 £96.72

ON semi NGTB30N120LWG

1.2 47 224 115.9 £4.33 1.390 £51.96

Infineon IGW60T120

1.2 82 130 409.8 £6.40 4.917 £76.80

Infineon IGW40N120H3

1.2 63 210 122.9 £5.35 1.474 £64.20

Fuji FGW40N120VD

1.2 59 175 246.8 £10.10 2.961 £121.20

Infineon SKW25N120

1.2 37 110 163.6 £ 5.99 1.963 £71.88

Fairchild FGA20S120M

1.2 32 170 128.5 £2.34 1.542 £28.08

Fuji FGW40N120HD

1.2 64 175 233.3 £9.28 2.799 £111.36

Table 11 - IGBT comparison table

Further investigations found that the Rohm SCT2080KEC MOSFET was currently unavailable, and

so initially the HGTG18N120BND IGBT was used since it was readily available.

Name Vds

(kV)

Id

(A) Pd (W)

Device losses (W)

Cost (per

device)

Losses per 12 (kW)

Cost\12

CREE C2M0080120D

1.2 27 75 33.4 £18.65 0.400 £223.80

CREE CMF10120D

1.2 18 30 38.3 £14.86 0.459 £178.32

ROHM SCT2080KEC

1.2 35 110 42.7 £12.72 0.512 £152.64

IXYS IXFK20N120

1.2 19 250 253.7 £22.01 3.044 £264.12

Table 12 - MOSFET comparison table

106

4.5 Capacitor lifetime study

One of the design restraints in this project is to avoid the use of electrolytic capacitors due to concerns

over lifetime at temperature extremes. This part of the chapter details a study of capacitor lifetime.

4.5.1 Capacitor types

4.5.1.1 Ceramic capacitors

Ceramic capacitors are typically made of multiple layers of ceramic material alternating with metal.

The ceramic acts as a dielectric and is typically made from ferroelectric materials mixed with oxides,

and the metal parts of the structure act as electrodes.

There are 3 classes of ceramic capacitors, class 1 are stable over voltage and temperature, class 2

are generally considered to be more volumetrically efficient but less accurate than their class 1

counterparts. Class 3 ceramic capacitors have an even greater volumetric efficiency however have

worse electrical characteristics, such as higher losses and parameter degradation due to aging.

Type 1 will be considered in this study and type 2 only where necessary. Ceramic capacitors are

non-polarised and offer capacitances in the low pico to high micro farad range and are capable of

sustaining high voltage.

4.5.1.2 Film capacitors

Film capacitors use layers of plastic film as the dielectric. Metal electrodes are also built into the

construction of the capacitor.

There are multiple dielectrics available for film capacitors that offer varying capabilities, such as a

wide operating temperature range, high voltage operation and high capacitance. There are also

snubber and high power film capacitors available.

Film capacitors are non-polarised and offer capacitances in the high pico to high micro farad range

and are capable of very high voltage. However film capacitors can be expensive.

4.5.1.3 Aluminium Electrolytic capacitors

Aluminium Electrolytic capacitors consist of a metal anode covered with dielectric oxide and a wet or

solid electrolyte for a second electrode. Electrolytic capacitors have a high capacitance per unit

volume and are used in high current, low frequency applications.

There are multiple dielectrics available for electrolytic capacitors that offer varying capabilities, such

as a wide operating temperature range, high voltage operation and high capacitance.

Aluminium Electrolytic capacitors are polarised, or can be bi-polar, and offer capacitances in the low

micro to low milli farad range and are capable of withstanding medium voltage.

107

4.5.1.4 Silver Mica capacitors

Silver mica capacitors are constructed of sheets of mica and copper, layered and clamped together

in epoxy. They are extremely stable and long lasting due to the epoxy construction; they also provide

a high capacitance per unit volume.

Silver mica capacitors are non-polarised and offer capacitances in the low pico to low nano farad

range and are capable of high voltage operation. They are generally considered obsolete and are no

longer in common use due to the high price of mica.

4.5.1.5 Tantalum Electrolytic capacitors

Tantalum capacitors are a part of the electrolytic capacitor family and consist of an anode made from

tantalum covered in a thin layer of oxide dielectric. Like the aluminium counterpart, a wet or solid

electrolyte forms a second electrode. Tantalum capacitors have a high capacitance per unit volume

and are used best in high current, low frequency applications.

Tantalum Electrolytic capacitors are polarised, and offer capacitances in the low milli farad range

and are capable of only low voltage operation.

4.5.1.6 OS-CON polymer capacitors

OS-CON polymer capacitors are constructed with a polymer acting as an electrolyte. Part of the

electrolytic capacitor family, they are either tantalum polymer, aluminium polymer or a hybrid which

combine a solid polymer electrolyte with a liquid electrolyte.

Polymer Electrolytic capacitors are polarised and offer capacitances in the low micro to low milli farad

range and are capable of low voltage operation, however they are very expensive.

Table 13 lists the major factors in the choice of capacitor.

Electrostatic Electrolytic

Ceramic Film Mica Aluminium Tantalum OS-CON

Size Small-Med All Med-Large Small Small Small

ESR Very Low Ultra Low Low Medium Low low

Capacitance Low Good Low High High High

Rated V 5V - 5kV 15V - 2kV 100V - 1kV 5V - 500V 2.5V - 50V 5V - 50V

Maximum

Operating

Temp

>150°C 105°C -

150°C

125°C -

150°C

85°C -

125°C

125°C -

150°C

85°C -

105ºC

V derating Not

needed

Not

needed Up to 70% Up to 70% Up to 60% Up to 70%

Cost Low High Very High Low High Very High

108

Table 13 - Capacitor comparison

From this comparison table, it can be seen that ceramic, film and aluminium electrolytic capacitors

may be suitable for this project. However the table only details the general parameters of common

capacitors and does not include specialised capacitors.

4.5.2 Capacitor lifetime comparison

In order to further determine which capacitors are suitable for use in this application, a lifetime study

was conducted. Some studies have been conducted previously that highlight film and ceramic

capacitors as having longer lifetimes than Aluminium electrolytic capacitors [120] [121] [122] however

these studied do not link lifetime of capacitors to ambient temperature.

Several capacitor companies were identified and lifetime data was extracted from their website where

possible. In order to narrow down the selection of available capacitors, the highest voltage capacitor

at each major capacitance level (1n, 10n, 100n, 1u, 10u and 100u) was selected for each capacitor

company. If data was not available, the company was contacted in order to obtain a method of

determining capacitor lifetime.

Following the survey, it was noted that data was only available for around 50% of the capacitors

chosen and in the majority of the cases, the data was idealised to low strain situations. Consequently

information available from companies and from standards was also used to determine the lifetime of

the components chosen. The assessment does not cover automotive capacitors designed especially

for high temperature applications as these are generally significantly more expensive than standard

capacitors. The assessment analyses only a small selection of capacitors suitable for this application

(selected by value, voltage etc), since there was limited lifetime data available. However most major

capacitor manufacturers provide equations and data to determine lifetime, so that a study was a

feasible proposition. To further determine the most suitable capacitor with regards to reliability, a

mean time between failure study was conducted.

4.5.2.1 AVX Corporation

From AVX, the following equation is available [123]:

𝐿𝑜

𝐿𝑡= (

𝑉𝑡

𝑉𝑜)

𝑋

(𝑇𝑡

𝑇𝑜)

𝑌

(41)

Where X and Y are exponential effects of voltage and temperature, Lt is the test lifetime, Lo is the

operating lifetime, Vt is the test voltage, Vo is the operating voltage, Tt is the test temperature, To is

the operating temperature. AVX state this equation is suitable for all their capacitors.

For the SV09AC105KAR, 1kV, 1uF ceramic capacitor, the test life is 1000hrs at Vmax and 125°C

[124], X and Y are typically 3 and 8 respectively. [123]

109

Using (41), setting Vo to 800V and sweeping To gives the operating lifetime for every operating

temperature. The result is shown in Figure 95. Again using (41), the FFB16L0155K film capacitor

can be analysed by setting X and Y to 4 and 7 for film capacitors [125] and adjusting for 100000hrs

at 70°C, The results of the comparison of these two capacitors is shown in Figure 95.

Figure 95 - AVX Ceramic and Film capacitor lifetime against temperature

From the results both ceramic and film capacitors at the same value capacitance and similar voltage

have very similar lifetimes. In terms of vehicle lifetime, at 60°C the film and ceramic capacitors would

last approximately 45 years (800,000 miles [126]) and at 100°C the ceramic capacitor would last 1.3

years (25,000 miles [126]) and the film capacitor would last 2.3 years (43,125 miles [126]).

4.5.2.2 Cornell Dubilier

For Cornell Dubilier, film and electrolytic capacitors have very different lifetime calculations. For film

capacitors equation (41) is used: [127]

𝐿𝑜

𝐿𝑡= (

𝑉𝑡

𝑉𝑜)

8

2𝑇𝑡−𝑇𝑜

10 (42)

Where the variables are the same as in (38) and for electrolytic capacitors: [128]

𝐿𝑜 = 𝑀𝑣𝐿𝑡2((𝑇𝑀−𝑇𝑜)

10⁄ ) (43)

Where, Mv = 4.3-3.3Vo/Vt, a unit less voltage multiplier, TM is the maximum internal temperature, LM

is the expected lifetime at maximum voltage and temperature and Lo is as before. These are applied

to Film (941C20W1K-F, 2000hrs at 85°C and 1.25 x Vrated) and Electrolytic (SEK010M400ST 2000hrs

1000

10000

100000

1000000

10000000

100000000

1E+09

1E+10

1E+11

5

10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

95

10

0

10

5

11

0

11

5

12

0

12

5

Life

tim

e (

Ho

urs

)

Temperature (degrees C)

SV09AC105KARceramic

FFB16L0155Kfilm

110

at 105°C and 1 x Vrated) capacitors. The same comparison conducted as in the AVX example. The

results are shown in Figure 96.

Figure 96 - Cornell Dubilier Film and Electrolytic capacitor lifetime against temperature

From Figure 96 its can be seen that the electrolytic capacitor has a lower lifetime overall when

compared to a film capacitor counterpart. As before, in terms of vehicle lifetime, at 60°C the ceramic

capacitor would last 8.5 years (160,000 miles [126]) and at 100°C it would last about 6 months, a

greatly reduced lifetime compared to from the film capacitor which has approximately the same

figures as in the AVX study.

4.5.2.3 Illinois Cap

From [129], formulas for calculating the lifetime for Ceramic, Film and Electrolytic capacitors are

presented below. The formula for ceramic capacitors is the same as (41), except X is set to 7 and Y

set to 8. Film capacitor equation is also very close to (42) with minor adjustments to values:

𝐿𝑜

𝐿𝑡= (

𝑉𝑡

𝑉𝑜)

7

2𝑇𝑡−𝑇𝑜

10 (44)

Electrolytic capacitor life prediction is again similar to (39) minus the voltage factor: (Vt/Vo)8:

𝐿𝑜

𝐿𝑡= 2

𝑇𝑡−𝑇𝑜10 (45)

Illinois capacitor only currently sell film and electrolytic capacitors (105PPA202K and 105TTA450M)

and these are examined as before (0.8xVrated at 80°C) and the results shown in Figure 97.

100

1000

10000

100000

1000000

10000000

100000000

5

10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

95

10

0

10

5

11

0

11

5

12

0

12

5Life

tim

e (

Ho

urs

)


941C20W1K-Ffilm

SEK010M400STElectrolytic

111

Figure 97 - Illinois Capacitor Film and Electrolytic capacitor lifetime against temperature

Overall the results are consistent between manufacturers and show that electrolytic capacitors have

shorter lifetimes than film or ceramic capacitors. Again, in terms of vehicle lifetime, at 60°C the

ceramic capacitor would last 1.3 years (25,000 miles [126]) and at 100°C it would last about 1 month,

a greatly reduced life from the film capacitor which has approximately the same figures as in the AVX

study.

4.5.3 Failures in time

Capacitors can also be judged using a failure rate analysis where a batch of capacitors are tested

over a set length of time and the number of failures determined over the combined test hours. The

resources required to conduct such a test are considerable and cannot be conducted in this study.

An alternative way of determining Failures In Time (FIT) is to used the military handbook [130]. The

Military Handbook provides a calculation for a range of capacitor styles, values, voltages,

temperatures and quality and environment factors. The equation for FIT is shown in (46), and some

tables of the variables required are shown in Table 14. A full list of the variables is available in the

datasheet [130].

𝜆𝑝 = 𝜆𝑏𝜋𝑇𝜋𝐶𝜋𝑉𝜋𝑆𝑅𝜋𝑄𝜋𝐸 𝑓𝑎𝑖𝑙𝑢𝑟𝑒𝑠/106 ℎ𝑜𝑢𝑟𝑠 (46)

Where λb is the capacitor type variable, πT is the ambient temperature variable, πC is the capacitance

variable, πV is the voltage stress variable, πSR is the series resistance variable (tantalum capacitors

only, therefore, not included in this study), πQ is the quality factor (3 as there is no established quality)

and πE is the environmental factor.

100

1000

10000

100000

1000000

10000000

100000000

5

10

15

20

25

30

35

40

45

50

55

60

65

70

75

80

85

90

95

10

0

10

5

11

0

11

5

12

0

12

5

Life

tim

e (

Ho

urs

)


105PPA202Kfilm

105TTA450Melectrolytic

112

Types λb πT πC πV πQ πE πT 1 2

CP 0.00037 1 1 1 3 1 20°C 0.91 0.79

CA 0.00037 1 1 1 3 1 30°C 1.1 1.3

CZ, CZR

0.00037 1 1 1 3 1 40°C 1.3 1.9

50°C 1.6 2.9

CQ, CQR

0.00051 1 1 1 3 1 60°C 1.8 4.2

70°C 2.2 6

CH 0.00037 1 1 1 3 1 80°C 2.5 8.4

CHR 0.00051 1 1 1 3 1 90°C 2.8 11

CFR 0.00051 1 1 1 3 1 100°C 3.2 15

CRH 0.00051 1 1 1 3 1 110°C 3.7 21

CM 0.00076 2 1 2 3 1 120°C 4.1 27

CMR 0.00076 2 1 2 3 1 130°C 4.6 35

CB 0.00076 2 1 2 3 1 140°C 5.1 44

CY 0.00076 2 1 2 3 1 150°C 5.6 56

CYR 0.00076 2 1 2 3 1 πC 1 2

CK 0.00099 2 1 3 3 1 1nF 0.5370318 0.2041737

CKR 0.00099 2 1 3 3 1 10nF 0.66069345 0.3467365

CC, CCR

0.00099 2 1 3 3 1 100nF 0.81283052 0.5888436

1uF 1 1

CDR 0.002 2 1 3 3 1 10uF 1.23026877 1.6982436

CSR 0.0004 1 2 4 3 1 100uF 1.51356125 2.8840315

CWR 0.00005 1 2 4 3 1 πV 1 2 3 4 5

CL 0.0004 1 2 4 3 1 0.1 1 1 1 1 1

CLR 0.0004 1 2 4 3 1 0.2 1 1 1 1 1.1

CRL 0.0004 1 2 4 3 1 0.3 1 1 1.1 1 1.2

CU, CUR

0.00012 2 2 1 3 1 0.4 1.1 1 1.3 1 1.5

0.5 1.4 1.2 2.6 1 2

CE 0.00012 2 2 1 3 1 0.6 2 2 2 2 2.7

CV 0.0079 1 1 5 3 1 0.7 3.2 5.7 2.6 15 3.7

PC 0.006 2 1 5 3 1 0.8 5.2 19 3.4 130 5.1

CT 0.0000072 2 1 5 3 1 0.9 8.6 59 4.4 990 6.8

CG 0.006 1 1 5 3 1 1 14 166 5.6 5900 9

Table 14 - FIT variable tables

Here, the number in columns πT, πC and πV correspond to column numbers on the right of the table.

From this the FIT can be calculated for the capacitors examined before.

For the AVX SV09AC105KAR 1uF, ceramic capacitor, the capacitor style is CK (fixed, ceramic

dielectric – general purpose) and as before, its FIT; calculated at 0.8xVrated and temperature is varied.

As an example, using (43) for 80°C:

𝜆𝑝 = 𝜆𝑏𝜋𝑇𝜋𝐶𝜋𝑉𝜋𝑄𝜋𝐸 = 0.00099 × 8.4 × 1 × 3.4 × 3 × 1 = 0.0848 ≈ < 1 𝑓𝑎𝑖𝑙𝑢𝑟𝑒𝑠/106 ℎ𝑜𝑢𝑟𝑠

113

This can also be done for the other capacitors examined earlier however as the capacitor styles are

all similar, the same FIT results are obtained so taking ceramic (CC), aluminium electrolytic (CU) and

film (CQ) capacitors with non-established reliability and varying the temperature gives the results in

Figure 98.

Figure 98 - FITs for Ceramic, Film and Aluminium Electrolytic

From the results, the FIT data shows ceramic capacitors (CK) are more prone to failure than

Aluminium Electrolytic (CU) or Film (CQ) capacitors with Film capacitors being the most consistent

over the temperature range.

4.5.4 Conclusions

From the analysis conducted both methods of calculating the reliability of capacitor technologies

consistently place Aluminium Electrolytic capacitors with a low lifetime and a higher FIT rate than

Film capacitors. Ceramic capacitors are judged to have a similar lifetime to film capacitors however

ceramic capacitors have a significantly higher FIT rate than both Film capacitors and Electrolytic

capacitors. From this it is determined that the best choice of capacitor for this application is a film

type due to the superior life and reliability. Thus the charger should be able to operate at high

temperatures for longer periods of time, without capacitor failure, if film capacitors are used.

However, cost of the charger is increased.

In the next chapter section, the circuit will be analysed from a thermal perspective.

4.6 Thermal considerations

Having decided upon a suitable IGBT, the thermal aspects had to be considered to ensure that it

would operate within specification, and to determine the cooling required. First of all, basic

calculations were used to form a thermal equivalent circuit and obtain a maximum temperature rise

across a single device.

0

0.1

0.2

0.3

0.4

0.5

0.6

20 30 40 50 60 70 80 90 100 110 120 130 140 150

FITs

pe

r 1

00

00

00

hrs


CK

CQ

CU

114

4.6.1 Basic thermal circuit

To determine the maximum temperature rise across the device, a basic thermal resistance network

modelling the device junction to ambient thermal resistances is needed. On the left side of Figure

99, the basic thermal equivalent circuit can be seen [131]. The equivalent circuit consists of a current

source to simulate the power dissipated in the device and 3 resistances to simulate the thermal

resistance of each stage of the device: the thermal resistance from junction to case (R𝛳j-c), from case

to heatsink (R𝛳c-h) and from heatsink to ambient air (R𝛳h-a). As the ROHM device does not have an

electrically isolated tab [132] (that is, the metal tab is connected to the collector of the MOSFET) the

tab will have to be isolated from the earthed heatsink using an insulation pad and this is reflected in

the right hand side of Figure 99 where the thermal resistance between the case and the centre of

the insulation is added (R𝛳c-i), as well as the thermal resistance between the centre of the insulation

and the heatsink (R𝛳i-h) [131].

Figure 99 - Basic thermal circuit (left), Thermal circuit with insulation (right)

4.6.2 Thermal insulation

As the metal tab of the MOSFET needs to be isolated from the heatsink, an insulating but thermally

conducting pad was chosen, able to isolate high voltages (above 1.5kV). Some thermally conductive

film from Amec thermasol (W2TR090B) [133] was chosen for the pad, which has a thermal resistivity

of 0.249°C/W/in2, an insulation strength of 6kV/mm and an operating temperature range from -60 to

180°C. To keep the insulating pad thermal resistance low is necessary to increase its effective area.

The majority of the heat flow will be concentrated directly under the device tab. Therefore to aid in

the transfer of heat into the thermally conductive film, a copper layer can be added between the

device and the pad, increasing the pad area and reducing its themal resistance. The graph in Figure

100 shows the thermal resistance of the insulation film against the area of the pad itself (in inches2).

115

Figure 100 - Thermal resistance of insulation against size of insulation

The graph shows an exponential decrease of the thermal resistance as the area increases. The

effective thermal resistance is very low for any area larger than 3 in2. However placing a 3in2 copper

plate under each transistor would be unwieldy, due to the increased size. Therefore a trade-off

between size and thermal resistance needs to be made.

It was decided that an area of 2in2 (2in x 1in) would be used as this gives a low thermal resistance

without creating a copper pad that is too large to be used effectively. It is also of interest to ensure

that the copper heat transfer pad distributes the heat correctly. The furthest distance which the heat

could possibly travel is 2.828 inches (corner to corner). In this case the maximum possible junction

temperature is [134]: 𝑄

𝑡=

𝑘×𝐴×(𝑇1−𝑇2)

𝑑→ 𝑇2 = 𝑇1 −

𝑄×𝑑

𝑡×𝑘×𝐴= 𝑇𝑗 − 109.8585°𝐶, (where d is the length of

the path, A is the area, k is the thermal conductivity and Q is the heat flow in the plate). If T1 is set to

110°C therefore a drop of 0.1415°C is present over the copper plate, which is negligible. Therefore

the insulation layer thermal resistance is: R𝛳i-h = 0.249 (for 1 inch2 insulation – worst case) + 0.00149

(thermal compound) = 0.25049°C/W.

4.6.3 Choice of cooling

Adding this insulation layer into the model in Figure 99 allows the cooling method to be determined.

Two possible cooling methods are air or water cooled as discussed below.

116

4.6.3.1 Air cooling

For air cooling, a setup where 3 phases are used and 4 devices are used per phase will need forced

convection to help transfer the heat to ambient air. Typical convection air cooled heatsinks tend to

have a thermal resistance of around 1-3°C/W, which is too high. The lowest value thermal resistance

heatsink that could be found was a HS Marston product (890SP-03000-A-100) [135] with a thermal

resistance of 0.04°C/W (with 2 Papst 3312 fans) [136]. Adding this into the thermal network gives

the network shown in Figure 101:

The maximum junction temperature should be set to 110°C, [137], also the maximum case

temperature should be <80°C. The ambient temperature is set to its maximum of 60°C.

The junction to case thermal resistance was taken from the datasheet and the case to insulation

thermal resistance depends on the physical connection between the device and the heatsink. The

device should be mounted so that it is flush and tight to the surface of the heatsink at the specified

mounting torque, and thermal compound should be used. The appropriate thermal parameters were

calculated using an application note [138]. By using thermal paste (whose resistance is included in

the insulation layer calculation) and a mounting torque of 1Nm, this should provide a thermal case to

insulation resistance of 0.15°C/W [139] [140].

So from the thermal network analysis in, the maximum power dissipation is around 30% higher (at

49.48W) than the calculated maximum power dissipated in the device (from section 4.4.13). The

junction temperature is almost 100°C and 10°C below the maximum temperature (110°C), also the

case temperature is below the recommended value (80°C).

Due to the cooling requirements 2 heatsinks and 2 sets of fans would be required to cool the 6 phase

legs of the charger. The fans also each take 14W from a 12V supply, further reducing system

efficiency.

Figure 101 - Thermal network for air cooled heatsink

117

4.6.3.2 Water cooling

As an alternative to the air cooled method, a water cooled method was considered.

As with air cooling, the amount of devices used and power dissipated per device requires forced

convection of a liquid in a cold plate to transfer heat to the liquid. The heated liquid is then cooled in

a separate forced air heat exchanger. As the thermal resistance of liquid cold plates tends to be very

low (<0.01°C/W), thus a more effective thermal network results. With sufficient cooling of the liquid,

the junction temperature can be controlled. Several thermal plates from: Lytron, Thermacore and

Aavid thermalloy were considered and the best cold plate for its size and thermal characteristics was

chosen. An Aavid Thermalloy 4 pass, 12 inch plate was chosen [141]; coupling this with a 25 litre/min

(5.5 gal/min) EBP25 booster pump from Davies Craig [142] should provide a thermal resistance of

0.005°C/W. Adding this into the thermal network gives the network seen in Figure 102:

As can be seen in the model and the calculations, in this case the ambient temperature is ignored

as an artificial ambient temperature is created in the heatsink. This is being done by controlling the

temperature of the water, via a heat exchanger. As in the air cooled case, the device and insulation

parameters stay the same.

With water cooling the maximum power dissipation is marginally higher than the air cooled case,

however this is assuming a water temperature at that of the ambient i.e. 60°C. If more cooling was

applied and an improved cooling medium was used (such as oil or glycol instead of water the liquid

temperature could be as low as 40°C. Should that occur the junction temperature would drop to 77°C

and more power could be dissipated. Therefore, so as to stay with automotive parts for reasons

which will be explained later, a Setrab 50-925-7612 radiator was chosen along with a Spal 12 inch

fan (VA10-AP10/C61S) [143]. The temperature rise in the water was then calculated using the

radiator characteristics in Figure 103. Physically the water cooling system creates a relatively thin

profile for the cooling unit (<200cm2). In reality the fan and radiator are already located on an EV and

therefore no additional space and weight would be required for cooling.

Figure 102 - Thermal network for liquid cooled heatsink

118

The heatsink has forced convection of liquid at 18.9 litre/min (5 gal/min). Comparing this flowrate

with the graph for the 25 tube radiator [144] gives 0.756 litre/min/tube → 5.7W/°C/tube = 142.5W/°C.

Introducing the fan at 1590M/hour (938CFM) derates the cooling effect to: 0.25 × 142.5W =

35.625W/°C. If the overall heat dissipated into the heatsink is 500W (38.8W × 12 devices + diodes)

then in the worst case of the ambient being 60°C, the heatsink temperature will rise to 74.035°C and

subsequently the junction temperature will reach 111°C which is slightly over the maximum. However

some adjustments can be made such as: lowering the insulation layer thermal resistance by making

the copper pads larger, using a better cooling medium or even introducing a higher speed fan. Under

lab conditions the ambient temperature is not expected to exceed 40°C, so lab testing of the charger

should not be problematic. Furthermore, the calculations made are in the absolute worst conditions

and it is unlikely the charger would ever experience such conditions. In practice, should the water

cooled plate exceed a set temperature then the charger power would be reduced, to reduce losses

and prevent damage.

Figure 103 - Radiator characteristics. Cooling effect per tube (left) and Correction factor for air flow speed (right)

In terms of power consumption of the cooling elements, the EBP25 pump consumes up to 40W and

the Spal fan consumes 75W, both from a 12V supply.

4.6.4 Proposed cooling setup

As none of the devices (diodes or switches) are isolated, each requires a heat spreader with thermal

insulation. The largest size of heat spreader possible without short circuits occurring between devices

is 100mm x 20mm in 2mm copper giving an insulation thermal resistance of 0.02909°C/W. This does

not include thermal compound which is present between all layers in order to give maximum thermal

transfer. An image of the proposed construction is in Figure 104.

119

Figure 104 - 3D model of proposed cooling setup

4.6.5 Conclusion

Overall, the two cooling methods are very close in performance. The air cooled method is better due

to the heat exchanger element of the water cooled method not being ideal – the cooling liquid ambient

relies on the heat exchanger. However the water cooled method can be improved by increasing the

copper and insulation pad area, increasing the water flow, or using an improved cooling medium was

used (such as oil or glycol instead of water).

The drawback of the air cooled method is the weight and volume of the heatsinks required. As for

using automotive parts as a heat exchanger, electric vehicles typically use water cooled systems to

help warm and cool the batteries for operation and it is possible that the kind of cooling infrastructure

used here is already on board the vehicle. If so this would save on weight as only the charging unit

needs to be added to the vehicle. As the cold plate has no fins thus twice as much surface area is

available for mounting components and in this case only one liquid cold plate is needed for the

charger. Here it is assumed the cooling medium ambient temperature depends on the heat

exchanger. In the absolute worst case, a specific radiator and fan assembly would need to be added

but the selections made here are very low weight.

Due to the advantages of increased heat dissipation, reduced size and weight, the novel aspect and

room for expansion of the heat exchanger element, the water cooling method was selected for this

project.

4.6.6 Advanced thermal modelling

In the previous section, the use of the basic thermal network was mainly to determine the maximum

instantaneous junction temperature in the MOSFET device however this is not an accurate depiction

of the overall thermal behaviour of the actual network.

120

For instance, in the ROHM SCT2080KE datasheet, a thermal network is given for the device showing

thermal capacitances (representing specific heat capacity [145] of the materials used in the

construction of the device) between the junction and the case of the device, as seen in Figure 105.

Figure 105 - Transient thermal network (Cauer model)

The transient thermal response is important when simulating the network, as when using the basic

model, the temperature rises and falls instantaneously. There are two advanced models available,

the Foster network and the Cauer network, which are explained and derived in the next sections.

4.6.7 Foster thermal network

The Foster network (or partial fraction network) [146] consists of individual RC elements which do

not represent the sequence of layers in the device structure. The individual nodes found in a typical

thermal network do not have any physical significance and the network relies on a constant case

temperature, so that it cannot be integrated with heatsink and ambient nodes. The network is used

to obtain a mathematical representation of the Zth characteristic of the device (or vice versa) which

shows how the thermal impedance of the network changes with duty ratio and switching frequency.

Figure 106 - Foster thermal model

It is, though, possible to get an approximation of the Foster model from the Zth curve. The single

pulse curve for the ROHM device chosen is shown in Figure 107 and this curve is plotted in Excel. If

the curve data is normalized then each value entered into Excel needs to be divided by the junction

to case thermal resistance to give the absolute values. Next, still using Excel, a curve fitting technique

is used to determine four RC pairs of variables that will generate a second curve. This second curve

will then be fitted to the Zth curve from the datasheet.

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Figure 107 - Transient thermal resistance curve for single pulse

The equation used to fit the second curve is [147]:

RT(t) = R1(t) × (1 − e(

−t

τ1)) + R2(t) × (1 − e

(−t

τ2)) + R3(t) × (1 − e

(−t

τ3)) + R4(t) × (1 − e

(−t

τ4)) (47)

Where RT is the steady state value of the junction to case thermal resistance, t is the length of

the pulse width and 𝜏𝑥 = 𝑅𝑥 × 𝐶𝑥. When this equation is applied to the curve fitting technique

the variables 𝑅𝑥 and 𝐶𝑥 are adjusted until the curve matches the curve given for the transient

thermal resistance. The result is shown in Figure 109 where the blue curve is the datasheet

curve and the red curve is the calculated value, also shown is the data entries in Excel under

their corresponding colours. Now that the curve has been fitted, the values for the Foster

equivalent network have been determined and are shown in the Foster network in Figure 108.

Figure 108 - Calculated Foster model

Putting this model into SIMetrix and running a step response test gives a similar step response

as seen in the Zth curve on the device datasheet, therefore proving the approximation of the

circuit is accurate. The circuit and response are seen in Figure 110.

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Figure 109 - Datasheet (blue) and calculated (red) curves for thermal impedance

Figure 110 - Foster thermal model (left) and response (right) in SIMetrix

4.6.8 Cauer thermal network

As for the Cauer model (or continued fraction model) [146], this is a realistic thermal representation

of the device structure. Typically this network is only used where the physical properties of each layer

of the construction of the device are known. Each RC element is assigned to a layer in the device so

that a variable case temperature is possible and connection to heatsink and ambient nodes is

possible. The Cauer thermal network shows an improvement over the Foster network as it reflects

the physical setup of the semiconductor – thermal resistances and capacitances split layer by layer.

However creating an accurate Cauer model can be problematic as it is very difficult to map thermal

spreading between the layers [146].

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10

Ab

solu

te T

her

mal

Imp

edan

ce (

C/W

)

Pulse width, t (seconds)

123

Figure 111 - Cauer thermal model

From the Foster thermal network, it is possible to calculate a Cauer network equivalent. As this has

not been seen in any literature before, a new method of calculating the Cauer parameters has to be

devised. First the input impedance expression is found for the 4 pole Foster network [148]:

𝑍𝑖𝑛(𝑡) = 𝑅1

1+𝑠×𝑅1×𝐶1+

𝑅2

1+𝑠×𝑅2×𝐶2+

𝑅3

1+𝑠×𝑅3×𝐶3+

𝑅4

1+𝑠×𝑅4×𝐶4 (48)

From which a transfer function can be found. The Cauer method for synthesis of passive electrical

networks can be applied to this transfer function to obtain equations for the individual circuit element

values of the Cauer network. The equations for each individual element of the Cauer thermal model

are shown below in (49-56)

RC1 = RC2+RC3+RC4

Q1×CC1×CC2×CC3×CC4×RC2×RC3×RC4−1 (49)

(Where: Q1 = RF1+RF2+RF3+RF4

CF1×CF2×CF3×CF4×RF1×RF2×RF3×RF4)

CC1 = CF1×CF2×CF3×CF4

CF2×CF3×CF4+CF1×(CF3×CF4+CF2×(CF3+CF4)) (50)

RC2 = RC3+RC4

Q2×CC2×CC3×CC4×RC3×RC4−1 (Where: Q2 =

RF2+RF3+RF4

CF2×CF3×CF4×RF2×RF3×RF4) (51)

CC2 = CF2×CF3×CF4

CF3×CF4+CF2×(CF3×CF4) (52)

RC3 = RC4

CC3×(RF3+RF4CF3×RF3

) (53)

CC3 = CF3×CF4

CF3+CF4 (54)

RC4 = RF4 and CC4 = CF4 (55, 56)

These equations were added into the excel model to give the calculated values for the Cauer thermal

network as seen in Figure 112:

Figure 112 - Calculated Cauer model

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Once the model was complete, it was then simulated in SIMetrix under the same conditions as the

Foster model. Both the circuit and result can be seen in Figure 113, and from the response. It can

be seen that the Cauer model is accurate to both the Foster model and the device datasheet by

matching both curves, and therefore proving the method of first converting the datasheet thermal

resistance characteristic to a Foster thermal model, then converting the Foster model to the Cauer

thermal model.

Figure 113 - Foster thermal model (left) and response (right) in SIMetrix

As a final analysis of this method, the datasheet, the estimated, the Foster response and the Cauer

response curves are plotted together showing mostly small but negligible differences in Figure 114.

The only major difference is in the low frequency range, however the devices used in the converter

will never operate in this low frequency range so this should not be problematic for the charger.

Therefore, as extracting data to be used in a Cauer thermal model is new, this method has never

been seen before. As seen from Figure 114, the thermal response curves are very close meaning

that the thermal model can be improved through this method. The next step is to apply this thermal

model to the SIMetrix simulation of the converter.

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Figure 114 - Datasheet (blue), calculated (red), Foster response (green) and Cauer response (purple) curves for thermal impedance

4.6.9 Applying the Cauer model to the simulation model

Now that the Cauer model is complete, this can be applied to the SIMetrix converter simulation. The

reason for doing this is that the circuit is too complex to simulate with MOSFET devices that have

electro-thermal calculations as part of the model (Level 3 or ”_L3” file suffix), so instead, models of

MOSFETs are used that give transient and switching losses over a temperature range (Level 1 or

“_L1” suffix) [149]. For the ROHM device chosen, there are currently no Spice models that can be

imported into the SIMetrix interface, so a similar MOSFET was found (IXYS IXFN60N100), although

this model would give 49W average losses per device. As this is slightly higher than required, the

resulting output current for the thermal network will have to be scaled down.

Extracting the voltage across and current through the device and converting it into a current can be

done in a few ways. First the simulation was run and the waveform of the power in the device was

extracted into ASCII data which can then be loaded in to Excel. In Excel each data point was

multiplied by 0.74 to give an average of 38W over the waveform. Next the data was copied into a

notepad file from where it was imported into a programmable current source in SIMetrix. All of this

was done quickly; however as the copied waveform data had a large number of data points (over

200,000) this meant that the simulation time had become unreasonably long due to the time it took

to load the notepad file into the simulation.

Therefore an alternative method was sought and the idea of extracting the waveform data during the

simulation was considered. This is possible using an arbitrary source block (ARB1) which can sample

voltages and currents and apply some programmable maths to produce a voltage output. The voltage

output was applied to a voltage controlled current source. A single switch setup is shown in Figure

0

0.05

0.1

0.15

0.2

0.25

0.3

0.35

0.4

0.45

0.5

0.000001 0.00001 0.0001 0.001 0.01 0.1 1 10

Ab

solu

te T

her

mal

Imp

edan

ce (

C/W

)

Pulse width, t (seconds)

126

115 with the Cauer network added and assuming worst case conditions (Ambient at 60°C). The

Cauer capacitances have a starting temperature of 75°C to help shorten the time of the simulation.

Figure 115 - Single switch thermal setup

In Figure 117 the simulation results are shown in detail. It can be seen that the junction temperature

Tj rises and falls with the dissipated power in the device PD however it cannot follow the positive

spike in power and to a lesser extent, sudden power reductions. Overall the junction temperature

oscillates around 0.1°C per cycle. Figure 116 shows the overall rise in temperature from turn on and

the settling point to be almost 110°C as calculated earlier. The shape of temperature and power

dissipation waveforms is not representative of the waveforms seen by the ROHM device as the

simulation device (IXFN60N100) has different parameters from the selected ROHM device.

4.6.10 Conclusion

Overall this simulation gives a reasonable result with which to simulate the thermal behaviour of the

switching devices. Furthermore, the tests validate the calculations done for calculating the junction

temperature when using water cooling. Also a method of devising a new, more accurate thermal

model has been described and simulated. The new thermal model was imported into the SIMetrix

simulation model and gave sensible temperature values for each layer between the junction and

ambient. The junction temperature has a 100Hz ripple due to the rectified 50Hz power input.

Figure 116 - Overall temperature rise

127

Figure 117: Junction temperature (top), Power dissipated (middle) Switching waveforms (bottom)

4.7 AC input filter design

In order to meet the harmonic and power quality standards required the input voltage and current

waveforms were analysed in SIMetrix, and the harmonic content and power factor were calculated.

Following this an input filter was designed.

4.7.1 Power Quality Standards

In order for the charger to interface with the grid, power quality standards must be adhered to,

specifically standards on Total Harmonic Distortion (THD) and power factor. A table of permissible

harmonic voltages and distortion is shown in Table 15; in this case the MV part will be used [150].

128

LV MV HV

Odd harmonics non-multiple of 3

5 6 5 2

7 5 4 2

11 3.5 3 1.5

13 3 2.5 1.5

17 ≤ h ≤ 49 2.27

17

ℎ− 0.27 1.9

17

ℎ− 0.2 1.2

17

ℎ

Odd harmonics multiple of 3

3 5 4 2

9 1.5 1.2 1

15 0.4 0.3 0.3

21 0.3 0.2 0.2

21 ≤ h ≤ 45 0.2 0.2 0.2

Even harmonics

2 2 1.8 1.4

4 1 1 0.8

6 0.5 0.5 0.4

8 0.5 0.5 0.4

10 ≤ h ≤ 50 0.25

10

ℎ+ 0.25 0.25

10

ℎ+ 0.22 0.19

10

ℎ+ 0.16

THDU 8 6.5 3

Table 15 - Maximum admissible harmonic voltages and distortion (%). [150]

The standard does not give minimum power factor levels but simply states that the power factor must

be as high as possible. Therefore here, the requirements of the project will be followed (power factor

>0.9). This IEC standard is valid for both UK and US markets.

4.7.2 AC input filter design

Using SIMetrix, the 3 phase charger was simulated over a 40m sec period using a simplified model.

The AC voltage and current waveforms are shown in Figure 118 and the simplified simulation test

circuit is given in Figure 119.

129

Figure 118 - AC input voltage (above) and current (below) waveforms

Figure 119 - LC filter simulation test circuit

The simulation circuit replicates the conditions in a 3 phase, circuit simulation. Three of these circuits

can be added together to simulate a full charger. The simplified model is used because the SIMetrix

simulation package cannot simulate the full 3 phase circuit. The simplified model assumes a perfect

converter, with ideal triangular pulsed current and an ideal AC waveform with no distortion of the

resulting current waveform due to harmonic voltages present in the supply.

130

An analysis of the unfiltered AC current, gives a power factor of 0.999, which is unrealistic. The

current frequency spectrum is shown in Figure 120. The spectrum for voltage is not required as the

waveform is a perfect sinusoid at 50Hz.

Figure 120 - Frequency spectrum for unfiltered AC current

From the harmonic spectrum it can be seen that there are spikes at 80 kHz, 160 kHz, 240 kHz etc.,

and there are significant sidebands. To conform to standards the harmonics must be minimised using

an input filter.

The simplest filter to use is an LC filter and its values can be found by setting the cut-off frequency,

fc, according to the formula:

𝐶𝑢𝑡 − 𝑜𝑓𝑓 𝑓𝑟𝑒𝑞𝑢𝑒𝑛𝑐𝑦 = 𝑓𝑐 =1

2𝜋√𝐿𝐶 (57)

Where L and C are the filter components. If the cut-off frequency is set to 2 kHz, frequencies above

this will be attenuated. A simple three-phase filter design was implemented in SIMetrix and the

resulting waveforms are in Figure 121, and the current frequency spectrum is in Figure 122. The

values used were 2mH and 3uF - Fc = 2.054 kHz. The inductance was split to aid in common mode

current rejection, see Figure 119. The capacitor should be a class X, short circuit proof capacitor to

give the filter a long working lifetime.

From the waveforms in Figure 121 the resulting power factor is 0.998% which is well within limits. A

harmonic oscillation at about 1 kHz is clearly visible on the current waveform, and is also visible on

the frequency spectrum however this is not highlighted in the frequency spectrum. A higher value

131

filter inductor could be used however, the finished design (outlined in the next chapter) is approaching

a significant size, weight and cost. Alternatively the capacitance can be increased however this has

less effect on the filtering.

Figure 121 - Filtered AC input voltage (above) and current (below) waveforms

4.7.3 Conclusions

From the simulations of the input filter, a filter has been designed to meet current power quality

standards. The values chosen for L and C are realistic. The next section describes how the filter

components were designed, constructed and tested. Figure 122 shows the frequency spectrum of

the simulated AC current in Figure 121, showing that all the harmonics have been eliminated leaving

the fundamental and the aforementioned 1 kHz ripple. However the signal does not meet harmonic

standards as the THD is measured as 11%, due to the high magnitude 1 kHz component. This is not

an accurate representation of the 3 phase current supply in the lab and therefore will not be used for

comparison.

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Figure 122 - Frequency spectrum for filtered AC current (insert – spectra magnitudes below 4kHz)

4.8 Control system

In order to drive the battery charger, a control system is required to provide signals to the gate drive

as well as send and receive information from the various safety systems required. For testing, the

control system is required to drive 12 transistors at 40 kHz and with various phase shifts. The simplest

way to do this is by ‘brute force’ – creating the switching signal on the output of the controller by

calculating the relevant delays and driving the output high or low. As this is the minimum requirement

of the controller, a simple controller can be chosen.

The switching order was determined so as to give maximum power transfer with zero deadtime.

Therefore the two converters per phase were switched 180° apart, and between phases the switching

was shifted to coincide with the 120° voltage shift between phases. This has the advantage of giving

a lower rms output current due to 60° shift between half phase converters, reducing current ripple.

The required switching waveforms are detailed in Figure 123 and further configurations are detailed

in Figure 124 and Figure 125 in order to account for the change in firing sequence as the duty ratio

changes. In order to test the charger in the lab, no feedback control is required as each voltage and

current is closely monitored and changed as necessary. However feedback would be required in the

final application.

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Figure 123 - 3 phase switching waveforms (D=10%)

Firing sequence for D<16.6%: 1 high, 1 low, 6 high, 6 low, 3 high, 3 low, 2 high, 2 low, 5 high, 5

low, 4 high, 4 low.


16.6% > D > 33.3%: 1 high, 4 low, 5 high, 1 low, 3 high, 5 low, 2 high, 3 low, 6 high, 2 low, 4 high,

6 low.

134


D > 33.3%: 1 high, 5 low, 6 high, 4 low, 3 high, 1 low, 2 high, 6 low, 5 high, 3 low, 4 high, 2 low.

Following this, an Arduino MEGA was chosen as the controller as it is very basic and simple to

program, and the required code was written in C. During testing the fidelity of the controller was found

to be poor as any switching signal implemented could deviate up to +/- 5kHz, because the minimum

delay in an Arduino is 1us. A further way of creating a delay is to create a ‘for’ loop without an

instruction, then simply call to the loop and cycle the loop until the required delay is achieved.

However, using this method is very inconsistent as the frequency and duty ratio both change from

cycle to cycle, therefore an improved controller is called for.

A Texas Instruments launchpad was considered as these controllers utilise improved processors and

are capable of shorter delays. In order to maximise the capabilities of the control, the Launch-XL

Delfino F28377S was chosen and the code implemented.

4.8.1 Conclusions

As the main focus of this PhD project is the implementation of power electronics, the controller is as

simple as possible, however; an advanced controller is required in order to simply drive the switches

and for any additional safety systems required for testing purposes.

In practice, the CAN bus on the vehicle would take control of the charger and further work would

need to be done in order to incorporate the charger to the CAN bus.

135

4.9 Additional circuits

In addition to the main power electronics in the charger, several additional circuits are needed.

4.9.1 Gate drive circuit

The gate drive circuit used to switch the 2 IGBTs in the flyback converter was constructed from a

high speed MOSFET driver and a discrete current amplifier. The MOSFET driver chosen was a

Fairchild FOD3180 because it has high speed, high operating temperature range and high dV/dt

immunity. High dv/dt immunity is important as the device will then reject high changes in voltage due

to transistor switching or mains borne transients [151]. The device is readily available and is at a

reasonable price (£2-£3). A toroidal ferrite transformer was used to provide galvanic isolation for the

FOD3180 power supplies. The basic gate drive circuit is displayed in Figure 126. Note that the upper

and lower transistor gate drive circuits are powered by the same toroidal ferrite transformer.

The IGBTs need a higher gate current than these drivers can provide so a discrete current amplifier

circuit was added to the outputs of the driver IC to boost the peak gate drive output current to 5A.

Each of these gate drivers needs an isolated 15V supply which is also immune from high dv/dt

transients.

Figure 126 - Gate drive circuit

4.9.2 Short circuit protection system

When a charging cycle has fully passed to the battery, it is necessary to determine when the output

diode (D in Figure 49) turns off. This can be detected by an opto-isolator placed across the diode so,

that when the diode turns off, the battery voltage passes through the opto-isolator, activating its LED

and signals that the diode has ceased conducting. [152] If the opto-isolator LED fails then the IGBT

will not be turned on for the next cycle. Thus a fail-safe condition is implemented. The circuit is shown

in Figure 127. If the output of the converter is short circuited then the diode will take a long time to

turn off and the converter will go into an energy limiting mode to prevent damage to itself. In open

circuit, the converter will store energy in the output capacitor (C in Figure 49) and the voltage will

rise. This rise will be detected and then the converter will be switched off.

136

Figure 127 - Output protection design

4.9.3 Soft start circuit

The soft switching circuit, as seen in Figure 128, is required to prevent surge currents into the

capacitor when the diode bridge is connected across two phases. This is done by firing a thyristor

when the mains voltage is zero. As the circuit appears resistive, this ensures there is no surge current

drawn from the supply. If there is a fault on the circuit, the firing pulses can be removed and the unit

disconnected from the supply when the current next falls to zero.

Figure 128 - Soft start circuit

4.9.4 Output circuit

In order to test the charger, a stable 420Vdc was required capable of absorbing the full output power

of the charger, without a significant rise in voltage occurring.

4.9.4.1 Resistive load

A resistive load is possible however as the output of the charger can reach up to 9kW. The load must

be able to dissipate this much power. It was concluded that a resistive load is not suitable.

4.9.4.2 DC machine

Another way to emulate a battery load is to use a DC machine. Initially a 200Vdc, 13kW Ward-

Leonard set was used for, low voltage testing. In order to increase the voltage, a buck converter

circuit was designed where the voltage and by extension, the current is controlled. The controller

137

monitors the voltage in the output stage, and when it rises above 320V, the switch is triggered and

energy dissipated in the machine until the voltage falls below specified limit, starting the process

again. Figure 129 gives the circuit diagram.

Figure 129 - Complete output circuit

The operation of each section of the circuit is as follows:

Main buck circuit

The main buck output circuit is as described before; the output voltage is sensed and converted into

a control signal using the analogue control circuit. A signal from the analogue control circuit controls

an IGBT switch which enables power to be sent to the machine.

Control circuit

The control circuit consists of a comparator which samples the voltage in the buck converter and

compares it to a reference voltage set by the user (using a 5V reference supply and a potentiometer).

When the voltage rises above the set limit the comparator produces an output voltage and, through

the use of a transistor pull-up resistor, the opto-isolator driver is activated, supplying the IGBT with

current.

138

15V supply

A 15V supply is needed to drive the comparators as well as act as a supply for transistor pull-up

circuits. This is done through the use of a 600V MOSFET device and a 17V Zener diode tying the

collector of the device to 15V.

Floating 15V supply with soft start

A floating supply is required to supply the isolated end of the opto-isolator driver. This is achieved by

a comparator circuit and 2 transistors to supply a 7V rail to a 1:1+1 transformer which provides

isolation and steps up the voltage to 15V which is then rectified. The soft start circuit delays the turn

on of the 15V floating supply by approximately a second, to any and start up transient from

accidentally triggering the IGBT.

Initially the circuit was used in testing however it was later exchanged in favor of a more stable,

400Vdc, 10kW machine.

4.10 Design Conclusions

Concluding this section, the overall design of a 3 phase charger that meets the specifications outlined

in chapter 1 has been completed. Various areas of study have been undertaken and the major

components that make up the topology of the charger have also been investigated in detail.

Initial calculations and simulations offer a promising groundwork for results to be compared to once

the fabrication of the charger is complete and testing is ready to commence.

A transformer was researched and designed. Transformer leakage calculations were established

and compared with practical test results. Also interleaving of primary and secondary windings was

researched and determined. The amount of primary and secondary turns were also determined for

the optimal interleaving of the transformer. The final transformer was then validated in a magnetics

simulation using the real world core material parameters, winding copper area, airgap and decided

interleaving ratio.

Research on semiconductor devices was conducted and methods of calculating and comparing

device losses was determined. While some devices were determined to be the best performance,

cost helped established a final working device for the prototype. Thermal calculations were

conducted for the chosen flyback topology and suitable cooling equipment was determined. An

advanced cooling simulation was also established based on the Cauer topology.

Research on the capacitor technology required for this project. It was found that film capacitors were

superior in terms of lifetime with respect to temperature. Aluminum electrolytic capacitors should not

be used. An AC input filter was developed to meet power quality standards using realistic values and

validated in simulation. A controller and additional small circuitry were also determined for use in the

practical tests. The next chapter section details the build process of the prototype charger.

139

5. Fabrication of components and test rig

This chapter details the design and construction of circuit boards, charger packaging and the test rig.

5.1 Design of power stage PCB

Once the design was finalized, the power board can be prototyped using Altium designer. The

components were carefully selected to meet various voltage and current limits. The component list

is in Table 16 below.

Device Amount Price Notes

MURATA 1468362C 12 £1.88 68uH inductor. 6.2A

PHOENIX CONTACT

PLH 5 6 £5.18 4 contact terminal block, 1kV and 41A

Epcos B32653A104J 18 £0.77 0.1uF film pp capacitor, 1kV

Epcos B32652J11031 12 £0.99 0.01uF film pp capacitor, 1.6kV

Fairchild BZX85C15 12 £0.15 15V Zener diode DO-41

Fairchild

HGTG18N120BND 12 £5.87 1200V, 41A MOSFET

STMICRO STTH3012W 24 £3.06 Ultrafast diode, 30A, 1200V

Table 16: Component list

To start in Altium designer, the maximum dimensions of the board need to be determined; this was

done by allocating space on each side of the heatsink to 6 individual power boards, next as access

to the fixing points of the diodes and MOSFETs are needed therefore the board is shortened to

accommodate this.

Once this was decided, the components were created in Altium from their datasheet specifications

and positioned on the PCB design. As the power board has high currents present in the tracks, the

tracks had to be sized to cope as well as ensuring enough clearance was left between tracks to

prevent creepage. Calculating the track width is as follows [153]:

First, the Area is calculated:

𝐴𝑟𝑒𝑎[𝑚𝑖𝑙𝑠^2] = 𝐼

(𝑘×(𝑅𝑖𝑠𝑒𝑏))

1𝑐

Then, the Width is calculated:

𝑊𝑖𝑑𝑡ℎ[𝑚𝑖𝑙𝑠] = 𝐴𝑟𝑒𝑎

(𝑇ℎ𝑖𝑐𝑘𝑛𝑒𝑠𝑠[𝑜𝑧]×1.378[𝑚𝑖𝑙𝑠/𝑜𝑧])

(58

)

140

Following the IPC-2221A guidelines on printed circuit board designs; for internal layers: k = 0.024, b

= 0.44, c = 0.725 and for external layers: k = 0.048, b = 0.44, c = 0.725, where k, b, and c are

constants resulting from curve fitting to the IPC-2221 curves. Taking the current at 14Arms, the max

rise as 30°C, the standard thickness is 1.378mil (35um) and considering external layers makes the

track width 231mil (5.87mm) and for the switching input (max 5 Arms) the track width is 55.9mil

(1.42mm).

Now considering clearance, again consulting IPC-2221 and considering external coated conductors,

the suggested minimum distance is 2.33mm between conductors at 1kV [153]. Furthermore, when

routing trying to keep tracks on opposite sides of the board overlapping decreases inductive effects,

making rounded bends rather than sharp 90° corners so current doesn’t concentrate on the inside of

corners and keep high frequency tracks as short as possible.

Applying these rules to Altium designer yielded 2 separate boards in Figure 130, the difference

between these boards is the location of the MOSFETS and diodes; in the example on the left the

devices would be concentrated along the sides of the heatsink therefore meaning the heat would be

concentrated there and not being spread effectively across the heatsink. This is remedied to an

extent on the right hand example where the devices are arranged vertically along the heatsink, in

between each of the cooling pipes. Careful arrangement of each of the PCBs means the heat can

be more evenly distributed over the heatsink and therefore this design is favoured and shown in

Figure 148.

Figure 130: Power boards with devices arranged along the length (left) and along the width (right)

141

Figure 131: 3D Layout of power boards on heatsink, 3 underneath not shown

However, this does not leave much room in between each device to include a sufficiently big copper

pad for the insulation layer therefore a trade-off must be met in the next stage of the PCB design

after initial testing of the prototype.

5.2 Design of gate drive PCB

The gate drive PCB was designed, like the power stage, in Altium. Here in order to reduce the

possibility of noise pickup on the gate signal, it was decided to put the circuit as close as possible to

the power stage. Of course this would also introduce noise to the system due to the high power of

the converters therefore some shielding is required to reduce this.

There are 2 principles of shielding: refection and absorption:

Absorption loss

When an electromagnetic wave passes through a medium, its amplitude decreases exponentially:

[154]

𝐸1 = 𝐸0𝑒−𝑡/𝛿 and 𝐻1 = 𝐻0𝑒−𝑡/𝛿 (59)

Where E1 (H1) is the wave intensity at distance t within the media.

The distance required for the wave to be attenuated to 1/e or 37%, is known as its skin depth, δ:

𝛿 = √2

𝜔𝜇𝜎 (60)

Where ω is the frequency of the noise rejected, μ is the relative conductivity, and σ is the relative

permeability, of the shielding material. In this case steel would be used therefore, using (57) and

142

(58), absorption loss is calculated for a range of shielding thickness over a frequency range. The

results of this are in Figure 132 and as would be expected, there is little absorption of low frequency

however for high frequency, the thicker the shielding, the more absorption loss there is.

Figure 132 - Absorption loss in various shielding thicknesses

Here there is a trade-off of noise reduction against weight, as steel heavy, sheets of up to 4mm has

the most effective trade off as increasing the thickness further has little effect on the reduction of

noise.

Following this, the PCB was designed to fit inside shielding that is the same size as the power board,

meaning that the power stages can be mounted directly above with shielding in between. The PCB

is in Figure 133 and additional shielding was added in the form of “hatching” by etching a ground

connected copper mesh on the PCB, noise can be reduced.

Figure 133 - Gate drive PCB in Altium

0.000

20.000

40.000

60.000

80.000

100.000

120.000

140.000

160.000

180.000

200.000

1.00E+03 1.00E+04 1.00E+05 1.00E+06 1.00E+07 1.00E+08

Ab

sorp

tio

n lo

ss (

dB

)

Frequency (Hz)

1mm

2mm

3mm

4mm

5mm

6mm

7mm

8mm

9mm

10mm

143

Figure 134 shows the overall construction of the primary power stage of the charger.

Figure 134 - 3D layout of Gate drive circuits

5.3 Transformer construction

Following the transformer design in chapter section 4.3, the transformer was constructed. The cores

were cut down as required and then hand wound on the bobbins, sheets of insulating paper were

placed between each set of windings and then held with tape. Following the construction, each core

was tested and the air gap adjusted to gain a consistent primary inductance and then a mounting

clamp was designed to compress the core together as well as elevate it above the shielding to avoid

interference with the magnetic field.

In order to mount the cores, a side panel was made out of steel and fixed to the side of the heatsink;

here holes were placed in the centre to pass cables through from the primary side. Common mode

chokes were used either side of the transformer in order to assist in reducing noise [155]. A small

output circuit of a diode and its snubber was also designed and built, here the steel shielding also

acts as a heatsink. A 3D representation of the mounted transformers is in Figure 135.

144

Figure 135 - Transformer mounting

5.4 Input filter construction

Using the same equations in the design of the transformer, the input filter was constructed. After

several different designs, a laminated steel C core from Bridgeport magnetics was chosen

(CD12.5x25x60 in M4-011 Grain Oriented Silicon Steel GOSS) with magnetic details for GOSS being

supplied through Wiltan [156]. The core was wound with 2 mm copper enamelled wire.

It was decided to wind the core like a common mode choke in order to help reject noise in the input

to the charger where one leg is the positive half of the filter and the other leg is the negative half.

This was then mounted and clamped in the same way as the transformers before however on another

steel side panel mounted on the other side of the heatsink.

The X-class input capacitors were mounted on a PCB and placed on the same panel with connection

points for a 3 phase input, shown in Figure 136.

145

Figure 136 - Input filter and small circuit mounting

5.5 Cooling Rig design

For the testing phase of the project a suitable test rig must be constructed to support and house the

water cooling apparatus. With the radiator and the fan selected earlier in the project, a structure was

designed and constructed to channel the air from the large fan into the smaller effective area of the

radiator through the use of a funnel. Technical drawings with measurements are shown in Figure

137 which was submitted to the workshop for construction.

Figure 137 - Rig technical views with radiator (left most) and fan (right most)

Further plans were submitted for construction of a shelf to support both the pump and a

water reservoir (the reservoir must be supported above the highest point of the rest of the

system) however, through careful positioning of the parts, this additional infrastructure can

be avoided. The final rig can be seen in Figure 46.

146

5.6 Final test rig images

Figure 138 - Transformer construction

Figure 139 - Transformer side

147

Figure 140 - Input filter side

Figure 141 - Power stage with gate drive

148

Figure 142 - Power stage without gate drive

Figure 143 - Cooling system

149

Figure 144 - 3D image of constructed charger

Figure 145 - 3D image of constructed charger

150

6. Results

In this chapter results are given for the SIMetrix simulations and for the experimental tests

undertaken. As mentioned in chapter 5 there were concerns about the transistor cooling system,

which meant that the practical tests had to be limited to 25% duty ratio. In addition to the high voltage

DC output was limited to 400Vdc in practice, due to the test system used. To provide a comparison

between real and simulated tests, the simulated results given here are for a duty ratio of 25% and a

maximum output voltage of 400Vdc.

6.1 Simulation results

To provide a basis for comparison, simulation results are given for the four extremes of operation; a)

minimum input voltage and minimum output voltage, b) minimum input voltage and maximum output

voltage, c) maximum input voltage and minimum output voltage, and d) maximum input voltage and

maximum output voltage. The maximum input voltage is 480Vrms and the minimum input voltage is

340Vrms, whereas the maximum output voltage is 400Vdc and the minimum output voltage is

320Vdc. In the simulated current waveforms, 1 amp is represented by 1 kV. Due to limitations of the

SIMetrix software, only one converter (1/2 phase) was simulated.

6.1.1 340 Vac to 320 Vdc Simulation

The first operation mode is at the minimum input and output voltages. In this case, the peak voltage

applied to the flyback converter is 340* √2 = 480.8V (ignoring bridge rectifier voltage drops).

6.1.1.1 Simulated AC results

A simulation was undertaken to determine the quality of the input current. The input voltage and the

input current are shown in Figure 146.

151

Figure 146 - 340 Vac to 320 Vdc, simulated AC input results

The voltage supply is assumed to have no source impedance, however in practice the supply voltage

may be distorted due to the presence of other loads on the supply, and in turn may affect the power

factor or harmonic current content may be worsened. The power factor of the waveforms is 0.973

leading and 3rd and 5th harmonic currents are visible in the current waveform. From the simulation,

the output power of the 3 phase charger was found to be 2.55kW at an efficiency of 85.4%, and a

duty ratio of 0.25.

An FFT was performed on the current waveform which gave the harmonic spectra in Figure 147.

Switching harmonics can be seen at 40kHz, 80kHz, 120kHz, 160kHz, etc. These harmonics have

been reduced by the input filter. However low frequency harmonic currents can be seen (Figure 147

insert) which are below the input filter cutoff frequency (2.1kHz). The THD of the AC current signal

is 7.41% (calculations performed by MATLAB) of which the 3rd harmonic (150Hz) is a significant

portion at 14.6% of the magnitude of the fundamental, and this harmonic causes the majority of the

distortion in the signal. Thus the charger may require some 3rd harmonic filtering in order to reduce

the total THD and bring it within the limits of the standards set out in Table 15, although a 3 phase

delta configuration will reduce the 3-phase supply harmonic currents. The high frequency switching

harmonics are filtered out to be less than 0.5% of the fundamental.

152

Figure 147 - 340 Vac to 320 Vdc current harmonic spectra (low frequency upper right)

Following this simulation, the switching waveforms were analyzed to see if they met the requirements

set out in the introduction to this thesis.

6.1.1.2 Simulated Switching results

The switching results from the same simulation are shown in Figure 148, at a duty ratio of 0.25 and

at the peak of the AC input voltage waveform.

153

Figure 148 - 340 Vac to 320 Vdc simulated switching results

The results are within the specified bounds of the project. The peak primary side current, I1, is below

the maximum (31A) and the switch voltage, Vsw, is also below the maximum (960V). The peak

primary side current, I1, is 18A, the secondary side current, I2, is 20A and the peak switch voltage,

Vsw, is 670V. These results are as expected since the duty cycle was reduced and the circuit was

operating at only 17% load. If the circuit were to run at 100% load, it should produce around 8.3kW

at 90% efficiency.


The second mode of operation is at minimum input voltage and maximum output voltage.


First the AC results were taken and the SIMetrix results are shown in Figure 149. From Figure 149

the power factor is: 0.945 leading and from the distortion of the current waveform, 5th harmonic

content is visible. From the simulation, the output power of the 3 phase charger is given as 1.73kW

at an efficiency of 88.8%.

154


An FFT is performed on the current waveform in order to give the harmonic spectra in Figure 150.

Figure 150 shows the harmonic content of the AC current waveform shown in Figure 149. The

switching harmonics at 40kHz, 80kHz, 120kHz, 160kHz, etc are shown. These harmonics are filtered

out of the waveform by the input filter. The THD of the AC current signal is 8.81%. Here the 3rd

harmonic (150Hz) is significantly reduced, meaning the distortion in the signal is down to the 5th, 7th

and 9th harmonics. The THD is slightly higher than the previous operational mode and is still not

within limits of the standards set out in Table 15, meaning further filtering is needed in both the low

input voltage configurations.

155

Figure 150 - 340 Vac to 400 Vdc, simulated AC current harmonic spectra

5.1.2.2 Simulated Switching results

The switching results from the simulation are shown in Figure 151. The results are within the specified

bounds of the project, peak primary side current, I1 is below the maximum (31A) and the peak switch

voltage, Vsw is also below the maximum (960V). The peak primary side current, I1, is 16A, the peak

secondary side current, I2, is 16A and the peak switch voltage, Vsw, is 700V. This is expected as

the duty cycle is vastly reduced meaning that the circuit is operating at only 13% load. If the circuit

were to run at 100% load, the circuit would operate at 7.98kW at 92% efficiency.

156

Figure 151 - 340 Vac to 400 Vdc, simulated switching results


The third operation mode is at high input voltage at low output voltage. In this case the peak voltage

applied to the flyback converter is 480*√2 = 678.8 V (ignoring bridge rectifier voltage drops).


A SIMetrix simulation was undertaken and the results are shown in Figure 152. From Figure 152 the

power factor is: 0.933 leading and from the distortion of the current waveform, 5th harmonic content

is visible. From the simulation, the output power of the 3 phase charger is given as 5kW at an

efficiency of 88.8% at a duty ratio of 0.25.

157


An FFT is performed in order to give the harmonic spectra in Figure 153. Figure 153 shows the

harmonic content of the AC current waveform shown in Figure 152. Seen, is switching harmonics at

40kHz, 80kHz, 120kHz, 160kHz, etc, which is filtered out of the waveform by the input filter. The THD

of the AC current signal is 7.28%. Here the 3rd harmonic (150Hz) is moderate, meaning the distortion

in the signal is down to the 3rd, 5th, 7th and 9th harmonics. The THD is in line with the previous

operational modes and is still not within limits of the standards set out in Table 15, meaning further

filtering is needed in both the low output voltage configurations.

158

Figure 153 - 480 Vac to 320 Vdc, AC current harmonic spectra

6.1.3.2 Switching results

The switching results were taken from the same simulation and are shown in Figure 154. The results

are within the specified bounds of the project, peak primary side current, I1 is below the maximum

(31A) and the peak switch voltage, Vsw is also below the maximum (960V). The peak primary side

current, I1, is 24A, the peak secondary side current, I2, is 30A and the peak switch voltage, Vsw, is

810V. This is expected as the duty cycle is vastly reduced meaning that the circuit is operating at

45% load. If the circuit were to run at 100% load, the circuit would operate at 8.34kW at 90%

efficiency.

159

Figure 154 - 480 Vac to 320 Vdc, simulated switching results


The final main configuration is at maximum input voltage and output voltage.


First the simulation results were taken and the SIMetrix results are shown in Figure 155. From Figure

155 the power factor is: 0.94 leading and from the distortion of the current waveform, 5th harmonic

content is visible. From the simulation, the output power of the 3 phase charger is given as 4.7kW at

an efficiency of 78.5%.

160

Figure 155 - 480 to 400 AC input results

An FFT is performed in order to give the harmonic spectra in Figure 155. Figure 155 shows the

harmonic content of the AC current waveform shown in Figure 149. Seen, is switching harmonics at

40kHz, 80kHz, 120kHz, 160kHz, etc, which is filtered out of the waveform by the input filter. The THD

of the AC current signal is 7.28%. Here the 3rd harmonic (150Hz) is high, meaning the distortion in

the signal is down to the 3rd, 5th, 7th and 9th harmonics, however, the 3rd harmonic would be reduced

when the converter is connected in a delta configuration. The THD is in line with the previous

operational modes and is still not within limits of the standards set out in Table 15, meaning further

filtering is needed in both the low output voltage configurations.

161

Figure 156 - 480 Vac to 400 Vdc, simulated AC current harmonic spectra

6.1.4.2 Simulated switching results

Next the switching results were taken from the same simulation and are shown in Figure 161. The

results are within the specified bounds of the project, primary side current, I1 peak is well below the

maximum (31A) and the switch voltage, Vsw is also well below the maximum (960V). The primary

side current, I1, is 26A, the secondary side current, I2, is 30A and the switch voltage, Vsw, is 880V.

This is expected as the duty cycle is vastly reduced meaning that the circuit is operating at 35% load.

If the circuit were to run at 100% load, the circuit would operate at 7.98kW at 92% efficiency.

162

Figure 157 - 480 Vac to 400 Vdc, simulated AC Switching results

6.2 Experimental test results

Practical testing was conducted over the 4 extremes of operation. Due to concerns over temperature,

the duty ratio was limited to 25%, as in the simulation results in chapter section 6.1. The tests were

run several times in order to capture all the data required. Data was filtered both in the oscilloscope

(20 MHz) and again in Matlab to remove high frequency components to better compare the practical

results with the simulation results.

6.2.1 340 Vac to 320 Vdc prototype test

The first test was for minimum 3-phase voltage input to the circuit with the lowest DC voltage output.

6.2.1.1 Experimental AC results

The three line voltages and the current taken by each charger were monitored and the results are

shown in Figure 158.

163

Figure 158 - 340 Vac to 320 Vdc, AC practical test results

Figure 159 - Experimental AC current spectra for 340 Vac to 320 Vdc

164

As can be seen from Figure 158 there is no discernable phase shift between currents and voltages

in all 3 phases. However 3rd and 5th harmonic distortion can be seen in both the voltage and current

waveforms. The voltage distortion is in part due to the poor quality supply in the lab.

Figure 159 shows the current harmonic spectra for the waveforms in Figure 158 up to a frequency

of 3kHz. Only the spectra for only one phase is shown, as the spectra for all three phases are similar.

The THD is calculated as 4% which is very close to the limit set out in Table 15 and is just outside

acceptable limits. The THD could be improved by modifying the filter. The output power of the

configuration was 2.93kW and the efficiency was 81.3% which are close to the values simulated

(2.55kW at 85.4%).

6.2.1.2 Experimental switching results

Switching results are shown in Figure 160. Here each phase is colored individually and the results

are with respect to the first half phase circuit on phase 1 of the charger.

Figure 160 - 340 Vac to 320 Vdc, practical switching test results

The results in Figure 160 show that all 6 converter switching signals are interleaved. The results are:

40 kHz clock (top), the primary side current, I1 (second down), the secondary side current, I2 (third

down) and the IGBT switch voltage, Vsw (bottom). All the currents and voltages are below the

maximum design values, which is expected as the duty ratio is much lower than would be used in a

final version. The results are very close to the simulated results shown in Figure 148. The primary

current is a little less than the simulated result (15A test result, 18A simulated). The secondary current

165

reflects this drop (18A test result, 20A simulated). The switch voltage waveforms are close to the

simulated waveform. However there appears to be an imbalance between 2 circuits in a phase.


In the next test, the low AC input voltage to high DC output voltage configuration was tested, see

Figure 161. The output was limited to 400Vdc as opposed to 420V (as per the simulations) since the

output of the DC machine load was limited to 400Vdc.


Figure 161 - 340 Vac to 400 Vdc, AC experimental test results

From the results shown in Figure 161, it is apparent that there is less stress on the converter, as

there is a reduced input current. The voltage and current distortions are similar to those in the

previous test shown in Figure 158.

Figure 162 shows the AC current harmonic spectra for the current waveforms in Figure 161.

Frequencies above 3 kHz are not shown. The THD was calculated as 5% which is just outside the

limit set out in Table 15. As before the THD could be improved through use of a better filter. The

output power of the configuration was 2.03kW at an efficiency of 88.4%. The values are close to the

values simulated (1.713kW at 88%).

166

Figure 162 - Experimental AC current spectra, 340 Vac to 400 Vdc

6.2.2.2 Experimental Switching results

Figure 163 - 340 Vac to 400 Vac practical switching test results

167

The practical switching waveform results are shown in Figure 160, for all converters. All the voltages

are currents are below the design values, which is expected as the duty ratio is much lower than

would be used in the final application. The results are close to the simulated results shown in Figure

151. The primary currents are a little less than the simulated result (15A tested, 18A simulated). The

secondary currents reflect this drop (14A tested, 16A simulated). The switching voltage waveforms

are close to the simulated waveform, however again, there appears to be an imbalance between 2

circuits in a phase.


Following the low input voltage tests, the charger input voltage was increased in stages until its

maximum and the output set to the minimum value.


Figure 164 - 480 Vac to 320 Vdc, practical AC test results

Figure 164 shows the experimental voltage and current waveforms and Figure 165 shows the AC

current harmonic spectra for the current waveforms up to a frequency of 3kHz. The spectra for one

phase is shown as the spectra for all phases are similar. The THD was calculated as 7% which is

not far from the limit set out in Table 15. The THD can be improved with a better filter. The output

power of the configuration was 5.95kW, and its efficiency was 72.3%. These values are close to the

values simulated (5kW at 88.8%).

168

Figure 165 - Experimental AC current harmonic spectra, 480 Vac to 320 Vdc


169

Figure 166 - 480 Vac to 320 Vdc experimental switching test results 40 kHz clock (top), primary

current, I1 (second from top), secondary current, I2 (third from top) and IGBT switch voltage, Vsw

(bottom).

During the final test, an IGBT was replaced since the switch voltage measurements showed it had

an excessive voltage across at turn off. The charge in IGBT beneficially reduced the voltage

differences between phases. The change highlights the importance of using identical components in

the converter, and the need for further research into voltage sharing under all conditions. The

experimental results shown in Figure 166 show all 6 converters interleaved. As before, all currents

and voltages are below the design values, which is expected as the duty ratio is much lower than

would be used in the final application. The experimental results resemble the simulated results in

Figure 154. The experimental primary current is lower than the simulated result (20A test result, 25A

simulated), and the secondary current reflects this drop (26A test result, 30A simulated). The switch

voltage waveform is similar in all the currents. The peak IGBT voltages range from approximately

700V to 800V.


The final test was for the maximum input voltage (480 Vac) to the maximum output voltage (400 Vdc)


Figure 167 - 480 Vac to 400 Vdc, practical AC test results

170

Figure 167 shows the charger voltage and current waveforms. Figure 168 shows the AC

experimental current harmonic spectra for the current signals in Figure 167, up to a frequency of

3kHz. As before, since the spectra for all 3 phase currents are very similar, so only the spectra for

one phase is shown. The THD was calculated as 7% which is close to the limit set out in Table 15.

A better filter would be improve the THD. The output power of the configuration was 6.2kW at an

efficiency of 79.9%, which is near to the values simulated (4.7kW at 78.5%).

Figure 168 - Experimental AC current spectra, 480 Vac to 400 Vdc

171


Figure 169 - 480 Vac to 400 Vdc, practical switching test results

From Figure 169 is is apparent that a single half phase circuit is dominating the output current. Tests

showed this was due to a low inductance on the primary side of the transformer, allowing the primary

side current to reach a higher peak current Thus a higher peak output current is seen. The effect is

more noticeable at the high output power end of the chargers operation range. The results Figure

169 are very close to the simulated results in Figure 157. The peak primary current tested is less

than the simulated result (21A tested, 26A simulated), and the peak secondary current reflects this

drop (26A tested, 30A simulated). The switching voltage waveform is similar in the majority of the

circuits.

172

6.3 Output power and Efficiency

Table 17 shows an output power and efficiency comparison over the ranger of operational between

simulation and experimental test results.

Vin Vout

Simulation Test

Output power

Efficiency THD Output power

Efficiency THD

480Vac

340Vdc 2.55kW 85.4% 7% 2.93kW 81.3% 4%

420Vdc/400Vdc 1.713kW 88.1% 8% 2.03kW 88.4% 5%

680Vac

340Vdc 5kW 88.8% 7% 5.95kW 72.3% 7%

420Vdc/400Vdc 4.7kW 78.5% 7% 6.2kW 79.9% 7%

Table 17 - Power and efficiency comparison between simulation and experiment

From these results, the output power results show good consistency between simulated and

experimental test results. Efficiency overall is low. The experimental efficiencies are noticeably lower

than the simulated efficiencies when Vout is 320 Vdc. Also the experimental power output is higher

than the simulated power output in all cases.

6.4 Conclusions

From the tests, it can be seen that the test waveforms are very similar to the simulation results with

small errors between half phases. The small errors are believed to be due to discrepancies between

transformers. The transformers were all constructed in the laboratory and hence there is a degree of

variation in their parameters.

There were further variations in the IGBT devices. In the first two tests, one of the half phases had a

significantly higher peak Vsw than the other half phases, due to a mismatch in IGBTs. The 2 IGBTs

had very different conduction resistance and turn off times and therefore, voltage sharing was not

equal, producing a higher Vsw for one IGBT.

Further differences can be seen in the AC waveforms. There is an obvious 3th harmonic on the AC

voltage and current. This is due to the voltage supply in the lab being distorted. Also the AC current

waveform is less oscillatory than in the SIMetrix results. The lack of oscillations in the experimental

current waveform is thought to be due to high frequency damping in the variable transformer. Power

quality in all cases is not ideal, and the current waveforms are distorted so that the circuit will not

meet the standards. However, this is because the line-line voltages are measured in both the

simulation and practical tests, which is not an accurate representation of what the supply current is.

In a 3 phase, delta connection, the 3rd harmonic would be eliminated, therefore improving the THD.

In general the shape of the experimental current and voltage waveforms match those of the

simulations quite well.

173

A thermal analysis of the test circuit showed differences between simulated and calculated

temperature values. Investigations showed the differences to be due to the cooling system and also

due to an inability to accurately measure the case temperature of the devices. It was found that a

thermal probe is unable to obtain accurate temperature measurements to form a direct comparison

between simulation and experiment. The water pump chosen was lossy and had a high case

temperature (~50°C) which in turn heated the water. Furthermore, ambient conditions in the lab (30-

35°C) contributed to the cooling system overheating and by extension, the charger. Additionally, poor

circuit layout on the primary side liquid cooled heatsink and IGBTs, raising their junction

temperatures.

174

7. Conclusions

In this PhD project, the aim was to design, construct and test a 3-phase charger unit while adhering

to specifications given by Smith Electric at the start of the work. The objectives were set out at the

start of this thesis:

To research existing charging technology and justify chosen circuit and snubber technology:

Background research into the market was conducted including specifications and standards. A

literature review on charger topologies and another review was also conducted on snubber circuits.

From these reviews, a novel flyback topology with a regenerative 2 switch snubber was devised and

several key areas identified for investigation.

To develop a simulation of the chosen system in SIMetrix: A detailed simulation of the 3 phase

charger was devised, tested and validated.

To identify and conduct research on every major component in the chosen topology: Theoretical

switching losses were calculated and the best choice IGBT devices were identified. In addition to this

an excel spreadsheet tool was developed to assist with changes in design or with future designs. A

low leakage transformer was designed using leakage inductance calculations to determine the

effectiveness of interleaving the windings of the transformer. These calculations were verified

through simulation and then again through construction and testing of wound cores. An additional

excel transformer design tool was also developed, in order to quickly redesign transformer

parameters during development. A 3 phase, delta connected input filter was designed using

conventional techniques and the inductor portion of the filter was designed using several different

methods taking weight, size and cost into consideration.

To conduct research on capacitor technology with regards to lifetime and reliability: An investigation

into capacitor technology was conducted through using manufacturer specific calculations where

possible, and then a failure in time (FIT) examination was conducted for the selected capacitor

technologies. Film capacitors were chosen for the charger due to their having a lower cost than

ceramic capacitors, having a longer lifetime than Aluminum Electrolytic capacitors, and having the

lowest FIT rate of the three.

To develop a basic control for the constructed system: A microcontroller was chosen and

programmed, and a gate drive circuit designed in order to test the converter. Several small circuits

were also developed to improve performance of the converter as well as tackle several key safety

points.

To construct and test the system in the lab space: Testing was conducted and the electrical results

closely follow what was simulated. Thermal results were affected by issues discussed in chapter 5.

To research and develop a relevant cooling solution for the chosen topology: An advanced liquid

cooling system was designed and implemented for testing along with packaging for the converter.

175

Following the specifications set out at the start of the project, the prototype charger already meets

several specifications based around the functionality of the charger, such as: input/output voltage,

input frequency and temperature. Power factor, THD and battery current ripple are within limits

however could be improved. Output power is low however this is because the prototype tests were

conducted in a low power mode. Efficiency is also low because the prototype charger is operating in

a lower power mode. Weight is higher than desirable, however this can be reduced easily through

use of lighter weight materials.

Parameter Specified Value Prototype Value

Three phase Input voltage 340 to 480 Vac 340 to 480 Vac

Frequency 50/60 Hz 50/60 Hz

Power Factor >0.9 >0.933 leading

Ambient air temperature -20 to +50 0C -20 to +50 0C

Output power >7 kW Up to 6.8 kW

Mass <15 kg 17.4 kg

Output Voltage 320 to 420 Vdc 320 to 400 Vdc

Efficiency As high as practicable 72% - 88%

Input THD <8% [16] <8%

Battery current ripple <5A per 100Ah capacity [20] 5A

Table 18 - Charger initial specifications and prototype specifications

Comparing the designed charger prototype against existing chargers on the market at the time of

inception, the predominant on-board EV charger at the time was the unit installed on the 2012 Toyota

Prius. The unit was a 2.9kW unit, which is much lower than the 7-9kW proposed here. However the

Prius is a HEV therefore a much smaller battery pack is required (4.4kWh), and subsequently, a

much smaller level of charging power is required. The most common EV at that time was the 2012

Nissan leaf, which was equipped with a 6.6kW on board charger, and is much closer to the power

levels proposed here. Detailed specifications for the Prius and Nissan chargers are not known as the

EV market is very competitive and details on power factor, efficiency, THD, and input and output

voltages are unobtainable. The only way to determine the values would be to purchase and evaluate

these chargers through testing.

At this time there were very few stand-alone chargers available. Two chargers were available from

Delphi and Brusa, at 3.3kW. Both units could be paralleled to increase power output, but technical

details were vague.

7.1 Future improvements

Several further improvements can be made to the charger:

1. Voltage sharing – Voltage sharing is not guaranteed for all IGBTs, since it relies on symmetrical

snubber components. Therefore a way to determine or control voltage sharing needs to be

found.

176

2. Transformer improvements – An improved core material can be used to increase the maximum

flux density and reduce the size and weight of the core. Also an automated winding method

could be used to achieve consistency between cores in order to balance the charger phase

currents more effectively.

3. Filter inductor improvements – An improved toroidal core could be used to save weight and

space.

4. Change in power stage layout – Moving the snubber resistors to another board with forced

convection would reduce the transistor and overall system temperatures.

5. Change of controller – A change from the selected controlled to a system that resembles a CAN

bus would be desirable, to enable compatibility with other vehicle systems.

6. Improved sensors – Improved method of detecting transistor case or junction temperature would

be required.

7. Improvements to size and weight – Overall charger packaging can be vastly reduced as current

design is spaced out for convenience.

8. Cooling – Pump losses need to be added into the design. Temperature of cooling fluid could

also be monitored and power output reduced if temperature exceeds limits.

9. Further control - Duty ratio could be controlled so that maximum power is delivered without the

charger going into continuous current mode, CCM.

177

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