ec ii manual

SEC ECE ELECTRONIC CIRCUITS II & SIMULATION LAB

Page | 1

EX.NO: DATE:

FEED BACK AMPLIFIERS

AIM:

To design and test the current series and voltage shunt Feedback Amplifier and to

calculate the Bandwidth and cutoff frequencies with and without feedback

APPARATUS REQUIRED:

S.NO COMPONENTS NAME RANGE QTY

1 TRANSISTOR BC 107 1

2 RESISTOR 43K, 8.2K, 3.3K,

1.5K, 680 Each 1

3 RESISTOR 820,2.2 K Each 2

4 CAPACITOR 1F, 2.2F Each 2

5 CAPACITOR 10F 1

6 CRO (0-30 )MHz 1

7 RPS (0-30) V 1

8 FUNCTION GENERATOR (0 1 )MHZ 1

9 BREADBOARD & WIRES - -

THEORY:

The noise level in amplifier can be reduced by using negative feedback. Feedback

is actually a process of injecting a fraction of output energy of an amplifier again to the

input. When the feedback signal is out of phase with the input signal and opposes it called

Negative feedback. It reduces the gain of the amplifier, but it has the advantages of

reduced distortion, increased stability in gain and increased bandwidth.

In a current series feedback a voltage is developed which is proportional to the

output current when RE is bypassed with CE, the output is Vo and gain without feedback is

AV.RE provides DC bias stabilization but no AC feedback. When CE is removed an AC

voltage will be developed across RE due to emitter current. This voltage will serve to

reduce the input voltage between base and emitter, so the output voltage will drop to Vo.

For a series current feedback amplifier, the input and output resistance increases.

In voltage shunt feedback amplifier, input is current while the output is voltage. It

has low input and output resistances, low phase distortion, low phase distortion, low noise

and high bandwidth.


Page | 2

CURRENT SERIES FEEDBACK AMPLIFIER:

SPECIFICATIONS:

VCC = 12V

f = 5 kHz

IC=1.5mA

S = 10

DESIGN:

VCE = 2

Vcc =

2

12 = 6V

VE =10

Vcc =

10

12 = 1.2V

TO DETERMINE RC & RE:

RE =E

E

I

V =

1.5m

1.2 [IC IE]

RE=800

SELECT RE=820

On applying KVL to output loop,

VCC = ICRC + VCE + VE

12 = 1.5mRC + 6 + 1.2

RC = 1.5m

4.8 = 3.2K

SELECT RC = 3.3K

TO DETERMINE R1 & R2:

RB = R1 || R2

VB = VBE + VE

VB = 0.7 + 1.2

VB = 1.9V

S = 1 + E

B

R

R

10 = 1 + 800

RB

RB = 8000 800

RB = 7200

SELECT RB = 7.2K


Page | 3

WITHOUT FEEDBACK TABULATION:

VI =_____ V

FREQUENCY (HZ) OUTPUT VOLTAGE (V) GAIN = 20log(I

O

V

V) dB


Page | 4

21

21

RR

RR

= 7.2K 1

VB = VCC 21

2

RR

R

12

1.9 =

21

2

RR

R

21

2

RR

R

= 0.1583 2

USE THE EQUATION 1 & 2 AND WE CAN GET

1583.0

7.2K= R1

R1 = 45.48K

SELECT R1 = 43K

21

2

RR

R

= 0.1583

R2 = 8.5541K

SELECT R2 = 8.2K

TO SELECT CE:

XCE 10

RE =

10

800 = 80

By-pass capacitor is given by, XCE = fC 2

1

E

XCE = C*5*2

1

CE 0.397F

SELECT CE = 10F

SELECT CC = 1F

MODEL CALCULATION:


Page | 5

WITH FEEDBACK TABULATION:

VI =_____ V


O

V

V) dB


Page | 6

VOLTAGE SHUNT FEED BACK AMPLIFIER:

WITHOUT FEEDBACK CIRCUIT DIAGRAM:

WITH FEEDBACK CIRCUIT DIAGRAM:


Page | 7

PROCEDURE:

1) The connections are made as shown in the circuit.

2) Set the input voltage to a fixed value as 0.5V/0.6V.

3) Keeping the input voltage vary the input frequency from 0Hz to 1MHz and note

down the corresponding output voltage.

4) Plot the graph: Gain (dB) Vs Frequency.

5) Calculate the bandwidth from the graph.

6) Insert the feedback network and follow the same procedure.


Page | 8

VOLTAGE SHUNT FEED BACK AMPLIFIER:

SPECIFICATIONS:

= 0.0004

VCC = 12V

f = 1 KHz

IC = 2mA

S = 3

DESIGN:

Rf =

1 =

0.0004

1 = 2500

SELECT Rf = 2.2K

VCE = 2

Vcc =

2

12 = 6V

VE =10

Vcc =

10

12 = 1.2V


RE =E

E

I

V =

2m

1.2 [IC IE]

RE=600

SELECT RE=680



12 = 2mRC + 6 + 1.2

RC = 2m

4.8 = 2400

SELECT RC = 2.2K

VB = VBE + VE

VB = 0.7 + 1.2

VB = 1.9V


S = 1 + E

B

R

R

3 = 1 + 600

RB= 1800 600 RB = 1200

SELECT RB = 1.5K


Page | 9

WITHOUT FEEDBACK TABULATION:

VI =_____ V


O

V

V) dB


Page | 10

21

21

RR

RR

= 1.2K 1

VB = VCC 21

2

RR

R

12

1.9 =

21

2

RR

R

21

2

RR

R

= 0.1583 2


1583.0

1.2K= R1

R1 = 8000

SELECT R1 = 8.2K

21

2

RR

R

= 0.1583

R2 = 1.411K

SELECT R2 = 1.5K

TO SELECT CE:

XCE 10

RE =

10

600 = 60


1

E

XCE = C*1*2

1

CE 2.6F

SELECT CE = 2.2F

SELECT CF & CC = 1F

MODEL CALCULATION:


Page | 11

WITH FEEDBACK TABULATION:

VI =_____ V


O

V

V) dB


Page | 12

MODEL GRAPH (WITH & WITHOUT FEEDBACK)

FL Lower cut-off frequency without feedback

FU Upper cut-off frequency without feedback

FLf Lower cut-off frequency with feedback (Voltage shunt / current series)

FUf Upper cut-off frequency with feedback (Voltage shunt / current series)

Bandwidth (without feedback) = FU FL

Bandwidth (with feedback) = FUf FLf


Page | 13

RESULT:

Thus the current series feedback amplifier, voltage shunt feedback amplifier was designed

and also the frequency response was studied with the help of the graph.


Page | 14

CIRCUIT DIAGRAM:

SPECIFICATIONS:

VCC = 16V

f = 1 KHz

S = 10

Q = (8, 2mA)

= 0.1

DESIGN:

VE =10

Vcc =

10

16 = 1.6V


RE =E

E

I

V =

2m

1.6 [IC IE]

RE=800

SELECT RE=820


Page | 15

EX.NO: DATE:

RC PHASE SHIFT OSCILLATOR

AIM:

To design and construct the transistor RC Phase shift oscillator

APPARATUS REQUIRED:



2 RESISTOR 47K,8.2K,3.3K,820 Each 1

1.2K 3

3 CAPACITOR 1F 2

2.2F 1

0.02F 3

4 CRO (0 30) MHz 1

5 RPS (0-30) V 1

6 FUNCTION GENERATOR (0 1)MHz 1


8 MULTIMETER - 1

THEORY:

The circuit illustrates BJT version of RC phase shift oscillator using CE

configuration. The circuit consists of an amplifier circuit, causes a phase shift of 180o

and

3stage positive feedback network (each RC combination introducing shift of 60o) create

phase shift 180o, which satisfies Barkhausen criterion. The Oscillator circuit doesnt have

any external input with it. Additional RC (feedback) stages improve the stability of the

oscillator. With the proper selection of R & C values, the phase of the voltage at the

resistor will be advanced by 60o. The frequency of oscillation of a RC phase shift

oscillator is given by,

f =

6R

4RRC2

1

C

PROCEDURE:

1. The circuit is constructed as per the given circuit diagram.

2. Switch on the power supply and observe the output on the CRO.

3. Note down the practical frequency and compare it with the theoretical frequency.


Page | 16



16 = 2mRC + 6 + 1.2

RC = 2m

9.6-16 = 3.2K

SELECT RC = 3.3K


RB = R1 || R2

VB = VBE + VE

VB = 0.7 + 1.6

VB = 2.3V

S = 1 + E

B

R

R

10 = 1 + 800

RB

RB = 8000 800

RB = 7200

21

21

RR

RR

= 7.2K 1

VB = VCC 21

2

RR

R

16

2.3 =

21

2

RR

R

21

2

RR

R

= 0.1438 2


1438.0

7.2K= R1

R1 = 50.06K

SELECT R1 = 47K

21

2

RR

R

= 0.1438

R2 = 0.1438 - 1

50.06K 0.1438

R2 = 8.407K

SELECT R2 = 8.2K


Page | 17

MODEL GRAPH:

TO SELECT CE:

XCE 10

RE =

10

800 = 80


1

E

XCE = 80*1*2

1

CE 1.99F

SELECT CE = 2.2F

SELECT CC = 1F

f =

6R

4RRC2

1

C

SELECT R = 1.2K

C =

61.2K

3.2K41K1.2K2

1

C = 0.03F

SELECT C = 0.02F

MODEL CALCULATION:

RESULT:

The BJT version of RC phase shift oscillator for the given frequency is designed.

Theoretical fo =

Obtained fo =


Page | 18

CIRCUIT DIAGRAM:

HARTLEY OSCILLATOR:

SPECIFICATIONS:

VCC = 16V

f = 1 kHz

S = 10

IC = 2mA

= 0.1

DESIGN:

VE =10

Vcc =

10

16 = 1.6V


RE =E

E

I

V =

2m

1.6 [IC IE]

RE=800

SELECT RE=820




Page | 19

EX.NO: DATE:

HARTLEY & COLPITTS OSCILLATOR

AIM:

To Design and construct the Hartley & Colpitts oscillators.

APPARATUS REQUIRED:



2 RESISTOR 47K,8.2K,3.3K,820 Each 1

3 CAPACITOR 1F 2

2.2F, 3F,0.05F Each 1

0.1F 2

4 INDUCTOR 2mH, 100mH,50mH Each 1

5 CRO (0 30) MHz 1

6 RPS (0-30) V 1


8 MULTIMETER - 1

THEORY:

COLPITTS OSCILLATOR:

The amplifier stage uses an active device as a transistor in common emitter

configuration, provides a phase shift of 180o. Whereas in feedback network, the centre of

C1 & C2 is grounded, where upper end becomes positive, the lower becomes negative

and vice versa. So the LC feedback network gives an additional phase shift of 180o,

necessary to satisfy oscillation conditions. It can be used for frequencies between 1MHz

to 500MHz

THEORETICAL FREQUENCY FOR HARTLEY OSCILLATOR:

f = CL2

1

eq

= C)L(L2

1

21

THEORETICAL FREQUENCY FOR COLPITT OSCILLATOR:

f = eqLC2

1 =

21

21

CC

CCL2

1


Page | 20

16 = 2mRC + 6 + 1.2

RC = 2m

9.6-16 = 3.2K

SELECT RC = 3.3K


RB = R1 || R2

VB = VBE + VE

VB = 0.7 + 1.6

VB = 2.3V

S = 1 + E

B

R

R

10 = 1 + 800

RB

RB = 8000 800

RB = 7200

21

21

RR

RR

= 7.2K 1

VB = VCC 21

2

RR

R

16

2.3 =

21

2

RR

R

21

2

RR

R

= 0.1438 2


1438.0

7.2K= R1

R1 = 50.06K

SELECT R1 = 47K

21

2

RR

R

= 0.1438

R2 = 0.1438 - 1

50.06K 0.1438

R2 = 8.407K

SELECT R2 = 8.2K


Page | 21

TO SELECT CE:

XCE 10

RE =

10

800 = 80


1

E

XCE = 80*1*2

1

CE 1.99F

SELECT CE = 2.2F

SELECT CC = 1F

f = CL2

1

eq

= C)L(L2

1

21

SELECT C = 0.1F

Choose L1= 2mH

f = 0.1)L(2m2

1

2

L2 = 100mH

SELECT L2 = 100mH

MODEL GRAPH:

MODEL CALCULATION:


Page | 22

COLPITTS OSCILLATOR:

SPECIFICATIONS:

VCC = 16V

f = 3.2 kHz

S = 10

IC = 2mA

= 0.1

DESIGN:

VE =10

Vcc =

10

16 = 1.6V


RE =E

E

I

V =

2m

1.6 [IC IE]

RE=800

SELECT RE=820


Page | 23



16 = 2mRC + 6 + 1.2

RC = 2m

9.6-16 = 3.2K

SELECT RC = 3.3K


RB = R1 || R2

VB = VBE + VE

VB = 0.7 + 1.6

VB = 2.3V

S = 1 + E

B

R

R

10 = 1 + 800

RB

RB = 8000 800

RB = 7200

21

21

RR

RR

= 7.2K 1

VB = VCC 21

2

RR

R

16

2.3 =

21

2

RR

R

21

2

RR

R

= 0.1438 2


1438.0

7.2K= R1

R1 = 50.06K

SELECT R1 = 47K

21

2

RR

R

= 0.1438

R2 = 0.1438 - 1

50.06K 0.1438

R2 = 8.407K

SELECT R2 = 8.2K


Page | 24

TO SELECT CE:

XCE 10

RE =

10

800 = 80


1

E

XCE = 80*1*2

1

CE 1.99F

SELECT CE = 2.2F

SELECT CC = 1F

f = eqLC2

1 =

21

21

CC

CCL2

1

SELECT L = 50mH

Choose C1= 3 F

f =

2

2

C3

C350m2

1

C2 = 0.05F

SELECT C2 = 0.05F

MODEL CALCULATION:


Page | 25

PROCEDURE:

1) The circuit connection is made as per the circuit diagram.

2) Switch on the power supply and observe the output on the CRO (sine wave).

3) Note down the practical frequency and compare it with the theoretical frequency.

RESULT:

Thus the LC oscillator is designed for the given frequency and the output response

is verified.


Page | 26

CIRCUIT DIAGRAM:

MODEL CALCULATION:

fr = LC2

1

SELECT C = 0.1F

SELECT L = 70mH

fr = 0.170m2

1

fr = 1902.26 Hz (Theoretical)

fpr = _______________________ (Practical)

MODEL GRAPH:


Page | 27

EX.NO: DATE:

CLASS C TUNED AMPLIFIER

AIM:

To study the operation of class c tuned amplifier.

APPARATUS REQUIRED:

THEORY:

The amplifier is said to be class c amplifier if the Q Point and the input signal are

selected such that the output signal is obtained for less than a half cycle, for a full input

cycle Due to such a selection of the Q point, transistor remains active for less than a half

cycle .Hence only that much Part is reproduced at the output for remaining cycle of the

input cycle the transistor remains cut off and no signal is produced at the output .the total

angle during which current flows is less than 180..This angle is called the conduction

angle (Qc).

PROCEDURE:

1. The connections are given as per the circuit diagram.

2. Connect the CRO in the output and trace the waveform.

3. Calculate the practical frequency and compare with the theoretical Frequency

4. Plot the waveform obtained and calculates the bandwidth



2 RESISTOR 10K 1

3 CAPACITORS 0.1f 1

1f 2

4 INDUCTOR 70mH 1

5 CRO (0 30 MHz) 1

6 RPS (0-30) V 1

7 FUNCTION GENERATOR - 1


Page | 28

TABULATION:

VI = ______V


Page | 29

RESULT:

Thus a class c single tuned amplifier was designed and its bandwidth was

calculated.


Page | 30

POSITIVE CLIPPER:

INPUT SIGNAL:

OUTPUT SIGNAL:


Page | 31

EX.NO: DATE:

CLIPPER & CLAMPER CIRCUITS

AIM:

To observe the clipping waveform in different clipping configurations

To study the different clamping circuits

APPARATUS REQUIRED:

THEORY:

CLIPPER:

The circuit, with which the waveform is shaped by removing (or clipping) a

certain portion of the input signal voltage above or below a certain level, is called as

Clipping or simply Clamper. It is also known as voltage (or current) limiters,

amplitude selectors or Slicers. A clipping circuit requires a minimum of one diode (either

in series or parallel) and one resistor. Depending on the orientation of the diode and the

polarity of the reference voltage, the input signal will clip. Power supply is often used to

set the various clipping levels. Different types of clipper circuits,

Positive clipper & Negative clipper

CLAMPER:

The clamping network is one that will clamp an input signal to a different DC

level. The network consists of a capacitor, a diode and a resistance, but it can also have

an independent DC supply to introduce an additional DC shift. The magnitude of R & C

must be chosen such that the time constant, = RC, is large enough to ensure that the

voltage across the capacitor does not discharge significantly during the interval when the

diode is non-conducting. Different types of clamping circuits,

Positive clamper & Negative clamper


1 DIODE 1N4007 1

2 RESISTOR 1K

10 K

1

1 3 CAPACITOR 0.047F 1

4 FUNCTION GENERATOR (0-1) MHz 1

5 CRO - 1


Page | 32

NEGATIVE CLIPPER:

INPUT SIGNAL:

OUTPUT SIGNAL:


Page | 33

PROCEDURE:

1. Connections are given as per the circuit.

2. Set input signal voltage (5V, 1 KHz) using function generator.

3. Observe the output waveform using CRO.

4. Sketch the observed waveform on the graph sheet.


Page | 34

POSITIVE CLAMPER

INPUT SIGNAL:

OUTPUT SIGNAL:


Page | 35

NEGATIVE CLAMPER

INPUT SIGNAL:

OUTPUT SIGNAL:

RESULT:

Thus the waveforms are observed and traced for clipper and clamper circuits.


Page | 36

CIRCUIT DIAGRAM:

DIFFERENTIATOR:

MODEL GRAPH:

INPUT SIGNAL & OUTPUT SIGNAL: (RC > T)

OBSERVATION:

S.NO PARAMETER INPUT SIGNAL OUTPUT SIGNAL

1 FREQUENCY

2 TIME PERIOD

3 AMPLITUDE

4 PEAK TO PEAK VOLTAGE


Page | 37

EX.NO: DATE:

DIFFERENTIATOR AND INTEGRATOR

AIM:

To design differentiator and integrator and plot the waveforms

APPARATUS REQUIRED:

THEORY:

DIFFERENTIATOR:

A differentiator is a simple RC network, whose time constant (T=RC) is very

small (RC


Page | 38

INTEGRATOR:

INPUT SIGNAL & OUTPUT SIGNAL: (RC > T)

OBSERVATION:

S.NO PARAMETER INPUT SIGNAL OUTPUT SIGNAL

1 FREQUENCY

2 TIME PERIOD

3 AMPLITUDE

4 PEAK TO PEAK VOLTAGE


Page | 39

INTEGRATOR:

The RC network having the time constant (RC) is very large (RC


Page | 40

CIRCUIT DIAGRAM:

ASTABLE MULTIVIBRATOR:

MODEL GRAPH:

OBSERVATION:

T1: ON TIME: ________________

OFF TIME: _______________

T2: ON TIME: ________________

OFF TIME: _______________

VOLTAGE: _____________________


Page | 41

EX.NO: DATE:

MULTIVIBRATORS

AIM:

To Design the Astable, Monostable & Bistable multivibrators and plot the

waveforms

APPARATUS REQUIRED:


1 TRANSISTOR BC107 2

2 RESISTOR 1K, 10K, 220, 2.2K, 27K Each 2

8.2 K, 6.8 K Each 1

15K 2

3 CAPACITOR 0.1F, 0.01F, 0.47F

0.1F

Each 2

1 20nF, 0.03F Each 1

4 RPS (0-30) V 1

5 CRO - 1

6 AFO - 1

7 BREADBOARD&WIRES - -

THEORY:


Astable multivibrator has no stable state, but has two quasi stable states. The

circuit oscillates between the states (Q1 ON , Q2 OFF) and (Q2 ON , Q! OFF). The

output at the collector of each transistor is a square wave. Therefore this circuit is applied

as a square wave generator. Refer to the fig each transistor has a bias resistance RB and

each base is capacitor coupled to the collector of other transistor. When Q1 is ON and Q2

is OFF, C1 is charged to (Vcc VBE1) positive on the right side. For Q2 ON and Q! OFF,

C2 is charged to (Vcc VBE2) positive on the left side.

PROCEDURE:

1. The connections are given as per the circuit diagram.

2. Switch on the power supply.

3. Observe the waveform both at bases and collectors of Q1 and Q2.

4. Connect the CRO in the output of Q1 and Q2 and trace the square waveform.


Page | 42

SPECIFICATONS:

Vcc = 5V

Ic = 25 mA

TON = 690S

DESIGN:

TON = 0.69RBC

TOFF=0.69RBC

ASSUME RB=10K

T = 0.69RC

C=

SELECT C = 0.1F

RC =C

CC

I

V

RC =

RC = 200

SELECT RC = 220


Page | 43

MONOSTABLE MULTIVIBRATOR:

A monostable multivibrator has one stable state and a quasi stable state. When it

is triggered by an external agency it switches from the stable state to quasi stable state and

returns back to stable state. The time during which it states in quasi stable state is

determined from the time constant RC. When it is triggered by a continuous pulse it

generates a square wave. Monostable multivibrator can be realized by a pair of

regenerative coupled active devices, resistance devices and op-amps.

PROCEDURE:

1) Connect the circuit as per circuit diagram.

2) Trigger the monostable multivibrator with a pulse.

3) Switch on the regulated power supply and observe the output waveform at the

collector of Q1 and Q2 and plot it.

MODEL GRAPH:

OBSERVATION:

T1: ON TIME: ________________

OFF TIME: _______________

T2: ON TIME: ________________

OFF TIME: _______________

VOLTAGE: _____________________


Page | 44


SPECIFICATIONS:

VCC = 6V

VBB = - 1.5V

IC = 6 mA

VCE (sat) = 0.3V

hfe(Min) = 20

T = 140S

DESIGN:

RC1=RC2=C

CE(sat)CC

I

VV

RC1=RC2=6m

0.36

RC1=RC2 = 950

SELECT RC1 & RC2 = 1K

IB2 = hfe(Min)

(sat)IC

IB2 = 20

6m


Page | 45

IB2 = 0.3mA

RB2 = B2

BE(sat)CC

I

VV

RB2 = 0.3

0.7 - 6

RB2 = 17.66K

SELECT RB2 = 15K

T = 0.69 RC

140 = 0.6917.66KC1

C1 = 0.011F

SELECT C = 0.01F

Assume IB1=IR2

IR1=IB1+IR2

IR1= 0.3m+0.3m

IR1 = 0.6m

Apply KVL

VCC = VBE+IR1 (RC1+RB1)

6 = 0.7+0.6m (950+RB1)

0.6mRB1 = - 0.7 +6 - 0.57

RB1 = 7.88K

SELECT RB1 = 8.2K

R2 = B2

BBBE

I

)V(V

R2 =

R2 = 7.33K

SELECT R2 = 6.8K

RC 1S

RC = 1S

R = 7.88K

C =

C = 126.9pF

SELECT C = 20nF


Page | 46

BISTABLE MULTIVIBRATOR:

MODEL GRAPH:

OBSERVATION:

T1: ON TIME: ________________

OFF TIME: _______________

T2: ON TIME: ________________

OFF TIME: _______________

VOLTAGE: _____________________


Page | 47

BISTABLE MUITIVIBRATOR:

The bistable multivibrator is a switching circuit with a two stable state either Q1 is

on and Q2 is off (or) Q2 is on and Q1 is off. The circuit is completely symmetrical. Load

resistors RC1 and RC2 all equal and potential Divider (R1, R2) and (R1 andR2 ) from

identical bias Network at the transistor bases. Each transistor is biased from the collector

of the other device when either transistor is ON & the other transistor is biased OFF. C1

and C2 operate as speed up capacitors or memory capacitors.

PROCEDURE:

1. Connect the circuit as per circuit diagram.

2. Switch on the regulated power supply and observe the output waveform at the

collector of Q1 and Q2.

3. Sketch the waveform.

4. Apply a threshold voltage and observe the change of states of Q1 and Q2.

5. Sketch the waveform.


Page | 48

SPECIFICATIONS:

Vcc = 5V

VBB = -5V

Ic = 2mA

hFE(Min) = 70

VCE(sat) = 0.2 V

t = 5mS

DESIGN:

RC1 =C

CE(sat)CC

I

VV

RC1 =2m

0.25

RC1 = 2.4K

SELECT RC1 = 2.2K

IB = hfe(Min)

IC

IB = 70

2m

IB = 28.57A

Assume I2 = 10

IC

I2 = 10

2m

I2 =0.2mA

R2 = 2

BEBB

I

VV

R2 =

R2 = 28.5K

SELECT R2 = 27K

RC2 + R1= B 2

BECC

I I

VV


Page | 49

RC2 + R1 = 28.57 0.2m

0.7 - 5

R1 = 18.812K 2.4K

R1 = 16.412K

SELECT R1 = 15K

T =

21

21

RR

RRC

5m =

28.5K16.45K

28.5K16.45K C

C = 4.7910-7

F

SELECT C = 0.47F

RESULT:

Thus the Astable, Monostable & Bistable multivibrators were designed and the

square waveforms are generated.


Page | 50

CIRCUIT DIAGRAM:

CMOS INVERTER:

TRUTH TABLE:

IN OUT

0 1

1 0


Page | 51

EX.NO: DATE:

CMOS INVERTER, NAND AND NOR

AIM:

To implement the CMOS inverter, NAND and NOR gates using MULTISIM 9.

APPARATUS REQUIRED:

1. PERSONAL COMPUTER

2. MULTISIM 9

PROCEDURE:

1. Draw the circuit diagrams as shown in figure.

2. Simulate the circuit diagram.

3. Verify the output by using the truth tables.

CMOS NAND:

TRUTH TABLE:

INPUTS OUTPUT

IN 1 IN 2 OUT

0 0 1

0 1 1

1 0 1

1 1 0


Page | 52

CMOS NOR:

TRUTH TABLE:

INPUTS OUTPUT

IN 1 IN 2 OUT

0 0 1

0 1 0

1 0 0

1 1 0


Page | 53

RESULT:

Thus the CMOS Inverter, NAND, NOR gates were implemented by using

MULTISIM 9 and their outputs were verified with the help of truth table.


Page | 54

CIRCUIT DIAGRAM:

BUTTERWORTH II ORDER LOW PASS FILTER:

TABULATION:

VI = _____V

S.NO FREQUENCY OUTPUT VOLTAGE VO (V) GAIN=20log(I

O

V

V) dB


Page | 55

EX.NO: DATE:

BUTTERWORTH SECOND ORDER ACTIVE LOW

PASS & HIGH PASS FILTERS

AIM:

To implement the Butterworth II order Active Low pass filter & High pass filter

using MULTISIM 9.

APPARATUS REQUIRED:


2. MULTISIM 9

PROCEDURE:





Page | 56

MODEL CALCULATION:

BUTTERWORTH II ORDER HIGH PASS FILTER:

TABULATION:

VI = _____V

S.NO FREQUENCY OUTPUT VOLTAGE VO (V) GAIN=20log(I

O

V

V) dB


Page | 57

MODEL CALCULATION:

RESULT:

Thus the Butterworth II order active Low pass filter and High pass filter were

implemented in MULTISIM 9 and the frequency response curve was plotted.


Page | 58

CIRCUIT DIAGRAM:

MODEL CALCULATION:

V1 =

V2 =

OUTPUT VOLTAGE =

FREQUENCY =


Page | 59

EX.NO: DATE:

DIFFERENTIAL AMPLIFIER

AIM:

To implement the differential amplifier using MULTISIM 9.

APPARATUS REQUIRED:


2. MULTISIM 9

PROCEDURE:




RESULT:

Thus the differential amplifier was implemented in MULTISIM 9 and the

waveforms are plotted in the graph.


Page | 60

CIRCUIT DIAGRAM:




Page | 61

EX.NO: DATE:

MULTIVIBRATORS

AIM:

To implement the Monostable, Astable and Bistable Multivibrators using

MULTISIM 9 and also plot the waveforms

APPARATUS REQUIRED:


2. MULTISIM 9

PROCEDURE:





Page | 62

BISTABLE MULTIVIBRATOR:

MODEL GRAPH:


Page | 63

TABULATION:

S.NO PARAMETER MONOSTABLE ASTABLE BISTABLE

Q1 Q2 Q1 Q2 Q1 Q2

1 Time period [ON time]

2 Time period [OFF time]

3 Voltage

RESULT:

Thus the Monostable, Astable and Bistable Multivibrators were implemented

using MULTISIM 9 and also the waveforms were plotted.


Page | 64

BLOCK DIAGRAM:

A1

1 V/V 0 V

Y

X

INTERNAL CIRCUIT DIAGRAM:

OBSERVATION:

INPUT VOLTAGE 1: __________V

INPUT VOLTAGE 2: __________ V

OUTPUT VOLTAGE: _________ V


Page | 65

EX.NO: DATE:

ANALOG MULTIPLIER

AIM:

To implement an analog multiplier using MULTISIM 9

APPARATUS REQUIRED:


2. MULTISIM 9

PROCEDURE:




RESULT:

Thus the analog multiplier was implemented in MULTISIM 9 and the output was

verified.

ec ii manual

Documents

input voltage

feedback tabulation

ac feedback

feedback signal

negative feedback

feedback apparatus

output current

simulation lab page