dap-final report

DIGITAL AUDIO PROCESSOR USING AT89C51

1. BACKGROUND

This report presents an infrared (IR) remote-controlled digital audio processor.

It is based on a microcontroller and can be used with any NEC-compatible full function IR remote-control. This audio processor has enhanced features and can be easily customized

to meet individual requirements as it is programmable.

Its main features are:

1. Full remote control using any NEC-compatible IR remote control handset.

2. Provision for four stereo input channels and one stereo output.

3. Individual gain control for each input channel to handle different sources.

4. Bass, midrange, treble, mute and attenuation control.

5. 80-step control for volume and 15-step control for bass, midrange and treble

6. Settings displayed on two 7-segment light-emitting diode (LED) displays and eight individual LEDs.

7. Stereo VU level indication on 10-LED bar display.

8. Full-function keys on-board for audio amplifier control.

9. All settings stored on the EEPROM.

10. Standby mode for amplifier power control.

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2. MICROCONTROLLER

2.1 Definition of A Microcontroller:

Microcontroller, as the name suggests, are small controllers. They are like single chip computers that are often embedded into other systems to function as processing/controlling unit. For example, the remote control you are using probably has microcontrollers inside that do decoding and other controlling functions. They are also used in automobiles, washing machines, microwave ovens, toys ... etc, where automation is needed.

The key features of microcontrollers include:

High Integration of Functionality Microcontrollers sometimes are called single-chip computers because they have on-chip

memory and I/O circuitry and other circuitries that enable them to function as small standalone computers without other supporting circuitry.

Field Programmability, Flexibility Microcontrollers often use EEPROM or EPROM as their storage device to allow field

programmability so they are flexible to use. Once the program is tested to be correct then large quantities of microcontrollers can be programmed to be used in embedded systems.

Easy to Use

Assembly language is often used in microcontrollers and since they usually follow RISC architecture, the instruction set is small. The development package of microcontrollers often includes an assembler, a simulator, a programmer to "burn" the chip and a demonstration board. Some packages include a high level language compiler such as a C compiler and more sophisticated libraries.

Most microcontrollers will also combine other devices such as:

A Timer module to allow the microcontroller to perform tasks for certain time periods. A serial I/O port to allow data to flow between the microcontroller and other devices such

as a PC or another microcontroller. An ADC to allow the microcontroller to accept analogue input data for processing.

The heart of the microcontroller is the CPU core. In the past this has traditionally been based on an 8-bit microprocessor unit.

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Figure 2.1: Showing a typical microcontroller device and its different subunits

Fig 2.2 Block Diagram of Microcontroller

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2.2 Pin Description:

VCCSupply voltage.

GNDGround.

Port 0Port 0 is an 8-bit open-drain bi-directional I/O port. As an output port, each pin can sink eight TTL inputs. When 1s are written to port 0 pins, the pins can be used as high impedance inputs.Port 0 may also be configured to be the multiplexed low order address/data bus during accesses to external program and data memory. In this mode P0 has internal pull-ups. Port 0 also receives the code bytes during Flash programming, and outputs the code bytes during program verification. External pull-ups are required during program verification.

Port 1Port 1 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 1 output buffers can sink/source four TTL inputs. When 1s are written to Port 1 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 1 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 1 also receives the low-order address bytes during Flash programming and verification.

Port 2Port 2 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 2 output buffers can sink/source four TTL inputs. When 1s are written to Port 2 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 2 pins that are externally being pulled low will source current (IIL) because of the internal pull-ups. Port 2 emits the high-order address byte during fetches from external program memory and during accesses to external data memory that uses 16-bit addresses (MOVX @ DPTR). In this application, it uses strong internal pull-ups when emitting 1s. During accesses to external data memory that uses 8-bit addresses (MOVX @ RI), Port 2 emits the contents of the P2 Special Function Register. Port 2 also receives the high-order address bits and some control signals during Flash programming and verification.

Port 3Port 3 is an 8-bit bi-directional I/O port with internal pull-ups. The Port 3 output buffers can sink/source four TTL inputs. When 1s are written to Port 3 pins they are pulled high by the internal pull-ups and can be used as inputs. As inputs, Port 3 pins that are externally being pulled low will source current (IIL) because of the pull-ups. Port 3 also receives some control signals for Flash programming and verification. Port 3 also serves the functions of various special features of the AT89C51 as listed below:

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Table 1

Table 1:Port 3 Alternate Functions

RSTReset input. A high on this pin for two machine cycles while the oscillator is running resets the device.

ALE/PROGAddress Latch Enable output pulse for latching the low byte of the address during accesses to external memory. This pin is also the program pulse input (PROG) during Flash programming. In normal operation ALE is emitted at a constant rate of 1/6 the oscillator frequency, and may be used for external timing or clocking purposes.

PSENProgram Store Enable is the read strobe to external program memory. When the AT89C51 is executing code from external program memory, PSEN is activated twice each machine cycle, except that two PSEN activations are skipped during each access to external data memory.

EA/VPP External Access Enable. EA must be strapped to GND in order to enable the device to fetch code from external program memory locations starting at 0000H up to FFFFH. Note, however, that if lock bit 1 is programmed, EA will be internally latched on reset. EA should be strapped to VCC for internal program executions. This pin also receives the 12-volt programming enable voltage (VPP) during Flash programming, for parts that require 12-volt VPP.

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XTAL1Input to the inverting oscillator amplifier and input to the internal clock operating circuit.

XTAL2Output from the inverting oscillator amplifier.

2.3 Microcontrollers versus Microprocessors:

Microcontroller differs from a microprocessor in many ways. First and the most important is its functionality. In order for a microprocessor to be used, other components such as memory, or components for receiving and sending data must be added to it. In short that means that microprocessor is the very heart of the computer. On the other hand, microcontroller is designed to be all of that in one. No other external components are needed for its application because all necessary peripherals are already built into it. Thus, we save the time and space needed to construct devices.

2.4 Memory unit:

Memory is part of the microcontroller whose function is to store data. The easiest way to explain it is to describe it as one big closet with lots of drawers. If we suppose that we marked the drawers in such a way that they can not be confused, any of their contents will then be easily accessible. It is enough to know the designation of the drawer and so its contents will be known to us for sure.

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Figure2.2: Simplified model of a memory unit

Memory components are exactly like that. For a certain input we get the contents of a certain addressed memory location and that's all. Two new concepts are brought to us: addressing and memory location. Memory consists of all memory locations, and addressing is nothing but selecting one of them. This means that we need to select the desired memory location on one hand, and on the other hand we need to wait for the contents of that location. Besides reading from a memory location, memory must also provide for writing onto it. This is done by supplying an additional line called control line. We will designate this line as R/W (read/write). Control line is used in the following way: if r/w=1, reading is done, and if opposite is true then writing is done on the memory location. Memory is the first element, and we need a few operation of our microcontroller.

The amount of memory contained within a microcontroller varies between different microcontrollers. Some may not even have any integrated memory (e.g. Hitachi 6503, now discontinued). However, most modern microcontrollers will have integrated memory. The memory will be divided up into ROM and RAM, with typically more ROM than RAM.

Typically, the amount of ROM type memory will vary between around 512 bytes and 4096 bytes, although some 16 bit microcontrollers such as the Hitachi H8/3048 can have as much as 128 Kbytes of ROM type memory.

ROM type memory, as has already been mentioned, is used to store the program code. ROM memory can be ROM (as in One Time Programmable memory), EPROM, or EEPROM.

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The amount of RAM memory is usually somewhat smaller, typically ranging between 25 bytes to 4 Kbytes.

RAM is used for data storage and stack management tasks. It is also used for register stacks (as in the microchip PIC range of microcontrollers).

2.5 Central Processing Unit:

Let add 3 more memory locations to a specific block that will have a built in capability to multiply, divide, subtract, and move its contents from one memory location onto another. The part we just added in is called "central processing unit" (CPU). Its memory locations are called registers.

Figure2.3: Simplified central processing unit with three registers

Registers are therefore memory locations whose role is to help with performing various mathematical operations or any other operations with data wherever data can be found. Look at the current situation. We have two independent entities (memory and CPU) which are interconnected, and thus any exchange of data is hindered, as well as its functionality. If, for example, we wish to add the contents of two memory locations and return the result again back to memory, we would need a connection between memory and CPU. Simply stated, we must have some "way" through data goes from one block to another.

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2.6 Bus:

That "way" is called "bus". Physically, it represents a group of 8, 16, or more wires.There are two types of buses: address and data bus. The first one consists of as many lines as the amount of memory we wish to address and the other one is as wide as data, in our case 8 bits or the connection line. First one serves to transmit address from CPU memory, and the second to connect all blocks inside the microcontroller.

Figure2.4: Showing connection between memory and central unit using buses

As far as functionality, the situation has improved, but a new problem has also appeared: we have a unit that's capable of working by itself, but which does not have any contact with the outside world, or with us! In order to remove this deficiency, let's add a block which contains several memory locations whose one end is connected to the data bus, and the other has connection with the output lines on the microcontroller which can be seen as pins on the electronic component.

2.7 Input-output unit :

Those locations we've just added are called "ports". There are several types of ports: input, output or bidirectional ports. When working with ports, first of all it is necessary to choose which port we need to work with, and then to send data to, or take it from the port.

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Figure2.5: Simplified input-output unit communicating with external world

When working with it the port acts like a memory location. Something is simply being written into or read from it, and it could be noticed on the pins of the microcontroller.

2.8 Serial communication:

Beside stated above we've added to the already existing unit the possibility of communication with an outside world. However, this way of communicating has its drawbacks. One of the basic drawbacks is the number of lines which need to be used in order to transfer data. What if it is being transferred to a distance of several kilometers? The number of lines times’ number of kilometers doesn't promise the economy of the project. It leaves us having to reduce the number of lines in such a way that we don't lessen its functionality. Suppose we are working with three lines only, and that one line is used for sending data, other for receiving, and the third one is used as a reference line for both the input and the output side. In order for this to work, we need to set the rules of exchange of data. These rules are called protocol. Protocol is therefore defined in advance so there wouldn't be any misunderstanding between the sides that are communicating with each other. For example, if one man is speaking in French, and the other in English, it is highly unlikely that they will quickly and effectively understand each other. Let's suppose we have the following protocol. The logical unit "1" is set up on the transmitting line until transfer begins. Once the transfer starts, we lower the transmission line to logical "0" for a period of time (which we will designate as T), so the receiving side will know that it is receiving data, and so it will activate its mechanism for reception. Let's go back now to the transmission side and start putting logic zeros and ones onto the transmitter line in the order from a bit of the lowest value to a bit of the highest value. Let each bit stay on line for a time period which is equal to T, and in the end, or after the 8th bit, let us bring the logical unit "1" back on the line which will mark the end of the transmission of one data. The protocol we've just described is called in professional literature NRZ (Non-Return to Zero).

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Figure2.6: Serial unit sending data through three lines only

As we have separate lines for receiving and sending, it is possible to receive and send data (info.) at the same time. So called full-duplex mode block which enables this way of communication is called a serial communication block. Unlike the parallel transmission, data moves here bit by bit, or in a series of bits what defines the term serial communication comes from. After the reception of data we need to read it from the receiving location and store it in memory as opposed to sending where the process is reversed. Data goes from memory through the bus to the sending location, and then to the receiving unit according to the protocol.

2.9 Timer unit:

Since we have the serial communication explained, we can receive, send and process data.

Figure2.7: Timer unit generating signals in regular time intervals

However, in order to utilize it in industry we need a few additionally blocks. One of those is the timer block which is significant to us because it can give us information about time, duration, protocol etc. The basic unit of the timer is a free-run counter which is in fact a register whose numeric value increments by one in even intervals, so that by taking its value during periods T1 and T2 and on the basis of their difference we can determine how much time has elapsed. This is a very important part of the microcontroller whose understanding requires most of our time.

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2.10 Watchdog:

One more thing is requiring our attention is a flawless functioning of the microcontroller during its run-time. Suppose that as a result of some interference (which often does occur in industry) our microcontroller stops executing the program, or worse, it starts working incorrectly.

Figure2.8: Watchdog

Of course, when this happens with a computer, we simply reset it and it will keep working. However, there is no reset button we can push on the microcontroller and thus solve our problem. To overcome this obstacle, we need to introduce one more block called watchdog. This block is in fact another free-run counter where our program needs to write a zero in every time it executes correctly. In case that program gets "stuck", zero will not be written in, and counter alone will reset the microcontroller upon achieving its maximum value. This will result in executing the program again, and correctly this time around. That is an important element of every program to be reliable without man's supervision.

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3. INTRODUCTION TO EEPROM

3.1 EEPROM :

EEPROM means Electrical Erasable Programmable Read Only Memory and also referred to as E²PROM chip or i2c. As the name suggest, an EEPROM can be both erased and programmed with electrical pulses from a programmer kit, burner or the equipment itself. Since it can be both electrically written into and electrically erased, the EEPROM IC can be quickly programmed and erased in circuit for reprogramming without taking them out from the main board. EEPROM IC is also called a non-volatile memory because when the power is switched off, the stored data (information) in the EEPROM IC will not be erased or corrupt and the data is still intact. New EEPROM IC have no data (blank) inside and normally have to program it first with a programmer tools before it can be use on electron IC circuit.

Figure3.1: Showing EEPROM of Atmel

If you just installed a new or blank EEPROM IC into a main board, even though with the same part number, I can say that the equipment will surely not going to work because the CPU or microprocessor do not know how to function. Information or data stored in this type of memory can be retained for many years even without a continuous dc power supply to the IC.

3.2 Application/ Operation of EEPROM:

EEPROMs mainly store user programmable information such as: -

VCR programming information or data CD programming information or data Digital satellite receiver control data or information

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User information on various consumer products such as in Television. The EEPROM IC in Computer Monitor performs two tasks: -

When a monitor is turn on it will copies all the data or information from the EEPROM to the microprocessor or CPU. For instance, the EEPROM will let the CPU know the frequencies at which the monitor is going to run.

The EEPROM IC is used to store the current settings of the Monitor. The current settings of the monitor will not be erased even when the monitor is switched off. Anytime when a change is made in the monitor settings, the CPU updates the setting in the EEPROM (store data in EEPROM). When the monitor is switch on again, the stored settings in EEPROM IC are used to set up the monitor for operation.

Assuming the data file in MONITOR or TV’s EEPROM are corrupted damaged and failure detected, what would be the display symptoms like?

There would be no high voltage (no display) because the CPU don’t activate the 12 volt line supply to the horizontal and vertical oscillator IC.

The IC will not save (store) the current setting of the equipment Some control functions like sound, brightness, horizontal size and contrast control will

not work. The On Screen Display (OSD) would not work or the OSD will have a corrupted or

erratic display. Equipment high voltage will shut down (EEPROM set wrongly the horizontal frequency

and will lead to a failure of the horizontal output transistor (HOT)).

Typical EEPROM part numbers are: - 2402, 2404, 240824C02, 24C04, 24C08, 24C1624C325, 24C645AT17C65, AT17C12893C06, 93C46, 93C56, 93C6625010, 25020, 25040

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4. INTRODUCTION TO AUDIO PROCESSOR

4.1 Pin Diagram:

Fig 4.1 pin diagram

4.2 Features:

■ INPUT MULTIPLEXER– 4 STEREO INPUTS– SELECTABLE INPUT GAIN FOR OPTIMALADAPTATION TO DIFFERENT SOURCES■ ONE STEREO OUTPUT■ TREBLE, MIDDLE AND BASS CONTROL IN2.0dB STEPS■ VOLUME CONTROL IN 1.0dB STEPS■ TWO SPEAKER ATTENUATORS:– TWO INDEPENDENT SPEAKER CONTROLIN 1.0dB STEPS FOR BALANCE FACILITY– INDEPENDENT MUTE FUNCTION■ ALL FUNCTION ARE PROGRAMMABLE VIA

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SERIAL BUS

4.3 Application Suggestions:

The first and the last stages are volume control blocks. The control range is 0 to -47dB (mute) for the first one, 0 to -79dB (mute) for the last one.Both of them have 1dB step resolution. The very high resolution allows the implementation of systems free from any noisy acoustical effect. The TDA7439 audio processor provides 3 bands tones control.

4.3.1 Bass, Middle Stages:

The Bass and the middle cells have the same structure. The Bass cell has an internal resistor Ri = 44KΩ typical.The Middle cell has an internal resistor Ri = 25KΩ typical.Several filter types can be implemented, connecting external components to the Bass/Middle IN and OUT pins.

Fig. 4.2 T Type Band pass FilterThe fig. refers to basic T Type Band pass Filter starting from the filter component values (R1 internal and R2,C1,C2 external) the centre frequency Fc, the gain Av at max. boost and the filter Q factor are computed as follows:

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4.3.2. Treble Stage:The treble stage is a high pass filter whose time constant is fixed by an internal resistor (25KΩ typical) and an external capacitor connected between treble pins and ground.

4.4 I 2 C Bus Interface:

Data transmission from microprocessor to the TDA7439 and vice versa takes place through the 2 wires I2C BUS interface, consisting of the two lines SDA and SCL (pull-up resistors to positive supply voltage must be connected).

4.4.1 Data Validity

As shown in fig. 13, the data on the SDA line must be stable during the high period of the clock. The HIGH and LOW state of the data line can only change when the clock signal on the SCL line is LOW.

4.4.2 Start and Stop Conditions

As shown in fig.14 a start condition is a HIGH to LOW transition of the SDA line while SCL is HIGH. The stop condition is a LOW to HIGH transition of the SDA line while SCL is HIGH.

4.4.3 Byte FormatEvery byte transferred on the SDA line must contain 8 bits. Each byte must be followed by an acknowledge bit. The MSB is transferred first.4.4.4 Acknowledge

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The master (μP) puts a resistive HIGH level on the SDA line during the acknowledge clock pulse (see fig. 15). The peripheral (audio processor) that acknowledges has to pull-down (LOW) the SDA line during this clock pulse. The audio processor which has been addressed has to generate an acknowledge after the reception of each byte, otherwise the SDA line remains at the HIGH level during the ninth clock pulse time. In this case the master transmitter can generate the STOP information in order to abort the transfer.

4.4.5 Transmission without AcknowledgeAvoiding to detect the acknowledge of the audio processor, the mP can use a simpler transmission: simply it waits one clock without checking the slave acknowledging, and sends the new data. This approach of course is less protected from misworking.

4.5 Software Specification:

Interface Protocol:The interface protocol comprises:■ A start condition (S)■ A chip address byte, containing the TDA7439 address■ A sub address bytes■ A sequence of data (N byte + acknowledge)■ A stop condition (P)

ACK = AcknowledgeS = StartP = StopA = AddressB = Auto Increment

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5. INTRODUCTION TO I2C BUS

5.1 Basic Definition:

An Inter-IC bus is often used to communicate across circuit-board distances.

At the low end of the spectrum of communication options for "inside the box" communication is I2C ("eye-squared-see"). The name I2C is shorthand for a standard Inter-IC (integrated circuit) bus.

I2C provides good support for communication with various slow, on-board peripheral devices that are accessed intermittently, while being extremely modest in its hardware resource needs. It is a simple, low-bandwidth, short-distance protocol. Most available I2C devices operate at speeds up to 400Kbps, with some venturing up into the low megahertz range. I2C is easy to use to link multiple devices together since it has a built-in addressing scheme.

Philips originally developed I2C for communication between devices inside of a TV set. Examples of simple I2C-compatible devices found in embedded systems include EEPROMs, thermal sensors, and real-time clocks. I2C is also used as a control interface to signal processing devices that have separate, application-specific data interfaces. For instance, it's commonly used in multimedia applications, where typical devices include RF tuners, video decoders and encoders, and audio processors. In all, Philips, National Semiconductor, Xicor, Siemens, and other manufacturers offer hundreds of I2C-compatible devices.

5.2 Inside the Box :

I2C is appropriate for interfacing to devices on a single board, and can be stretched across multiple boards inside a closed system, but not much further. An example is a host CPU on a main embedded board using I2C to communicate with user interface devices located on a separate front panel board. A second example is SDRAM DIMMs, which can feature an I2C EEPROM containing parameters needed to correctly configure a memory controller for that module.

I2C is a two-wire serial bus. There's no need for chip select or arbitration logic, making it cheap and simple to implement in hardware.

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Figure5.1:I2C has two lines in total

The two I2C signals are serial data (SDA) and serial clock (SCL). Together, these signals make it possible to support serial transmission of 8-bit bytes of data-7-bit device addresses plus control bits-over the two-wire serial bus. The device that initiates a transaction on the I2C bus is termed the master. The master normally controls the clock signal. A device being addressed by the master is called a slave.

In a bind, an I2C slave can hold off the master in the middle of a transaction using what's called clock stretching (the slave keeps SCL pulled low until it's ready to continue). Most I2C slave devices don't use this feature, but every master should support it.

The I2C protocol supports multiple masters, but most system designs include only one. There may be one or more slaves on the bus. Both masters and slaves can receive and transmit data bytes.

Each I2C-compatible hardware slave device comes with a predefined device address, the lower bits of which may be configurable at the board level. The master transmits the device address of the intended slave at the beginning of every transaction. Each slave is responsible for monitoring the bus and responding only to its own address. This addressing scheme limits the number of identical slave devices that can exist on an I2C bus without contention, with the limit set by the number of user-configurable address bits (typically two bits, allowing up to four identical devices).

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5.3 Communication:

As you can see in Figure 2, the master begins the communication by issuing the start condition (S). The master continues by sending a unique 7-bit slave device address, with the most significant bit (MSB) first. The eighth bit after the start, read/not-write (), specifies whether the slave is now to receive (0) or to transmit (1). This is followed by an ACK bit issued by the receiver, acknowledging receipt of the previous byte. Then the transmitter (slave or master, as indicated by the bit) transmits a byte of data starting with the MSB. At the end of the byte, the receiver (whether master or slave) issues a new ACK bit. This 9-bit pattern is repeated if more bytes need to be transmitted.

Figure5.2: I2C communication

In a write transaction (slave receiving), when the master is done transmitting all of the data bytes it wants to send, it monitors the last ACK and then issues the stop condition (P). In a read transaction (slave transmitting), the master does not acknowledge the final byte it receives. This tells the slave that its transmission is done. The master then issues the stop condition.

5.4 A Simple Bus :

As we've seen, the I2C signaling protocol provides device addressing, a read/write flag, and a simple acknowledgement mechanism. There are a few more elements to the I2C protocol, such as general call (broadcast) and 10-bit extended addressing. Beyond that, each device defines its own command interface or address-indexing scheme.

Standard I2C devices operate up to 100Kbps, while fast-mode devices operate at up to 400Kbps. A 1998 revision of the I2C specification (v. 2.0) added a high-speed mode running at up to 3.4Mbps. Most of the I2C devices available today support 400Kbps operation. Higher-speed

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operation may allow I2C to keep up with the rising demand for bandwidth in multimedia and other applications.

Most often, the I2C master is the CPU or microcontroller in the system. Some microcontrollers even feature hardware to implement the I2C protocol. You can also build an all-software implementation using a pair of general-purpose I/O pins (single master implementations only).

Since the I2C master controls transaction timing, the bus protocol doesn't impose any real-time constraints on the CPU beyond those of the application. (This is in contrast with other serial buses that are timeslot-based and, therefore, take their service overhead even when no real communication is taking place.)

5.5 The Elegance of I 2 C:

I2C offers good support for communication with on-board devices that are accessed on an occasional basis. I2C's competitive advantage over other low-speed short-distance communication schemes is that its cost and complexity don't scale up with the number of devices on the bus. On the other hand, the complexity of the supporting I2C software components can be significantly higher than that of several competing schemes (SPI and Micro Wire, to name two) in a very simple configuration. With its built-in addressing scheme and straightforward means to transfer strings of bytes, I2C is an elegant, minimalist solution for modest, "inside the box" communication needs.

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6. PROJECT DESCRIPTION

Figure 6.1 shows the Block Diagram of a remote controlled digital audio processor using 89c51 microcontroller. The system comprises Atmel’s AT89C51 microcontroller (IC1), TDA7439 audio processor from SGS Thomson (IC4) and I2C bus compatible MC24C02 EEPROM (IC5). The microcontroller chip is programmed to control all the digital processes of the system.

The audio processor controls all the audio amplifier functions and is compatible with I2C bus. All the commands from the remote control are received through the IR sensor. The audio amplifier can also be controlled using the on-board keys

Figure 6.1: Block diagram of DAP

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6.1 Microcontroller (AT89C51):

6.1(a) Description:

The AT89C51 is a low-power, high-performance CMOS 8-bit microcomputer with 4K bytes of Flash programmable and erasable read only memory (PEROM). The device is manufactured using Atmel’s high-density non-volatile memory technology and is compatible with the industry-standard MCS-51 instruction set and pinout.

The on-chip Flash allows the program memory to be reprogrammed in-system or by a conventional non-volatile memory programmer. By combining a versatile 8-bit CPU with Flash on a monolithic chip, the Atmel AT89C51 is a powerful microcomputer which provides a highly-flexible and cost-effective solution to many embedded control applications.

6.1(b) Features:

• 4K Bytes of In-System Reprogrammable Flash Memory Endurance: 1,000 Write/Erase Cycles• Fully Static Operation: 0 Hz to 24 MHz• Three-level Program Memory Lock• 128 x 8-bit Internal RAM• 32 Programmable I/O Lines• Two 16-bit Timer/Counters• Six Interrupt Sources• Programmable Serial Channel• Low-power Idle and Power-down Modes

6.1(c) Function Of Microcontroller:

The function of the microcontroller is to receive commands (through port P3.2) from the remotehandset, program audio controls as per the commands and update the EEPROM. A delay in updating the EEPROM is de-liberately provided because normally the listener will change the value of a parameter continuously until he is satisfied. The 40-pin AT89C51 microcontroller has four 8-bit input/output (I/O) ports. Port 0 is used for indicating through LEDs the various functions selected via the remote/on-board keys. Port 1 drives the 7-segment display using 7-segment latch/decoder/driver IC CD4543. Port 2 is pulled up via resistor network RNW1 and used for manual key control. Pins P3.0 and P3.1 of the microcontroller are used as serial data (SDA) and serial clock (SCL) lines for the I2C bus for communicating with the audio processor (TDA7439) and EPROM (MC24C02). These two lines are connected to pull-up resistors, which are required for I2C bus devices. P3.2 receives the remote commands through the IR receiver module.

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Pin P3.4 is used for flashing LED9 whenever a remote command is received or any key is pressed. The microcontroller also checks the functioning of the memory (MC24C02) and the audio processor (TDA7439). If it is not communicating with these two ICs on the I2C bus, it flashes the volume level on the 7-segment displays.

6.2 The Audio Processor (TDA7439):

IC TDA7439 is a single-chip I2C-bus compatible audio controller that is used to control all the functions of the audio amplifier. The output from any (up to four) stereo preamplifier is fed to the audio processor (TDA7439). The microcontroller can control volume, treble, bass, attenuation, gain and other functions of each channel separately. All these parameters are programmed by the microcontroller using SCL and SDA lines, which it shares with the memory IC and the audio processor. Data transmission from the microcontroller to the audio processor(IC TDA7439) and the memory (MC24C02) and vice versa takes place through the two-wire I2C-bus interface consisting of SDA and SCL, which are connected to P3.0 (RXD) and P3.1(TXD) of the microcontroller, respectively. Here, the microcontroller unit acts as the master and the audio processor and the memory act as slave devices. Any of these three devices can act as the transmitter or the receiver under the control of the master

6.3 Memory (MC24C02):

IC MC24C02 is an I2C-bus compatible 2k-bit EEPROM organized as 256×8-bit that can retain data for more than ten years. Various parameters can be stored in it. To obviate the loss of latest settings in the case of power failure, the microcontroller stores all the audio settings of the user in the EEPROM. The memory ensures that the microcontroller will read the last saved settings from the EEPROM when power resumes.

Using SCL and SDA lines, the microcontroller can read and write data for all the parameters. For more details on I2C bus and memory interface, please refer to the MC24C02 datasheet. Audio parameters can be set using the remote control handset or the on-board keys as per the details given under the ‘remote control’ section.

6.4 7-segment decoder/driver (CD4543B):

It is a BCD-to-seven segment latch/decoder/driver designed primarily for liquid-crystal display (LCD) application. It can also be used for driving light emitting diode (LED), incandescent, gas-discharge and fluorescent displays. The operating DC supply voltage ranges from -0.5V to +20V

6.5 2-Channel level meter driver: (KA2281):

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It is a monolithic integrated circuit consisting of a two channel LED level meter driver which driver which was designed for use in stereo radio cassette tape recorders and home stereos. Its operating DC supply voltage ranges from 5V to 14V.

6.6 Power Supply:

6.6(a) Block Diagram:

Fig. 6.7: Block diagram of power supply unit

6.6(b) General Description:

.Figure 6.7 shows the power supply diagram for the remote controlled digital audio processor. The AC mains are stepped down by transformer X1 to deliver a secondary output of 9V AC at 1A. The transformer output is rectified by full-wave bridge rectifier BR1 and filtered by capacitor C42.

Regulators IC8 and IC9 provide regulated 5V and 9V power supplies, respectively. IC10 acts as the variable power supply regulator. It is set to provide 3V regulated supply by adjusting preset VR1. Capacitors C39, C40 and C41 bypass any ripple in the regulated outputs. This supply is not used in the circuit.

However, the readers can use the same for powering devices like a Walkman. As capacitors above 10 μF are connected to the outputs of regulator ICs, diodes D3 through D5 provide protection to the regulator ICs, respectively, in case their inputs short to ground.

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Relay RL1 is normally energised to provide mains to the power amplifier. In standby mode, it is de-energised. Switch S2 is the ‘on’/‘off’ switch.

6.6(c) Features:

Output Current up to 1A

Output Voltages of 5, 6, 8, 9, 12, 15, 18, 24

Thermal Overload Protection

Short Circuit Protection

Output Transistor Safe Operating Area Protection

6.7 Remote control (NEC-Compatible format):

6.7(a) Block Diagram:

Figure 6.5 Block Diagram of remote control

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6.7(b) Description:

The micro-controller can accept commands from any IR remote that uses NEC transmission format. These remote controllers are readily available in the market and use μPD6121,PT2221 or a compatible IC. Here, we’ve used Creative’s remote handset. All the functions of the system canbe controlled fully using the remote or the on-board keys. By default, the display shows the volume setting and LEDs indicate the channel selected. LED9 glows momentarily whenever a command from the remote is received or any key is pressed.

Function adjustments are detailed below:

1. Volume: Use Vol+/Vol- key to increase/decrease the volume. The volume settings are shown on the two digits, 7-segment display. Steps can be varied between ‘1’ and ‘80.’

2. Mute and Standby: Using ‘Mute’ and ‘Standby’ buttons, you can toggle the mute and standby status, respectively. If ‘Mute’ is pressed, the display will show ‘00.’ In ‘Standby’ mode, the relay de-energizes to switch off the main amplifier. All the LEDs and displays, except LED9, turn off to indicate the standby status.

3. Input Select: To select the audio input source, press ‘Channel’ key until the desired channel is selected. The LED corresponding to the selected channel turns on and the input gain setting for that channel is displayed for five seconds. Thereafter, the volume level is displayed on the 7-segment display.

4. Input Gain set: Press ‘Gain’ key. The LED corresponding to the channel will start blinking and the gain value is displayed. Use Vol+/Vol- key to increase/decrease the gain for that channel. Note that the gain can be varied from ‘1’ to ‘15.’ If you press ‘Gain’ key once more, and no key is pressed for five seconds, it will exit the gain setting mode and the volume level is displayed.

5. Audio: Press ‘Audio Set’ (Menu) key to adjust bass, middle, treble and attenuation one by one. Each time ‘Audio Set’ key is pressed, the LED corresponding to the selected function turns on and the function value is displayed. Once the required function is selected, use Vol+ and Vol- to adjust the setting. Bass, middle and treble can be varied from ‘07’ to ‘7.’ Values ‘0’through ‘7’ indicate ‘Boost’ and ‘00’ through ‘07’ indicate ‘Cut.’ Attenuation can be varied from ‘0’ to ‘40.’

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6.7 (c) Advantages:

An infrared remote offers several advantages:

1. It is a cost-effective signaling system

2. Unlike radio-frequency-based control devices, it is not subject to any stringent regulation and restriction.

3. It is a line-of-sight system with a range of 5 to 10 meters, hence its radiation stays confined to a single room in which it is used. It thus prevents interference between units operating in different rooms even when using identical device address and command code.

4. A relatively broad modulation frequency range is available using inexpensive ASICs and components.

5. It is generally insensitive to interference from external electrical or magnetic fields.

6. It offers relatively high energy efficiency, which enhances the battery life.

7. Infrared emitters and detectors are inexpensive and readily available

6.7(d) Limitations:

1. Line-of-sight propagation becomes a limitation when you need to control a device from another room.

2. Infrared is subject to mutual interference from multiple sources in the same room as most consumer IR transmissions use a wavelength of either 880 or 940 nm (corresponding to the two commonly available IR-emitting LED types). This limitation can be tackled by using different sub-carrier frequencies to modulate the light signals coupled with different encoding schemes to carry the data content.

3. Although largely immune to electrical or magnetic interference, the infrared signal is somewhat subject to interference from sunlight and other infrared sources as also fluorescent lights.

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7. PROJECT METHODOLOGY

7.1 Components:

7.1.1 Digital Audio processor:

Semiconductors:

IC1 - AT89C51 microcontrollerIC2, IC3 - CD4543 7-segment decoder/ driverIC4 - TDA7439 audio processorIC5 - MC24C02 I2C EEPROMIC6 - KA2281 2-channel level meter driverIC7 - TSOP1238 IR receiver moduleIC8 - 7809 9V regulatorIC9 - 7805 5V regulatorIC10 - LM317 variable regulatorT1 - BC558 pnp transistorT2, T3, T5 - BC547 npn transistorT4 - BD139 pnp transistorBR1 - W04M bridge rectifierD1-D6 - 1N4004 rectifier diodeDIS1, DIS2 - LTS543 7-segment displayDIS3 - 10-LED bargraph displayLED1-LED8 - Red LEDLED9 - Green LED

Resistors (all ¼-watt, ±5% carbon):

R1 - 8.2-kilo-ohmR2-R24,R40-R49 - 1-kilo-ohmR25, R28,R50, R53 - 10-kilo-ohmR26, R29,R30, R34 - 2.7-kilo-ohmR27 - 100-ohmR31, R35 - 5.6-kilo-ohmR32, R33 - 4.7-kilo-ohmR36-R39 - 22-kilo-ohmR51 - 220-kilo-ohmR52 - 2.2-kilo-ohm

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Capacitors:

C1, C2 - 33pF ceramic diskC3, C10 - 10μF, 16V electrolyticC4-C6,C39-C41 - 100nF ceramic diskC7 - 4.7μF, 16V electrolyticC8, C9 - 2.2μF, 16V electrolyticC11, C20 - 5.6nF polyesterC12, C19 - 18nF polyesterC13, C18 - 22nF polyesterC14, C17 - 100nF polyesterC21-C28 - 0.47μF polyesterC29-C32 - 4.7μF, 25V electrolyticC33, C34 - 10μF, 25V electrolyticC35 - 1000μF, 25V electrolyticC36 - 4700μF, 25V electrolyticC37, C38 - 0.33μF ceramic diskC42 - 470μF, 25V electrolytic

Miscellaneous:

X1 - 230V AC primary 0 to 12V, 1A secondary transformerRL1 - 9V, 160Ω, 2 C/O relayXTAL - 12MHz crystalS1- S7 - Push-to-on switchS8 - On/Off switch Remote - Creative’s remote (NEC compatible format)

7.1.2 NEC-Compatible format remote-control:

Semiconductors:

IC1 - CD6121 remote Tx 20-pin SMTT1 - BC548 npn transistorIR LED1 - LD271 or equivalent IR LEDLED1 - Red LED

Resistors (all ¼-watt, ±5% carbon):

R1 - 330-ohmR2 - 1-kilo-ohmR3 - 2.2-ohm, 0.5WR4, R5, R6 - (100-kilo-ohm)

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Capacitors:

C1, C2 - 220pF ceramic diskC3 - 47μF, 10V electrolytic

Miscellaneous:

K2, K3, K6K14, K15,K19, K28 - Tactile switch (10x10mm)XTAL - 455 kHz (2-pin) ceramic resonatorBAT. - 2x1.5V=3V - 2-cell battery holder - PCB, etc

7.2 Softwares used:

1. Kiel uVision3.2. Metalink’s Assembler.

7.3 Equipments used:

1. Soldering iron, solder, flux. 2. Personal computer.3. Stereo Power Amplifier.

7.4 Procedure of building the DIGITAL AUDIO PROCESSOR:

Step 1: Clean off dust and dirt from the PCB with paper towel soaked in acetone

Step 2: Before you install the microcontroller, memory and audio processor in their sockets and solder the IR receiver module, make sure that the supply voltage is correct. All parts, except the audio processor (TDA7439), require 5V DC supply. The audio processor is powered by 9V DC.

Step 3: Connect the audio source (such as CD player, computer etc) at the ‘Audio Input’ say, L-IN1 AND R-IN1 for left and right channel inputs in the circuit.

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Step 4: Connect the Left (L-OUT) and Right(R-OUT) to the channel input(s) of any audio amplifier system.

Step 5: Press S1 and S2 for volume control. The position of these keys will be indicated by the glowing of LEDs in the display module DIS3.

Step 6: Press S3 (SEL) to select the enhancement mode such as Bass, treble etc.

Step 7: Press S4 (SOURCE) to select the source input channels (L-IN1 through R-IN4).You will see the corresponding LED5 through LED8 glow.

Step 8: Press S5 (GAIN) to attenuate or increase the gain.

7.5 Procedure for Software Implementation:

The software was assembled using Metalink’s ASM51 assembler, which is freely available for download. The source code has been extensively commented for easier understanding. It can be divided into the following segments in the order of listing:

1. Variable and constant definitions2. Delay routines3. IR decoding routines4. Keyboard routines5. TDA7439 communication6. MC24C02 communication7. I2C bus routines8. Display routines9. IR and key command processing10. Timer 1 interrupt handler11. Main program

On reset, the microcontroller executes the main program as follows:

1. Initialise the microcontroller’s registers and random-access memory (RAM) locations.2. Read Standby and Mute status from the EEPROM and initialise TDA7439 accordingly.3. Read various audio parameters from the EEPROM and initialise the audio processor.4. Initialise the display and LED port.5. Loop infinitely as follows, waiting for events:• Enable the interrupts.• Check the monitor input for AC power-off. If the power goes off, jump to the power-off sequence routine.

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• Else, if a new key is pressed, call the DO_KEY routine to process the key. For this, check whether the NEW_KEY bit is set. This bit is cleared after the command is processed.• Else, if a new IR command is received, call the DO_COM routine to process the remote command. For this, check whether the NEW_COM (new IR command available) bit is set. This bit is cleared after the command is processed.• Jump to the beginning of the loop.6. Power-off sequence. Save all the settings to the EEPROM, and turn off the display and standby relay. Since the output of the IR sensor is connected to pin 12 (INT0) of themicrocontroller, an external interrupt occurs whenever a code is received. The algorithm for decoding the IR stream is completely implemented in the ‘external interrupt 0’ handler routine.

This routine sets NEW_COM (02H in bit memory) if a new command is available. The decoded command byte is stored in ‘Command’ (location 021H in the internal RAM). The main routine checks for NEW_COM bit continuously in a loop. Timer 0 is exclusively used by this routine to determine the pulse timings.

Decoding the IR stream involves the following steps:

1. Since every code is transmitted twice, reject the first by introducing a delay of 85 milliseconds (ms) and start timer 0. The second transmission is detected by checking for no-overflow timer 0. In all other cases, timer 0 will overflow.

2. For second transmission, check the timer 0 count to determine the length of the leader pulse (9 ms). If the pulse length is between 8.1 ms and 9.7 ms, it will be recognised as valid. Skip the following 4.5ms silence.

3. To detect the incoming bits, timer 0 is configured to use the strobe signal such that the counter runs between the interval periods of bits. The value of the counter is then used to determine whether the incoming bit is ‘0’, ‘1’ or ‘Stop.’ This is implemented in the RECEIVE_BIT routine.

4. If the first bit received is ‘Stop,’ repeat the last command by setting the NEW_COM bit.

5. Else, receive the rest seven bits. Compare the received byte with the custom code (C Code). If these don’t match, return error.

6. Receive the next byte and compare with the custom code. If these don’t match, return error.

7. Receive the next byte and store in ‘Command.’

8. Receive the next byte and check whether it is complement value of ‘Command.’ Else, return error.

9. Receive ‘Stop’ bit.

10. Set NEW_COM and return from interrupt.

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7.6 Assembly Programming Code:

**************************************************************************; PROGRAM FOR REMTOE CONTROLLED AUDIO PROCESSOR;**************************************************************************;**************************************************************************$MOD51 ; include predefined constants;$NOPRINT;**************************************************************************; Variable & Constant Definitions;**************************************************************************STACKBASE EQU 034H ; stack starts at 35HEEPROM_ADDR EQU 0A0H ; address of 24CXX on I2C busAUDIOPROC_ADDR EQU 088H ; address of TDA7439 on I2C busC_CODE1 EQU 084H ; CUSTOM CODE for Creative RemoteC_CODE2 EQU 035H ; CUSTOM CODE' for Creative Remote; keypad /remote command codesVOL_UP EQU 010H ; REMOTE- VOL +VOL_DN EQU 014H ; REMOTE- VOL -SEL EQU 004H ; REMOTE- MENUSOURCE EQU 008H ; REMOTE- MOUSEINGAIN EQU 018H ; REMOTE- ZOOMMUT EQU 00CH ; REMOTE- MUTESTDBY EQU 016H ; REMOTE- CANCELZDATA EQU R1 ;data register for 24C01/02 functionsADDR EQU R2 ; address register for 24C01/02 functionsAUDIODATA EQU R3 ; Audio parameter values for audio processorSUBADDR EQU R4 ; Audio processor function selection byteSDA BIT P3.0 ; i2c serial dataSCL BIT P3.1 ; i2c serial clockIR_IN BIT P3.2 ; IR sensor input line, inverted output from sensorINDICATOR BIT P3.4 ; Status indicator LEDPOWER BIT P3.5 ; STANDBY relay controlDISP_LATCH BIT P3.7 ; Latch control of Display port (CD4543B)MONITOR BIT P2.7 ; Power monitor input; BIT Variables; Max bit variables available is 16, as general user RAM starts from 022HSTOP BIT 00H ; stop bit in IR codeRX_BIT BIT 01H ; next received bit in IR streamNEW_COM BIT 02H ; new IR command availableNEW_KEY BIT 03H ; new key input availableREPEAT BIT 04H ; Repeated Remote command (contineous key press)STANDBY BIT 05H ; Standby statusMUTE BIT 06H ; Mute statusGAIN_ON BIT 07H ; Bit set if gain function selected; BYTE Variables; Max byte variables available is 18, as stack starts at 35HCOMMAND DATA 022H ; Received IR commandKEY DATA 023H ; Keyboard commandCHANNEL DATA 024H ; TDA7439 input channel

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VOLUME DATA 025H ; TDA7439 input attenuationBASS DATA 026H ; TDA7439 bass adjMIDDLE DATA 027H ; TDA7439 voice adjTREBLE DATA 028H ; TDA7439 treble adjR_ATTN DATA 029H ; TDA7439 Right attenuation (volume)L_ATTN DATA 02AH ; TDA7439 Left attenuation (volume)GAIN1 DATA 02BH ; TDA7439 input gain of IN1GAIN2 DATA 02CH ; TDA7439 input gain of IN2GAIN3 DATA 02DH ; TDA7439 input gain of IN3GAIN4 DATA 02EH ; TDA7439 input gain of IN4GAIN DATA 02FH ; TDA7439 input gain of active channelLED_STATUS DATA 030H ; currently loaded value in LED port;LED_STATUS BITS 0-1-2-3-4-5-6-7 = BASS-MIDDLE-TREBLE-ATTN-IN1-IN2-IN3-IN4T1_COUNT DATA 031H ;TIMER1 Counter;**************************************************************************; PROGRAM STARTS HERE; RESET VECTOR

ORG 00H ;locate routine at 00H RESET:

JMP START ;jump to START ;**************************************************************************; INTERRUPTS (place interrupt routines at appropriate memory locations )

ORG 03H ; external interrupt 0, used by IR SensorJMP INTR_EX0ORG 0BH ; timer 0 interruptRETIORG 13H ; External interrupt 1RETIORG 1BH ; timer 1 interruptJMP INTR_T1ORG 23H ; serial port interruptRETIORG 25H ; locate beginning of rest of program

;**************************************************************************; DELAY ROUTINES;**************************************************************************; Delay routine to introduce 6 microSec Delay with 12MHz crystal;**************************************************************************BITDLY: ;2cyl (CALL)

NOP ;1 CylNOP ;1 CylRET ;2 Cyl

;**************************************************************************; Delay routine in miliSecond. (Approximate); Entry: R6 = (Delay in mS -0.004)/0.501 OR R6 = Delay in mS * 2; assuming 12MHz clock, 1 Cyl=1 microSec; delay in inner loop= R7*2 microSec; delay in outer loop= R6*(3+R7*2) microSec; delay in call & ret= 4 microSec; Total delay = R6*(3+R7*2)+4 microSec; R7=249(F9H)=>Min delay=0.507 miliSec, Max delay = 127.759 mS; Destroys R6, R7;*************************************************************************DELAYMS: ;2-Cylx95: MOV R7,#0F9H ;1-Cyl

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DJNZ R7,$ ;2-CylDJNZ R6,x95 ;2-CylRET ;2-Cyl

;*************************************************************************; Delay routine in Seconds. (Approximate); Entry: R5 = Delay in Sec * 10; Destroys R5, R6, R7;*************************************************************************DELAYSEC:x96: MOV R6,#200

ACALL DELAYMSDJNZ R5,x96RET

;*************************************************************************; END OF DELAY ROUTINES

; IR DECODING ROUTINES;**************************************************************************; Receives one bit from IR_IN. The received bit is returned in RX_BIT,; or STOP is set if it is a stop bit. IR_IN should be LOW while calling; this function. Uses TIMER 0 already set in Mode1, TR0=1 & GATE0=1. EA=0; DESTROYS PSW->CARRY AND R0;**************************************************************************RECEIVE_BIT:

MOV TH0,#0F4H ;TIMER0 RELOAD VALUE, MAX COUNT=65535-62464(F400H)=3071 ;BIT WILL BE RECOGNISED AS STOP BIT IF TIMER0 OVERFLOWS;SINCE TL0 IS IGNORED, OVERFLOW WILL BE ANYWHERE BETWEEN 2816 &

3071CLR TF0CLR CCLR STOPCLR RX_BIT ;ASSUME BIT=0JNB IR_IN,$ ;LOOP UNTIL IR_IN GOES HIGH, TIMER0 STARTS AFTER THIS

x60: JB TF0,x62 ;STOP BIT IF TIMER OVERFLOWSJB IR_IN,x60 ;LOOP TILL TIMER0 IS RUNNING

;TIMER0 STOPS HERE, CHECK PULSE LENGTHMOV R0,TH0CJNE R0,#0F8H,x61 ;BIT =0 IF COUNT LESS THAN 1024

x61: JC x63 ;RX_BIT=0SETB RX_BIT ;RX_BIT=1AJMP x63

x62: SETB STOPx63:

RET;********************************************************************************;External interrupt 0 handler -> DECODES A NEC FORMAT IR STREAM;SETS NEW_COM(02H) IF A NEW COMMAND IS AVAILABLE. SHOULD BE CLEARED IF THE COMMAND IS PROCESSED;THE COMMAND IS STORED IN THE COMMAND(021H) LOCATION IN INTERNAL RAM;USES TIMER0;DESTROYS R0,R2,TMOD0;********************************************************************************INTR_EX0:

CLR EX0 ;Disable Int0

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PUSH ACCPUSH PSW

; EVERY KEYCODE IS TRANSMITTED TWICE. THE FIRST TIME IS REJECTEDJNB TF0, IRDECODE ; SECOND & SUBSEQUENT CONTINEOUS TRANSMISSIONMOV R2,#0AAH ;DELAY 85mS TO REJECT THE FIRST TRANSMISSION

DLY85:MOV R0,#0F9H ;1-CylDJNZ R0,$ ;2-CylDJNZ R2,DLY85 ;2-CylAJMP x72

IRDECODE: ; DECODE INCOMING IR COMMANDORL TMOD,#01H ;SET MODE1 FOR TIMER0 (16-BIT TIMER )ANL TMOD,#0F1H ;GATE0=0, CT=0MOV TH0,#00H ;<-CHECK NECESSATY?MOV TL0,#00H ;<-CHECK NECESSATY?SETB TR0 ; START TIMER0JNB IR_IN,$ ;LOOP UNTIL IR_IN GOES HIGH, END OF START PULSECLR TR0 ;STOP TIMER0

;*****check length of start pulse**********************************************************MOV A,TH0CJNE A,#020H,x64 ;MIN TIMER0 COUNT = 20OOH = 8192D i.e. 8.1ms START PULSEAJMP x66

x64: JC x72CJNE A,#025H,x65 ;MAX TIMER0 COUNT = 25FFH = 9727D i.e. 9.7ms START PULSEAJMP x66

x65: JNC x72 ;START PULSE LENGTH INVALIDx66: ;START PULSE IDENTIFIED, CONTINUE

JB IR_IN,$ ;LOOP UNTIL IR_IN GOES LOW, SKIP 4.5mS SILENCE;TODO->AVOID INFINITE LOOP IF ONLY A NOISE START SIGNAL RECEIVED BUT NO STOP BIT

ORL TMOD,#08H ;GATE0=1SETB TR0 ;START TIMER0ACALL RECEIVE_BIT ;RECEIVE THE INCOMING 0,1 OR STOP BITJB STOP,STOPBIT ;STOP BIT RECEIVED, REPEAT LAST COMMANDMOV C,RX_BITRLC AMOV R2,#07H ;NUMBER OF BITS IN A BYTE, 7 + 1 ALREADY RECEIVED

x67: ;RECEIVE CUSTOM CODEACALL RECEIVE_BIT ;RECEIVE THE INCOMING 0,1 OR STOP BITJB STOP,x72 ;STOP BIT RECEIVED, ERRORMOV C,RX_BITRLC ADJNZ R2,x67CJNE A,#C_CODE1,x72 ;CHECK CUSTOM CODEMOV R2,#08H ;NUMBER OF BITS IN A BYTE

x68: ;RECEIVE CUSTOM CODE'ACALL RECEIVE_BIT ;RECEIVE THE INCOMING 0,1 OR STOP BITJB STOP,x72 ;STOP BIT RECEIVED, ERRORMOV C,RX_BITRLC ADJNZ R2,x68CJNE A,#C_CODE2,x72 ;CHECK CUSTOM CODE'MOV R2,#08H ;NUMBER OF BITS IN A BYTE

x69: ;RECEIVE COMMAND BYTEACALL RECEIVE_BIT ;RECEIVE THE INCOMING 0,1 OR STOP BITJB STOP,x72 ;STOP BIT RECEIVED, ERROR

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MOV C,RX_BITRLC ADJNZ R2,x69MOV COMMAND,A ;MOVE VALUE TO COMMAND BYTEMOV R2,#08H ;NUMBER OF BITS IN A BYTE

x70: ;RECEIVE INVERTED COMMAND BYTEACALL RECEIVE_BIT ;RECEIVE THE INCOMING 0,1 OR STOP BITJB STOP,x72 ;STOP BIT RECEIVED, ERRORMOV C,RX_BITRLC ADJNZ R2,x70CPL ACJNE A, COMMAND,x72 ;CHECK INVERTED COMMAND BYTEACALL RECEIVE_BIT ; RECEIVE STOP BITJNB STOP,x72 ;ERRORAJMP x71 ;VALID COMMAND

STOPBIT:SETB NEW_COM ;SHOULD BE CLEARED IF THE COMMAND IS

PROCESSEDSETB REPEAT ;Repeated command<- contionous key pressMOV R2,#0AAHAJMP DLY85

x71: ;NEW VALID COMMANDSETB NEW_COM ;SHOULD BE CLEARED IF THE COMMAND IS

PROCESSEDCLR REPEAT

x72: CLR TR0 ;STOP TIMER0ANL TMOD,#0F7H ;GATE0=0CLR AMOV TH0,AMOV TL0,ACLR TF0 ;TIMER0 WILL OVERFLOW EXCEPT FOR SECOND TIME ORSETB TR0 ;CONTINOUS TRANSMISSIONPOP PSWPOP ACCSETB EX0 ;Enable Int0RETI ;INT0 Return

; END OF IR DECODING ROUTINES

; KEY INPUT PROCESSING ROUTINES;**************************************************************************; Checks for key press, sets NEW_KEY & code in KEY if key pressed; No multiple key presses, no continuous key press;**************************************************************************CHECK_KEY:

MOV A,P2SETB ACC.7CJNE A,#0FFH,NE_FF_KEYRET ;no keys pressed

NE_FF_KEY:PUSH IECLR EA ;disable interruptsPUSH BMOV B,AMOV R6,#064H ;50mS delay for key debounce

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MOV A,P2SETB ACC.7CJNE A,B,END_CHECK_KEY

;key debounced, check for keys one by one, multiple key press not allowedKEY1:

CJNE A,#0FEH,KEY2MOV KEY,#VOL_UPAJMP SET_NEW_KEY

KEY2:CJNE A,#0FDH,KEY3MOV KEY,#VOL_DNAJMP SET_NEW_KEY

KEY3:CJNE A,#0FBH,KEY4MOV KEY,#SELAJMP SET_NEW_KEY

KEY4:CJNE A,#0F7H,KEY5MOV KEY,#SOURCEAJMP SET_NEW_KEY

KEY5:CJNE A,#0EFH,KEY6MOV KEY,#INGAINAJMP SET_NEW_KEY

KEY6:CJNE A,#0DFH,KEY7MOV KEY,#MUTAJMP SET_NEW_KEY

KEY7:CJNE A,#0BFH,CONT_KEYPRESSMOV KEY,#STDBY

SET_NEW_KEY: ;set flag as new key availableSETB NEW_KEY ;cleared by the key processing routine

CONT_KEYPRESS: ;Wait in a loop till key is releasedMOV A,P2SETB ACC.7CJNE A,#0FFH,CONT_KEYPRESSMOV R6,#064H ;Key must be released for at least 50mSCALL DELAYMSMOV A,P2SETB ACC.7CJNE A,#0FFH,CONT_KEYPRESS

END_CHECK_KEY:POP BPOP IERET

; END OF KEY INPUT PROCESSING ROUTINES

; TDA7439 AUDIO PROCESSOR COMMUNICATION ROUTINES;**************************************************************************; TDA7439 communication routine with no incremental bus.; Called with function select byte in SUBADDR(R4) & data in AUDIODATA(R3).; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.; Destroys A, R3, R4

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;**************************************************************************SET_AUDIO:

CLR CCALL I2C_STARTJC x56 ; abort if bus not availableMOV A,#AUDIOPROC_ADDR ; setup Device addressCALL I2C_SHOUT ; send device addressJC x55 ; abort if no acknowledgeMOV A,SUBADDR ; send addressCLR ACC.4 ; No Incremental BusCALL I2C_SHOUTJC x55 ; abort if no acknowledgeMOV A,AUDIODATA ; get dataCALL I2C_SHOUT ; send dataJC x55 ; abort if no acknowledgeCLR C ; clear error flag

x55:CALL I2C_STOP

x56:RET

;*************************************************************************; Initialize TDA7439.; Send audio parameter values except R_ATTN & L_ATTN to audio processor ; with incremental bus.; Destroys ACC, CY, B, R0;*************************************************************************INIT_AUDIO:

CLR CMOV B,#05H ; byte count (6-1=5), leave out R_ATTN & L_ATTNMOV R0,#024H ; RAM pointerCALL I2C_STARTJC INIT_AUDIO ; loop till bus availableMOV A,#AUDIOPROC_ADDR ; setup Device addressCALL I2C_SHOUT ; send device addressJC INITAUDEND ; abort if no acknowledgeMOV A,#00H ; send sub address(function select)SETB ACC.4 ; Incremental BusCALL I2C_SHOUTJC INITAUDEND ; abort if no acknowledge

INCBUS:MOV A,@R0 ; get audio parameter valueCALL I2C_SHOUT ; send dataJC INITAUDEND ; abort if no acknowledgeINC R0 ; increment RAM pointer, sub address auto increaseDJNZ B,INCBUS ; setup next audio parameterCLR C ; clear error flag

INITAUDEND:CALL I2C_STOPRET

; END OF TDA7439 AUDIO PROCESSOR COMMUNICATION ROUTINES

; 24C01/02 COMMUNICATION ROUTINES;**************************************************************************; 24Cxx Current Address Read function.; Returns data in A.

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; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.; Destroys A;**************************************************************************READ_CURRENT:

CALL I2C_STARTJC x43 ; abort if bus not availableMOV A,#EEPROM_addr ; setup addressSETB ACC.0 ; specify read operationCALL I2C_SHOUT ; send device addressJC x42 ; abort if no acknowledgeCALL I2C_SHIN ; receive data byteCALL I2C_NAK ; do not acknowledge byteCLR C ; clear error flag

x42:CALL I2C_STOP

x43:RET

;**************************************************************************; 24C01/02 Random Read function.; Called with byte address in ADDR; Returns data in A.; Returns CY set to indicate that the bus is not available; or that the addressed device failed to acknowledge.; Destroys A, R1;**************************************************************************READ_RANDOM:

CALL I2C_STARTJC x45 ; abort if bus not availableMOV A,#EEPROM_addr ; setup addressCLR ACC.0 ; dummy write command to set internal addressCALL I2C_SHOUT ; send device addressJC x44 ; abort if no acknowledgeMOV A,ADDR ; send addressCALL I2C_SHOUTJC x44 ; abort if no acknowledgeCALL READ_CURRENT ; Call Current Address Read function.AJMP x45 ; exit

x44:CALL I2C_STOP

x45:RET

;*************************************************************************; 24C01/02 Sequential Read function. Initializes audio parameters in RAM; Read 11 bytes (01H to 0CH) sequentially from 24Cxx and move to ; internal RAM locations 024H to 02FH. Assumes address counter already ; set to 01H on entry (should be preceded by read at 00H); destroys ACC, B, CY, R0;*************************************************************************INIT_MEM:

CALL I2C_STARTJC INITMERR ; abort if bus not availableMOV B,#0BH ; byte count (11 bytes)MOV R0,#024H ; RAM pointerMOV A,#EEPROM_ADDR ; setup address

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SETB ACC.0 ; specify read operationCALL I2C_SHOUT ; send device addressJC INITMERR ; abort if no acknowledge

SEQREAD:CALL I2C_SHIN ; receive data byteMOV @R0,A ; move byte to internal RAMINC R0 ; increment RAM pointerDJNZ B,CONTRXCALL I2C_NAK ; do not acknowledge byte to end transmissionAJMP ENDRX

CONTRX:CALL I2C_ACK ; acknowledge byte to receive more bytesAJMP SEQREAD

ENDRX:CLR C ; clear error flagCALL I2C_STOP

INITMERR:CALL BITDLYRET

;**************************************************************************; 24C01/02 Byte Write function.; Called with byte address in register ADDR(R2) & data in register ZDATA(R1); Does ACK polling till device responds.; Does not wait for write cycle to complete.; Returns CY set to indicate that the addressed device failed to acknowledge.; Destroys A, R1, R2;**************************************************************************BYTEWRITE:

CLR CCALL BITDLY ; wait min time between Stop & Start on I2C busCALL I2C_STARTJC BYTEWRITE ; loop until bus availableMOV A,#EEPROM_ADDR ; setup device address & write operationCALL I2C_SHOUT ; send device addressJC NACKBWR ; loop till device acknowledges (ACK Polling)

MOV A,ADDR ; send addressCALL I2C_SHOUTJC ENDBWRMOV A,ZDATACALL I2C_SHOUT ; send dataAJMP ENDBWR

NACKBWR:CALL I2C_STOPCALL BITDLY ; wait some timeAJMP BYTEWRITE ;retry

ENDBWR:CALL I2C_STOPRET

;*************************************************************************;save standby status & audio parameters to EEPROM;Writes 12 Bytes from RAM locations 24H to 2FH & one byte for standby + mute bits;to EEPROM addresses 00H to 0CH using byte write with ack polling.;Returns CY set to indicate error.;Destroys ACC, CY, B, R0, R1, R2

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;*************************************************************************SAVE_STATE:

mov l_attn,r_attn ;REMOVE WHEN BALANCE ADJUSTEMENT IS ADDED?CLR AMOV C,MUTERLC A ; move standby bit into ACC.0MOV C,STANDBYRLC A ; move standby bit into ACC.0, MUTE to ACC.1MOV ZDATA,A ; load data byteMOV ADDR,#00H ; load addressCALL BYTEWRITE ; write byteJC END_SAVE_STATEMOV B,#0BH ; BYTE COUNTMOV R0,#024H ; RAM Pointer

BWRLOOP:INC ADDR ; increment addressMOV A,@R0 ; load dataMOV ZDATA,A ; load dataCALL BYTEWRITE ; write byteJC END_SAVE_STATEINC R0 ; increment RAM pointerDJNZ B,BWRLOOP ; decrement byte counter & loop

END_SAVE_STATE:RET ;END SAVE_STATE

; END OF 24C01/02 COMMUNICATION FUNCTIONS

; I2C BUS FUNCTIONS;**************************************************************************; Send START on i2c bus, defined as high-to-low SDA with SCL high.; Return with SCL, SDA low.; Returns CY set if bus is not available.;**************************************************************************I2C_START:

SETB SDASETB SCL; Verify bus available.JNB SDA, x46 ; jump if not highJNB SCL, x46 ; jump if not highNOP ; enforce setup delay and cycle delayCLR SDACALL BITDLY ; enforce hold delayCLR SCLCLR C ; clear error flagAJMP x47

x46:SETB C ; set error flag

x47:RET

;**************************************************************************; Send STOP, defined as low-to-high SDA with SCL high.; SCL expected low on entry. Return with SCL, SDA high.;**************************************************************************I2C_STOP:

CLR SDANOP ; enforce SCL low and data setup

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NOPSETB SCLCALL BITDLY ; enforce setup delaySETB SDARET

;**************************************************************************; Shift out a byte to the AT24Cxx, most significant bit first.; SCL, SDA expected low on entry. Return with SCL low.; Called with data to send in A.; Returns CY set to indicate failure by slave to acknowledge.; Destroys A.;**************************************************************************I2C_SHOUT:

PUSH BMOV B,#08H ; bit counter

x48:RLC A ; move bit into CYMOV SDA,C ; output bitNOP ; enforce SCL low and data setupSETB SCL ; raise clockCALL BITDLY ; enforce SCL highCLR SCL ; drop clockDJNZ B,x48 ; next bitSETB SDA ; release SDA for ACKNOP ; enforce SCL low and tAANOPSETB SCL ; raise ACK clockCALL BITDLY ; enforce SCL highMOV C,SDA ; get ACK bitCLR SCL ; drop ACK clockPOP BRET

;**************************************************************************; Shift in a byte from the AT24Cxx, most significant bit first.; SCL expected low on entry. Return with SCL low.; Returns received data byte in A.;**************************************************************************I2C_SHIN:

SETB SDA ; make SDA an inputPUSH BMOV B,#08H ; bit count

x49:CALL BITDLY ; enforce SCL low and data setupSETB SCL ; raise clockCALL BITDLY ; enforce SCL highMOV C,SDA ; input bitRLC A ; move bit into byteCLR SCL ; drop clockDJNZ B,x49 ; next bitPOP BRET

;**************************************************************************; Clock out an acknowledge bit (low).; SCL expected low on entry. Return with SCL, SDA low.;**************************************************************************

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I2C_ACK:CLR SDA ; ACK bitNOP ; enforce SCL low and data setupNOPSETB SCL ;raise clockCALL BITDLY ; enforce SCL highCLR SCL ; drop clockRET

;**************************************************************************; Clock out a negative acknowledge bit (high).; SCL expected low on entry. Return with SCL low, SDA high.;**************************************************************************I2C_NAK:

SETB SDA ; NAK bitNOP ; enforce SCL low and data setupNOPSETB SCL ; raise clockCALL BITDLY ; enforce SCL highCLR SCL ; drop clockRET

; END OF I2C BUS ROUTINES

; DISPLAY ROUTINES;*************************************************************************;loads LED_STATUS byte in LED port.;*************************************************************************LOAD_LED:

PUSH ACCMOV A,LED_STATUSCPL AMOV P0,APOP ACCRET

;**************************************************************************; INCREMENT FUNCTION DISPLAY. low nibble of LED_STATUS stores function display; DESTROYS ACC;**************************************************************************; INC_SELD:

MOV A,LED_STATUSANL A,#0FH ;Clear high nibble (source display)JNZ NOTVOLMOV B,BASSCALL DISP_AUDMOV A,#01H ;BASS LED onAJMP LDFUN

NOTVOL:JNB ACC.0,NOTBASSMOV B,MIDDLECALL DISP_AUDMOV A,#02H ;MIDDLE LED onAJMP LDFUN

NOTBASS:JNB ACC.1,NOTMIDDLEMOV B,TREBLECALL DISP_AUD

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MOV A,#04H ;TREBLE LED onAJMP LDFUN

NOTMIDDLE:JNB ACC.2,NOTTREBLECALL DISP_ATTMOV A,#08H ;ATTENUATION LED onAJMP LDFUN

NOTTREBLE:JNB ACC.3,NOTATTNCALL DISP_VOLMOV A,#00H ;All LEDs off(Volume)AJMP LDFUN

LDFUN:ANL LED_STATUS,#0F0H ;clear low nibbleORL LED_STATUS,A ;save function selection displayACALL LOAD_LED

NOTATTN:RET

;**************************************************************************;LOAD SOURCE DISPLAY. high nibble of LED_STATUS stores source display;Also updates GAIN byte.;DESTROYS A,B,CY;**************************************************************************LOAD_SRCD:

MOV A,CHANNELCJNE A,#00H,SRC3MOV B,#080H ;IN4MOV GAIN,GAIN4AJMP LDSRC

SRC3: CJNE A,#01H,SRC2MOV B,#040H ;IN3MOV GAIN,GAIN3AJMP LDSRC

SRC2: CJNE A,#02H,SRC1MOV B,#020H ;IN2MOV GAIN,GAIN2AJMP LDSRC

SRC1: MOV B,#010H ;IN1MOV GAIN,GAIN1

LDSRC:MOV LED_STATUS,B;function select = volume & save status to RAMACALL LOAD_LEDRET

;**************************************************************************;BINARY TO BCD CONVERSION ROUTINE;SEE P313 OF R. S. GAONKAR'S 8085 BOOK FOR ACTUAL LOGIC;ACCEPTS A BINARY NUMBER BETWEEN 0-99D(63H) IN ACC & CONVERTS TO BCD;IF ACC>63H(99D) OUTPUTS 00H;DESTROYS A,CY & B;**************************************************************************HEXBCD:

MOV B,#00HCJNE A,#64H,N100 ;NOT EQUAL 100D

N100: JC LT99AJMP GT99 ;greater than 99D

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LT99: ;less than 99D, continueSUB10: ;repeatedly subtaract 10D from Acc till reminder less than 10D

CLR CCJNE A,#0AH,N10 ;NOT EQUAL 10D

N10: JC LT10 ;reminder less than 10DSUBB A,#0AHINC B ;loop counterAJMP SUB10

GT99: CLR A ;output 00 only if greater than 99DLT10: SWAP A ;A contains low BCD nibble & B contains high BCD nibble

ORL A,BSWAP ARET

;*************************************************************************;loads a byte FROM P1 in DISPLAY port.;*************************************************************************LOAD_DISP:

SETB DISP_LATCH ;latch the byte in Display latchNOPCLR DISP_LATCHRET

;**************************************************************************;Displays input gain settings(0 - 15) on LED Display;destroys A,CY,P1;**************************************************************************DISP_GAIN:

MOV A,GAINACALL HEXBCD ;convert to BCDMOV P1,AANL A,#0F0H ;clear low nibbleJNZ LDGAINORL P1,#0F0H ;set illegal BCD to supress leading zero

LDGAIN:ACALL LOAD_DISPRET

;**************************************************************************;Displays volume (1-80)settings on LED Display;Entry: B=setting value & ACC=max value for the setting(4F/2F);destroys A,CY,P1,B;**************************************************************************DISP_VOL:

MOV A,#050HMOV B,R_ATTNCLR CSUBB A,BACALL HEXBCDMOV P1,AANL A,#0F0H ;clear low nibbleJNZ LDVOLORL P1,#0F0H ;set illegal BCD to supress leading zero

LDVOL:ACALL LOAD_DISPRET

;**************************************************************************;Displays attenuation (0-47)settings on LED Display

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;destroys A,P1;**************************************************************************DISP_ATT:

MOV A,VOLUMEACALL HEXBCDMOV P1,AANL A,#0F0H ;clear low nibbleJNZ LDATTORL P1,#0F0H ;set illegal BCD to supress leading zero

LDATT:ACALL LOAD_DISPRET

;**************************************************************************;Displays bass/middle/treble settings(07-00-0-7) on LED Display.;called with bass/middle/treble settings in B register;destroys A,P1,CY,B;**************************************************************************DISP_AUD:

JB B.3,GT8MOV A,#07H ;if settings less than 8H, subtract from 07HCLR CSUBB A,BACALL HEXBCD ;do not supress leading zero => CUTAJMP LDDSPL

GT8: ;if settings greater than 8H, subtract from 0FHMOV A,#0FHCLR CSUBB A,BACALL HEXBCDORL A,#0F0H ;set illegal BCD to supress leading zero=>BOOST

LDDSPL:MOV P1,AACALL LOAD_DISPRET

; END OF DISPLAY ROUTINES

; COMMAND & KEY DECODING ROUTINES;*************************************************************************; Bass_Middle_Treble Up, used by DO_VOL_UP routine;*************************************************************************B_M_T_UP:

CJNE A,#07H,NE7_BMTUPMOV A,#0FHRET

NE7_BMTUP:JNC GT7_BMTUPINC ARET

GT7_BMTUP:CJNE A,#08H,NE8_BMTUPRET ; Setting already maximum

NE8_BMTUP:DEC ARET

;*************************************************************************

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; Bass_Middle_Treble Down, used by DO_VOL_DN routine;*************************************************************************B_M_T_DN:

JNZ NE0_BMTDNRET ; Already minimum, do nothing

NE0_BMTDN:JB ACC.3,GT7_BMTDNDEC A ; Decrement if less than 7RET

GT7_BMTDN:CJNE A,#0FH,LT15_BMTDNMOV A,#07HRET

LT15_BMTDN:INC A ; Increment if less than 15RET

;*************************************************************************; Process VOL_UP command;*************************************************************************DO_VOL_UP:

JNB GAIN_ON,FUN_UPCALL DO_GAIN_UPJMP DONE_VUP

FUN_UP:MOV A,LED_STATUSANL A,#0FH ;CLEAR HIGH NIBBLE (LOW NIBBLE = FUNCTION DISPLAY)

CHECK_VOL_UP:JNZ CHECK_BAS_UP ; Increase VOL IF ACC=0MOV A,R_ATTN ;PROCESS RIGHT CHANNELJZ DONE_VUP ; Attenuation already 0dB, do nothingDEC A ; Volume UPMOV AUDIODATA,AMOV SUBADDR,#06HCALL SET_AUDIOJC DONE_VUPMOV R_ATTN, AUDIODATAMOV A,L_ATTN ;PROCESS LEFT CHANNELJZ DONE_VUP ; Attenuation already 0dB, do nothingDEC A ; Volume UPMOV AUDIODATA,AMOV SUBADDR,#07HCALL SET_AUDIOJC DONE_VUPMOV L_ATTN,AUDIODATACALL DISP_VOL ; UPDATE LED DISPLAYAJMP DONE_VUP

CHECK_BAS_UP: ; Increment BASSCJNE A,#01H,CHECK_MID_UPMOV A, BASSCALL B_M_T_UPMOV B,A ;used by DISP_AUDMOV SUBADDR,#03HMOV AUDIODATA,ACALL SET_AUDIO ; Change audio settingsJC DONE_VUP

50


MOV BASS, AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VUP

CHECK_MID_UP: ; Increment MIDDLECJNE A,#02H,CHECK_TRE_UPMOV A, MIDDLECALL B_M_T_UPMOV B,A ;used by DISP_AUDMOV SUBADDR,#04HMOV AUDIODATA,ACALL SET_AUDIO ;Change audio settingsJC DONE_VUPMOV MIDDLE,AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VUP

CHECK_TRE_UP: ; Increment TREBLECJNE A,#04H,CHECK_ATT_UPMOV A,TREBLECALL B_M_T_UPMOV B,A ;used by DISP_AUDMOV SUBADDR,#05HMOV AUDIODATA,ACALL SET_AUDIO ;Change audio settingsJC DONE_VUPMOV TREBLE,AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VUP

CHECK_ATT_UP:CJNE A,#08H,DONE_VUPMOV A,VOLUMECJNE A,#02FH,NE2FVOLAJMP DONE_VUP ;Already max attenuation

NE2FVOL:JNC DONE_VUP ;Already max attenuation/MuteINC AMOV AUDIODATA,AMOV SUBADDR,#02HCALL SET_AUDIOJC DONE_VUP ;UPDATE DISPLAYMOV VOLUME,AUDIODATACALL DISP_ATT

DONE_VUP:RET

;*************************************************************************; Process VOL_DN command;*************************************************************************DO_VOL_DN:

JNB GAIN_ON,FUN_DNCALL DO_GAIN_DNJMP DONE_VUP

FUN_DN:MOV A,LED_STATUSANL A,#0FH ;CLEAR HIGH NIBBLE (LOW NIBBLE = FUNCTION DISPLAY)

CHECK_VOL_DN:JNZ CHECK_BAS_DN ; Decrease VOL IF ACC=0

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MOV A,R_ATTN ;PROCESS RIGHT CHANNELCJNE A,#04FH,RV_DNAJMP DONE_VDN ;Attenuation already -79dB, do nothing

RV_DN:INC A ;Volume DOWNMOV AUDIODATA,AMOV SUBADDR,#06HCALL SET_AUDIOJC DONE_VDNMOV R_ATTN,AUDIODATA ;Save settings to RAMMOV A,L_ATTN ;PROCESS LEFT CHANNELCJNE A,#04FH,LV_DNAJMP DONE_VDN ;Attenuation already -79dB, do nothing

LV_DN:INC A ;Volume DOWNMOV AUDIODATA,AMOV SUBADDR,#07HCALL SET_AUDIOJC DONE_VDNMOV L_ATTN,AUDIODATA ;Save settings to RAM

; ;UPDATE LED DISPLAYCALL DISP_VOLAJMP DONE_VDN

CHECK_BAS_DN: ; Decrement BASSCJNE A,#01H,CHECK_MID_DNMOV A,BASSCALL B_M_T_DNMOV B,A ;used by DISP_AUDMOV SUBADDR,#03HMOV AUDIODATA,ACALL SET_AUDIO ;Change audio settingsJC DONE_VDNMOV BASS,AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VDN

CHECK_MID_DN: ; Decrement MIDDLECJNE A,#02H,CHECK_TRE_DNMOV A,MIDDLECALL B_M_T_DNMOV B,A ;used by DISP_AUDMOV SUBADDR,#04HMOV AUDIODATA,ACALL SET_AUDIO ;Change audio settingsJC DONE_VDNMOV MIDDLE,AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VDN

CHECK_TRE_DN: ; Decrement TREBLECJNE A,#04H,CHECK_ATT_DNMOV A,TREBLECALL B_M_T_DNMOV B,A ;used by DISP_AUDMOV SUBADDR,#05HMOV AUDIODATA,ACALL SET_AUDIO ;Change audio settings

52


JC DONE_VDNMOV TREBLE,AUDIODATA ;Update RAMCALL DISP_AUD ;B-reg already contains display settingsAJMP DONE_VDN

CHECK_ATT_DN:CJNE A,#08H,DONE_VDNMOV A,VOLUMEJZ DONE_VDN ;Already minimum AttenuationDEC AMOV AUDIODATA,AMOV SUBADDR,#02HCALL SET_AUDIOJC DONE_VDN ;UPDATE DISPLAYMOV VOLUME,AUDIODATACALL DISP_ATT

DONE_VDN:RET

;*************************************************************************;Increment Source;Destroys A,CY;*************************************************************************INC_SOURCE:

MOV A,CHANNELINC AJNB ACC.2,ST_SRCCLR A

ST_SRC: ;Store sourceMOV SUBADDR,#00H ;R4=TDA7439 FUNCTION SELECTION BYTEMOV AUDIODATA,A ;R3=INPUT CHANNELCALL SET_AUDIO ;TDA7439 change channelJC SRC_ERRMOV CHANNEL,AUDIODATA ;STORE IN RAMCALL LOAD_SRCD ;update display & GAIN byteMOV SUBADDR,#01H ;R4=TDA7439 FUNCTION SELECTION BYTEMOV AUDIODATA,GAIN ;R3=INPUT GAINCALL SET_AUDIO ;TDA7439 change gain settings

SRC_ERR:RET

;*************************************************************************; PROCESS GAIN KEY (TOGGLE);*************************************************************************DO_GAIN:

JB GAIN_ON,OFF_GAINSETB GAIN_ONANL LED_STATUS,#0F0HCALL LOAD_LEDCALL DISP_GAINRET

OFF_GAIN:CLR GAIN_ONCALL DISP_VOLCALL LOAD_LEDRET

;*************************************************************************; PROCESS GAIN UP

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;*************************************************************************DO_GAIN_UP:

MOV A,GAINCJNE A,#0FH,GAIN_INCRET ;Already maximum

GAIN_INC:INC AMOV AUDIODATA,AMOV SUBADDR,#01HCALL SET_AUDIOJC END_GAIN_UPMOV GAIN,AUDIODATACALL UPDATE_GAINCALL DISP_GAIN

END_GAIN_UP:RET

;;*************************************************************************; PROCESS GAIN DN;*************************************************************************DO_GAIN_DN:

MOV A,GAINJZ END_GAIN_DN ;Already minimumDEC AMOV AUDIODATA,AMOV SUBADDR,#01HCALL SET_AUDIOJC END_GAIN_DNMOV GAIN,AUDIODATACALL UPDATE_GAINCALL DISP_GAIN

END_GAIN_DN:RET

;*************************************************************************; MOVE GAIN TO GAIN1/GAIN2/GAIN3/GAIN4 depending on active channel;*************************************************************************UPDATE_GAIN:

MOV A,LED_STATUSANL A,#0F0HCJNE A,#010H,CH2MOV GAIN1,GAINRET

CH2: CJNE A,#020H,CH3MOV GAIN2,GAINRET

CH3: CJNE A,#040H,CH4MOV GAIN3,GAINRET

CH4: MOV GAIN4,GAINRET

;*************************************************************************; TOGGLE STANDBY STATUS;*************************************************************************TOGGLE_STDBY:

JB STANDBY,STANDBY_OFF

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CALL SET_MUTE_ONSETB STANDBYCALL SAVE_STATEMOV R5,#05H ;0.5 Sec DelayCALL DELAYSECMOV P0,#0FFH ;Turn off LEDsSETB POWER ;Active lowCLR INDICATOR ;Turn on Command Indicator LEDRET

STANDBY_OFF:CLR STANDBYCLR POWERCALL LOAD_LEDSETB INDICATOR ;Turn off Command Indicator LEDJNB MUTE,MUTE_OFFMOV P1,#00HCALL LOAD_DISPRET

MUTE_OFF:MOV R5,#0AH ;1 Sec DelayCALL DELAYSECCALL SET_MUTE_OFFRET

;*************************************************************************; TOGGLE MUTE STATUS;*************************************************************************DO_MUTE:

JB MUTE,DO_MUTE_OFF ;TURN OFF MUTECALL SET_MUTE_ONJC END_MUTESETB MUTEMOV P1,#00HCALL LOAD_DISPRET

DO_MUTE_OFF:CALL SET_MUTE_OFFJC END_MUTECLR MUTECALL DISP_VOL

END_MUTE:RET

;*************************************************************************SET_MUTE_ON:

MOV AUDIODATA,#078H ;MUTEMOV SUBADDR,#06H ;RIGHT CHANNELCALL SET_AUDIOJC END_MUTE_ONMOV SUBADDR,#07H ;LEFT CHANNELCALL SET_AUDIO

END_MUTE_ON:RET

;*************************************************************************SET_MUTE_OFF:

MOV AUDIODATA,R_ATTN ;RIGHT CHANNEL VOLUMEMOV SUBADDR,#06H ;RIGHT CHANNEL

55


CALL SET_AUDIOJC END_MUTE_OFFMOV AUDIODATA,L_ATTN ;LEFT CHANNEL VOLUMEMOV SUBADDR,#07H ;LEFT CHANNELCALL SET_AUDIOJC END_MUTE_OFFMOV AUDIODATA,VOLUME ;ATTNEUATIONMOV SUBADDR,#02HCALL SET_AUDIO

END_MUTE_OFF:RET

;*************************************************************************; IMPLEMENTS REMOTE COMMANDS;*************************************************************************DO_COM:

MOV R0,COMMANDCALL DO_COMMANDCLR NEW_COMRET

;*************************************************************************; IMPLEMENTS KEYPAD COMMANDS;*************************************************************************DO_KEY:

MOV R0,KEYCALL DO_COMMANDCLR NEW_KEYRET

;*************************************************************************; IMPLEMENTS KEYPAD/REMOTE COMMANDS;*************************************************************************DO_COMMAND:CHECK_STANDBY: ;check if STANDBY pressed

CJNE R0,#STDBY,CHECK_V_UPJB REPEAT,END_COMMAND ;No contineous-key-pressCALL OFF_GAINCALL TOGGLE_STDBYAJMP END_COMMAND

CHECK_V_UP: ;check if VOL_UP pressedJB STANDBY,END_COMMAND ;If in standby do nothingCJNE R0,#VOL_UP,CHECK_V_DNCALL DO_VOL_UPAJMP END_COMMAND

CHECK_V_DN: ;check if VOL_DN pressedCJNE R0,#VOL_DN,CHECK_SELCALL DO_VOL_DNAJMP END_COMMAND

CHECK_SEL: ;check if SEL pressedCJNE R0,#SEL,CHECK_SOURCEJB REPEAT,END_COMMANDCALL OFF_GAINCALL INC_SELD ;Increment function selectionAJMP END_COMMAND

CHECK_SOURCE: ;check if SOURCE pressedCJNE R0,#SOURCE,CHECK_GAINJB REPEAT,END_COMMAND

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CALL OFF_GAINCALL INC_SOURCEAJMP END_COMMAND

CHECK_GAIN: ;check if GAIN pressedCJNE R0,#INGAIN,CHECK_MUTEJB REPEAT,END_COMMANDCALL DO_GAINAJMP END_COMMAND

CHECK_MUTE: ;check if MUTE pressedCJNE R0,#MUT,END_COMMANDJB REPEAT,END_COMMANDCALL OFF_GAINCALL DO_MUTE

END_COMMAND:CALL INIT_TIMER1RET

;*************************************************************************INIT_TIMER1:

CLR TR1MOV T1_COUNT,#01HMOV TH1,#00HMOV TL1,#00HSETB TR1CLR INDICATOR ;Turn on INDICATOR LEDRET

; END OF COMMAND & KEY DECODING ROUTINES;

TIMER1 INTERRUPT HANDLER ROUTINE; Volume function (default) selected if T1 is running for 4Sec+.; Keeps source display flashing if GAIN_ON is set.INTR_T1:

PUSH IECLR EA ;disable interruptsCLR TR1 ;stop timer temporarilyPUSH ACCPUSH PSWMOV A,T1_COUNTCJNE A,#066H,NE66T1MOV T1_COUNT,#01HANL LED_STATUS,#0F0H ;Function select = VolumeCLR GAIN_ONCALL DISP_VOLCALL LOAD_LEDJNB STANDBY,END_INT_T1MOV P0,#0FFHAJMP END_INT_T1

NE66T1:MOV TH1,#015H ;T1 reload value =65535-60000=5535D=159FHMOV TL1,#09FH ;T1 overflow every 60mSINC T1_COUNTSETB TR1CJNE A,#01H,NE01T1CLR INDICATOR ;Turn on Command Indicator LEDAJMP FLASH_DISP

NE01T1:

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JB STANDBY,FLASH_DISPSETB INDICATOR ;Turn off Command Indicator LED

FLASH_DISP:JNB GAIN_ON,END_INT_T1ANL A,#07H ;Clear A except last 3 bitsJNZ MULTIPLE_4MOV P0,#0FFH ;Clear display if multiple of 8AJMP END_INT_T1

MULTIPLE_4:CLR ACC.2JNZ END_INT_T1CALL LOAD_LED ;load led display if multiple of 4

END_INT_T1:POP PSWPOP ACCPOP IERETI

; END OF TIMER1 INTERRUPT HANDLER ROUTINE; MAIN ENTRY ROUTINE; START:;*************************************************************************; REGISTER INITIALIZATION;*************************************************************************

MOV SP,#STACKBASE ;stack base addressCLR AMOV TCON,AMOV PSW,A MOV IE,A ;Disable InterruptsMOV T1_COUNT,AMOV TMOD,#011H ;T1 & T0 IN 16-bit MODE1, GATEx=0 & CTx=0CLR TR1SETB TR0 ;START TIMER TO REJECT FIRST TRANSMISSIONSETB SDA ;I2C InitializeSETB SCLSETB POWER ;Standby on (active low)SETB MONITOR ;Power monitor as input(active low)CLR REPEATCLR NEW_COMCLR NEW_KEYCLR DISP_LATCHCLR GAIN_ON

INIT: ;INITIALIZATION STARTS HERECLR C

;*************************************************************************; STANDBY & MUTE INITIALIZATION;*************************************************************************

CLR AMOV ADDR,#00H ;READ STANDBY STATUSACALL READ_RANDOMJC INIT ;RETRYRRC A ;move LSB into CY bitMOV STANDBY,C ;store standby status in RAMRRC AMOV MUTE,C ;store mute status in RAM

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;*************************************************************************; AUDIO PARAMETERS INITIALIZATION;*************************************************************************; Read 8 bytes (01H to 0CH) sequentially from 24Cxx and move to ; internal RAM locations 024H to 02FH;*************************************************************************

CALL INIT_MEMJC INIT

;*************************************************************************;Validity check of memory data bytes;*************************************************************************VAL_CH: MOV A,CHANNEL

CJNE A,#04H,NE04VNE04V: JC VAL_G1

MOV CHANNEL,#03H ;Select IN1VAL_G1: MOV A,GAIN1

CJNE A,#010H,NE10G1NE10G1: JC VAL_G2

MOV GAIN1,#00H ;GAIN1 = 0VAL_G2: MOV A,GAIN2





CJNE A,#010H,NE10G4NE10G4: JC VAL_ATT

MOV GAIN4,#00H ;GAIN4 = 0VAL_ATT: MOV A,VOLUME

CJNE A,#030H,NE30ATTNE30ATT: JC VAL_BAS

MOV VOLUME,#00H ;ATTN = 0VAL_BAS: MOV A,BASS

CJNE A,#010H,NE10BASNE10BAS: JC VAL_MID

MOV BASS,#07H ;BASS = 0VAL_MID: MOV A,MIDDLE

CJNE A,#010H,NE10MIDNE10MID: JC VAL_TRE

MOV MIDDLE,#07H ;VOICE = 0VAL_TRE: MOV A,TREBLE

CJNE A,#010H,NE10TRENE10TRE: JC VAL_VOL

MOV TREBLE,#07H ;TRE = 0VAL_VOL: MOV A,R_ATTN

CJNE A,#050H,NE50VOLNE50VOL: JC VAL_LEFT

MOV R_ATTN,#04FH ;VOL = 0VAL_LEFT: MOV L_ATTN,R_ATTN ;Remove if balance adj added;**************************************************************************;initialize LED & Display port.;**************************************************************************

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CALL LOAD_SRCD ;display input channel & function selected->volumeCALL DISP_VOL ;Display volume settingsJNB STANDBY,AUDIO_INITMOV P0,#0FFH ;Turn off all LEDsCLR INDICATOR ;Turn on Command Indicator/Standby LEDJNB MUTE,AUDIO_INITMOV P1,#00H ;Display 00 if Mute onCALL LOAD_DISP

;*************************************************************************; Send audio parameter values to audio processor with incremental bus; except R & L Volume;*************************************************************************AUDIO_INIT:

CALL BITDLYCALL INIT_AUDIOJC AUDIO_INITMOV C,STANDBY ;<- POWER SHOULD BE ACTIVATED ONLY AFTER AUDIO SETMOV POWER,CMOV R5,#014HCALL DELAYSEC ;2SEC DelayJB MUTE,GO_EVENTSJB STANDBY,GO_EVENTSCALL SET_MUTE_OFF ;Initialize volume

GO_EVENTS:;*************************************************************************; WAIT-FOR-EVENTS LOOP;waits for three events -> power off, key press & remote rx;*************************************************************************

SETB EX0 ;External Int0 for IR SensorSETB ET1 ;Timer1 interruptSETB EA ;Enable Interrupts

LOOP:JB MONITOR,POWER_OFF ;If MONITOR high, go to POWER_OFF (active low)CALL CHECK_KEYJB NEW_KEY,GO_KEYJB NEW_COM,GO_COMAJMP LOOP

GO_KEY:CLR EX0 ; disable Int0CALL DO_KEY ; Process KeySETB EX0 ; Enable Int0AJMP LOOP

GO_COM:CLR EX0 ; disable Int0CALL DO_COM ; Process CommandSETB EX0 ; Enable Int0AJMP LOOP

;*************************************************************************; END OF WAIT-FOR-EVENTS LOOP;*************************************************************************;*************************************************************************; POWER OFF SEQUENCE;*************************************************************************POWER_OFF:

CLR EA ; DISABLE INTERRUPTS

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JB STANDBY,CONT_OFF ; no need to save settings if already in standbyCALL SAVE_STATE ; save settings to EEPROMMOV R5,#05HCALL DELAYSEC ;0.5 Sec delay

JNB MONITOR,GO_EVENTS;**************************************************************************;Settings saved on EEPROM. MUTE audio & turn off standby relay;**************************************************************************CONT_OFF:

CALL SET_MUTE_ONSETB POWER ;turn off relay (active low)MOV P0,#0FFH ;turn off LEDsJB MONITOR,$ ;loop till power goes down or comes onJMP RESET ;reset device

;**************************************************************************;######################## THE END #####################################END

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7.7 Hardware Schematic: 7.7(a) Power Supply Unit:

Figure 7.1 Hardware schematic of power supply unit

7.7(b) Remote Control Unit:

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Figure 7.2 Hardware schematic Remote Control unit

7.7(c) Complete DAP system:

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Figure 7.3 Hardware schematic of complete DAP system

8. APPLICATIONS

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It can be used in place of home audio systems by interfacing with personal computer, CD or DVD player ,MP3 player, IPOD or Mobile Phones

For audio processing and recording songs and adding sound effects Digital audio processor can be helpful.

For Car music system, DJ systems, Party plots, Marriage Functions etc.

9. CONCLUSION

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This audio processor has enhanced features and can be easily customized to meet individual requirements as it is programmable.

It is based on a microcontroller and can be used with any NEC-compatible full function IR remote control.

The circuit can be easily assembled on any PCB with IC base.

10. FUTURE SCOPE

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Number of inputs could be increased by using other microcontroller or an 8255 IC.

It could be interfaced with woofer systems to get the high quality sound effect.

It could also be interfaced with the personal computer and used for audio processing & sound recording purposes.

11. REFRENCES AND BIBLOGRAPHY

Muhammad Ali Mazidi, Janice Gillispie Mazidi, Rolin D. Mckinlay.

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Second edition, “THE 8051 MICROCONTROLLER AND EMBEDDED SYSTEM”

K. J. Ayala. Third edition, “The 8051 MICROCONTROLLER”

General information about digital audio processor:

www.efymag.comwww.efymagonline.comwww.electronicsforu.comwww.alldatasheets.comwww.wikipedia.orgwww.google.comwww.finalyearprojects.com

Tutorial on microcontroller: www.8051projects.net/microcontroller_tutorials/

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http://www.finalyearprojects.com/

http://www.google.com/

http://www.wikipedia.org/

http://www.alldatasheets.com/

dap-final report

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