csir funded project 270711

FORM-C

PART A

1. Institute to administer the grant:

National Engineering College, K.R.Nagar, Kovilpatti.

2. Project Title (use not more than four lines):

VLSI Architecture of MIMO-OFDM-IDMA System for Wireless Communication

3. General area of the proposed research (refer to the subject area here):

Wireless Communication

4. Name of the sponsoring CSIR Laboratory (if applicable): NIL

5. Principal Investigator (PI):

a. Title : Prof Sex

F

S.TAMIL SELVI

b. Full Official Address, Telephone, Fax, E-mail

S.TAMIL SELVI Professor /ECE DepartmentNational Engineering College, K.R.Nagar, Kovilpatti – 628 503.Email: [email protected]: 04632 –222502 Fax : 04632 - 232749

c. Position Professor

d. Date of birth 30.05.1967

e. Highest Degree University/ Institute Ph.D , Manonmaniam Sundaranar University,TirunelveliPh.D in the area of Wireless Communication Title: Analysis and Simulation of Multi User Detection with various multiple access Techniques in Wireless Communication

f. Time to be devoted to project (in man months)

36 months

6. Other participants (give name, date of birth, designation, addresses, highest qualification for each of the co-/Principal-Investigator) (CO-I):

1. Mr.Arul Elango Date of Birth: Lecturer/ ECE Department, National Engineering College, K.R.Nagar, Kovilpatti – 628 503.

M.E :

2. Ms. Manjula Devi Date of Birth: Lecturer/ ECE Department, National Engineering College, K.R.Nagar, Kovilpatti – 628 503.

M.E. Communication Systems Mepco Schlenk Engineering College, Madurai.

7. Names and addresses of four research scientists actively engaged in the general area of the proposed research:

Dr.J.Klutto MillethPrincipal Research Engineer,Centre of Excellence in Wireless Technology,IIT Madras, Chennai-600036.

(b) Dr. B.Venkataramani, Professor and Head, ECE Department, National Institute of technology, Tiruchirapalli-620 051.

(c) Dr.K V S Hari Professor, Department of ECE, IISC Bangalore

(d) Satat Kumar PatraProfessor/ECE DeaprtmentNIT,Rourkela

8. Research support availed / being availed/ applied for by the PI from different sources, including CSIR, during the last six years:

Grant agency

Title of the project and Reference No.

Duration, (from mm/yy to mm/yy)

Percentage of time devoted / being devoted/to be devoted, in man months

Amount in lakh Rs.

--- --- --- --- ---

Budget items Amount requested in Lakhs

1st Year 2ndYear 3rd Year Total

(a) Staff

RA 0.96 1.02 1.08 3.06

(b) Contingency

Chemical, samples glassware etc

Maintenance

Information search (from data bases)

Travel

Any other

-

0.2

0.2

-

-

0.05

0.1

0.2

-

-

0.05

0.1

0.2

-

-

0.1

0.4

0.6

-

(c) Equipment (item wise) 1. Virtex 2 Pro FPGA

Evaluation boards

2. Virtex 2 Pro FPGA Development boards

3. Logic Analyzer 102 channels along with Xilinx FPGA Debug Dynamic Probe

4. Mixed Signal Oscilloscope (MSO) along with Xilinx FPGA Debug Dynamic Probe

5. Xilinx IDE

6. Higher end PC

1st Year

2.8 4.4

2.0

0.4

2nd Year

-

-

9.5

10.0

-

-

-

3rd Year

-

-

-

-

-

-

2.8

4.4

9.5

10.0

2.0

0.4

(d) Total 11.06 21.02 1.68 33.26

9. Proposed budget:

National Engineering College, K.R.NagarDepartment of Electronics and Communication Engineering

List of Major Equipments (more than Rs.50, 000) available in ECE Department

S. No.

Equipment Purchase

Name Make & Model DateCostRs.

1Digital Storage Oscilloscope -20 MHz

1425 - T125 24.01.1991 79,950.50

S. No.

Equipment Purchase


2 Spectrum Analyzer -1800 MHz 2418 04.11.1995 1,40,400.00

33 KVA AQUA Power UPS system

AQUA 17.12.1997 72,000.00

4 Computer System – 3 NosNexus Pentium 200 MMX

19.02.1998 2,24,400.00

4 Antenna System Trainer Supreme AST-I 13.05.2000 1,07,889.60

5 Multimedia Projector Philips Hopper SV-20 12.07.2000 2,59,080.00

6 Computer System – 5NosIBM 6578 Pentium III @866 MHz

18.09.2000 2,80,000.00

7 IBM System IBM 18.09.2001 62,576.00

8 Fiber Optic System III Falcon 08.07.2002 2,41,920.00

10 KVA 3 phase input – single phase output online UPS

Numeric 16.10.2002 1,30,000.00

9Antenna Training System & Software

FALCON ATS-2001 31.01.2003 1,81,170.00

10MATLAB range of software Release 13.5 - user license

Software 31.01.2004 3,27,650.00

11Multisim Education Ver.7 -3 user license

Software 31.03.2004 98,990.00

12Transmission Line Trainer & Analyzer

FALCON TLA-03-1 03.07.2004 67,013.00

13RF Circuit Design Trainers (1GHz)- 1 set of 4 kits

ETEK 23.08.2004 2,08,139.50

14 RF Source (1GHz)- 2 Nos FALCON RFS-01 07.09.2004 1,14,880.50

15Fiber link E - Fiber optic trainer kit based on laser diode & glass fiber

FALCON 08.09.2004 76,860.00

16 1.5 GHz Spectrum Analyzer AGILENT E4411B 05.10.2004 4,51,894.25

17MATHCAD & VISSIM PE Software

Software 16.04.2005 1,70,000.00

18 J Band Microwave Test Bench Vidyut Yantra Udyog 28.04.2005 80,784.00

19Digital Storage Oscilloscope 0-60 MHz

Agilent – DSO 3062A 30.03.2006 75,887.00

20 10 KVA UPS – 1 No. Numeric 29.09.2005 1,32,000.00

21HCL infinity Global line server (2 Nos)

HCL 25.10.2005 1,79,700.00

22 Experimental OTDRBenchmark OFS A Lite 3

12.09.2006 3,73,244.40

23 LCD Projector NEC VT37 13.02.2006 54,500.00

24 10 KVA UPS – 1 No. Numeric 09.10.2006 1,32,500.00

S. No.

Equipment Purchase


25HCL Infiniti Global Line Xeon Server – 1 No.

HCL 30.09.2006 1,00,000.00

26Orcad Capture with Orcad PSpice A/D (Ver.15.7 - 5 user license)

Software 07.02.2007 3,35,608.00

27 Network Lab System Nil 16.03.2007 4,77,000.00

27 GPS Trainer Kit Scientech 23.04.2007 50,625.00

28Microwave X band Test Bench (4 Nos)

Vidyut Yantra Udyog11.03.198926.09.2006

2,17,540.00

29 10KVA UPS Numeric 19.05.2008 1,53,000.00

11. Declaration and attestation:

We certify that all the details declared here are correct and complete.

1. Signature of PI Date:

2. Signature of Co-Is Date:

(a) Date:

(b) Date:

(c) Date:

(d) Date:

12. Certificate of the heads of the department and institution:

We have read the terms and conditions of the CSIR Extramural Research Grant Scheme. The necessary institutional facilities are available and will be provided for the implementation of this research proposal being submitted to the CSIR for funding. Full account of expenditure will be rendered by the institution yearly.

Dr.V.Vijayarangan Dr.P.Subburaj

Name of the Head of the Department Name of the Head of the Institution

Signature with date Signature with date

Seal Seal

PART B

DETAILED RESEARCH PROPOSAL

13. Title of the project:


14. Aims and significance of the project:

Aim of the project: To develop VLSI architecture for MIMO-OFDM-IDMA wireless

communication system, which is a potential candidate for high data rate wireless networks.

International Status of MIMO-IDMA System

Interleave Division Multiple Access (IDMA), Orthogonal Frequency Division Multiple

Access and Multiple Input Multiple Output (MIMO) are the hot research topic in 4G wireless

communication systems. 4G promises improved spectral usage, better functionality with lower

service costs. In addition to high data rates, it offers high QoS than the current wireless systems.

This level of QoS requires more flexible and adaptive systems.

D.Molteni et al proposed an analytical frame work for the performance assessment of

MIMO-OFDMA systems over correlated fading channels using coordinated and randomized

multi user strategies for interference mitigation [1] in practical standards 3GPP LTE and

WiMAX IEEE 802.16 d-e[1]. Pierluigi Salvo Rossi proposed joint iterative channel estimation

and multi user detection for MIMO-OFDM system for throughput performance assessment

under different multiple access schemes[2] and has suggested Space Division multiple access

(SDMA) for large size constellations with interfering users in high SNR range. Cao-Wang

Huang et al proposed a novel message passing based MIMO-OFDM data detector with a

progressive parallel ICI canceller [3] based on factor graph analysis with perfect and imperfect

channel estimations.






D.Molteni et al proposed an analytical frame work for the performance assessment of MIMO-

OFDMA systems over correlated fading channels using coordinated and randomized multi user

strategies for interference mitigation [1] in practical standards 3GPP LTE and WiMAX IEEE

802.16 d-e[1]. Pierluigi Salvo Rossi proposed joint iterative channel estimation and multi user

detection for MIMO-OFDM system for throughput performance assessment under different

multiple access schemes[2] and has suggested Space Division multiple access (SDMA) for

large size constellations with interfering users in high SNR range. Zhi Quan suggested FPGA

implementation of CDMA Multi user detector [3] using Dichotomous Coordinate Descent

(DCD) based algorithm and analyzed the Bit Error Rate performance with 50 users. Quoc-Thai

Ho et al presented dedicated architecture can be used as an intellectual property(IP) core

processing an MUD function in the system on programmable chip (SOPC) of UMTS systems

using Virtex II and Virtex II Pro families of Xilinx as targted PGA components.

In abroad, the MIMO concept is employed in Wireless LAN [1]. Power optimization is

carried out for simple IDMA system [2], [3] with different target BER constraints in wireless

communication systems. Simple MIMO Backhaul link is deployed in projects for the

government and Internet service providers. So far no work has been carried out for the FPGA

implementation of MIMO-IDMA with power optimization techniques.

National Status

K.S.Visvaksenan et al has proposed FPGA implementation of Turbo decoder for IDMA

scheme and presented the synthesis results for hardware area and speed complexities. In India,

research work is going on in the simulation of IDMA with and without MIMO and IDMA with

power optimization and without power optimization. The system with 3G technologies in

wireless communication has been recently installed and tested and the wireless communication

using 4G technologies is still in research level not yet been practically implemented. No work

has been carried out so far in the FPGA implementation of MIMO-IDMA system in wireless

communication.

Significance of the project

With the increasing importance of multi user communication systems one of the main

issues is to satisfy the different user’s rate under multi user interference. This problem can solved

using proper power allocation.

At present CDMA technology is being used in latest mobile instruments, as the

interference effect is less. However, Multiple Access Interference (MAI) increases with increase

in number of users. Hence CDMA system is capacity limited. In the future, the number of users

may increase, consequently the MAI will be more and hence the there will be system

performance degradation.Moreover, bandwidth of CDMA system increases with increase in

number of users.

The above-mentioned limitations in CDMA System are overcome in MIMO–IDMA

System. Always there is a demand for faster data transfer and increase in capacity in the uplink

multiple access system. The ever-increasing appetite for capacity and data rates has motivated

the emergence of new Multi User Detection techniques and multiple access schemes in wireless

communication.

Interleave Division Multiple Access (IDMA) is a promising air interface for future

wireless networks and it has recently been proposed as an alternative to Code Division Multiple

Access (CDMA). IDMA employs user-specific interleavers combined with low-rate channel

coding for user separation [4], [5]. It can outperform coded CDMA when iterative receivers are

used, and it allows the design of multiuser detectors with moderate complexity. Due to

similarities with CDMA, IDMA can also be seen as a special case of CDMA. Therefore it

inherits the same advantages against multipath fading and ISI. Chip level interleaving further

enhances the performance of IDMA and its complexity per chip per iteration is greatly reduced

and it is independent of the number of users.

MIMO system utilizes space multiplex by using array of antennas for enhancing the

efficiency. MIMO uses multiple inputs multiple outputs from single channel. MIMO describes

the ways to send the data from multiple users on the same frequency/ time channel using

multiple antennas at the transmitter and receiver. The system allows multiple users to send their

data from their transmitters with multiple antennas. The data is received in the form of MIMO

channel Matrix. MIMO system is used in many applications like WiMax, WiFi, WLANs, and

many more signal processing applications in cellular mobile communications.

Incorporating IDMA with MIMO (MIMO-IDMA) provides tremendous improvement in

spectral efficiency in both flat fading and frequency-selective MIMO channels [6]. MIMO-

IDMA systems are particularly attractive because they do not require any additional transmission

bandwidth, and unlike the traditional systems use multi-path interference to their benefit.

The entire MIMO-IDMA system with power optimization is depicted in the following

figure.

Base station /Receiver

. . .

.

Figure. Block Diagram of MIMO-IDMA System

Multi user detection is a promising way to enhance the capacity and performance of

MIMO-IDMA system. The turbo type iterative multi user detection is employed in the receiver.

The performance of the proposed MIMO-IDMA system is assessed through simulation results.

Transmitter K / User K

Encoder Interleaver K BPSK

KP

Transmitter 2 / User 2

Encoder Interleaver 2 BPSK

2P


Encoder Interleaver 1

BPSK

1P

1d

2d

Kd

SOFT

MUD

De-Interleaver 1

Decoder

Interleaver 1

De-Interleaver 2

Interleaver2

Decoder

De-Interleaver K

Interleaver K

Decoder

1d̂

2d̂

Kd̂

Power optimization [7], [8] is required for the MIMO–IDMA when the system is heavily

loaded. The proposed work introduces an optimization of the received power profile for iterative

multi user detection in MIMO-IDMA systems.

Formulation of power allocation problem:

The optimization problem can be formulated as follows: Given a bit error rate (BER),

there is a corresponding variance at the decoder ( ) and we need to find the set , where

that minimizes the sum , while satisfying the constraint , where

is obtained by, , where q = 1…Q.

Q represents the number of iterations.

In our work, the power optimization can also be achieved in the following way:

i) For Kth user, power to be allocated per antenna is decided after analyzing the channel

conditions through channel estimation.

ii) In the transmitter side, power is allocated to each user as and when required. i.e., unequal

power distribution .

It is proposed to solve the power allocation problem in MIMO–IDMA system using an

Evolutionary Optimization algorithm. Optimized power allocation is an important means to

increase the supportable load as it enhances the convergence behavior of the detector.

Furthermore any additional constraint regarding the realistic modeling of communication

systems can be implemented easily. In this work different bit error rate constraints are considered

and also the maximum number of iterations are taken into account. Computational complexity

can be reduced while maintaining the optimized power profile.

Differential Evolution (DE) is a global optimization algorithm, has good convergence

properties as it converges to the global minimum in consecutive independent trials [2]. But we

propose Covariance Matrix Adaptation Evolution Strategies (CMAES) algorithm, which still

converge faster than DE algorithm for power optimization.

FPGA implementation of Dichotomous Coordinate Decent (DCD) based CDMA multi

user detection is carried out in [9]. Design and FPGA implementation of Channel Estimation

method and Modulation Technique for MIMO system is discussed in [10]. Our proposed work

presents power optimization in MIMO–IDMA wireless communication system and

implementation using FPGA. In this work, an optimized model is designed using MATLAB to

derive the required specification such as power level, BER etc., MIMO-IDMA model can be

developed using Verilog and synthesized. The VHDL code for MIMO- IDMA system can be

simulated and synthesized for area, power, speed and implemented on Virtex2Pro FPGA. The

performance of each stage such as Transmitter, MIMO Channel and Receiver are verified using

logic analyzer and Mixed Signal Oscilloscope. Finally, the performance of entire FPGA

implemented optimized MIMO-IDMA system can be validated against MATLAB.

15. Plan of work, methods and techniques to be used

To apply Evolutionary Computation algorithm for solving the power allocation problem

for interference cancellation in the MIMO–IDMA wireless communication system with

multi user detection (MUD). The following steps are involved in the optimization

problem.

- Formulation of the optimization problem

- Finding appropriate evolutionary optimization algorithm (Differential

Algorithm/Particle Swarm Optimization etc.,)

- Considering constraints such as maximum number of iterations, individual power

constraints, etc.,

- Obtaining optimized power profiles to individual users.

- Performance evaluation of MIMO-IDMA system with power optimization

algorithm using MATLAB

FPGA implementation of power optimized MIMO-IDMA system in multi user detection

scenario.

- Design and implementation of power optimized MIMO-IDMA on Virtex5Pro

FPGA board

- Testing output at each and every stage using logic analyzer and Mixed Signal

Oscilloscope.

Validate the results of the above system against MATLAB Simulation.

Investigate detection performance in terms of Bit Error Rate with and without

optimization algorithm.

16. Time-table or milestones

(Methodology and Year wise planning of the Project)

T0 = Date on which the project fund is to be received

Year wise planning of the Project

S.No Activity Block Time Required

1 Literature survey and intensive discussion with experts in

the related areas

T0 + 2 months

2 Performance Evaluation of Multiple Input Multiple Output-Interleave Division Multiple Access (MIMO – IDMA) system using MATLAB simulation

T0 + 6 months

3 Identify the parameters such as power and number of

antennas to be optimized to improve the system

performance

T0 + 7 months

4 Applying appropriate evolutionary optimization technique

for MIMO – IDMA system

T0 + 10 months

5 Study of Virtex 5 Pro FPGA kit T0 + 12 months

6 Implementation of transmitter module of MIMO –IDMA

in FPGA

T0 + 18 months

7 Implementation of MIMO channel model in FPGA T0 + 24 months

8 Implementation of Receiver module of MIMO –IDMA in

FPGA

T0 + 30 months

9 Performance Evaluation of entire MIMO – IDMA system

in FPGA and validate against MATLAB

T0 + 33 months

10 Preparation and submission of complete project report T0 + 36 months

TOTAL PERIOD: THREE YEARS

Methodology

START

Architecture and algorithm definition using Literature Survey

Identification and device specification

Are they right specifications?

Matlab Simulation

No

Hardware Design

RTL Code

RTL Simulation

Synthesis and FPGA protyping

Timing Analysis

Backend (Physical Designing)

STOP

YesInputs of the design

Hardware Design

17. Deliverables:

At the end of the project, the hardware with power optimized MIMO-IDMA system

along with VHDL coding will be delivered and also the report with the simulation results will be

submitted, which shall have the details regarding:

1) Objective of the project

2) Design and simulation of the proposed MIMO-IDMA system using MATLAB

without and with optimization techniques

3) Performance analysis of the proposed system with existing methods

4) Design and implementation of Hardware of the proposed system in Virtex2Pro FPGA

using Xilinx software

5) Evaluation of FPGA implemented MIMO-IDMA system in terms of block wise

device utilization

6) Timing report

7) Results and Conclusions

18. Justification of Budget:

In order to implement the MIMO-IDMA system in FPGA board, we require Virtex5Pro

FPGA Development board and Virtex5Pro FPGA Evaluation board. The propagation delay

involved in processing the signal inside the Virtex5Pro FPGA is very less and hence the

operating speed is very high. Implementing the system in FPGA reduces the cost and time. To

evaluate the performance of each stage in the system and also to visualize the waveforms in each

stage, we need to have a Logic Analyzer, Mixed Signal Oscilloscope (MSO) and a higher end

PC. In order to complete the project successfully, we need to have the above-mentioned

equipments.

19. If the project has any industrial significance, give names and addresses of 3 industries that

may be interested in the project.

1. M/s BenchmarkBenchmark Electronic Systems Pvt.Ltd.,Plot # 58, Electrical & Electronics Indl.EstatePerungudi, Chennai-600 096.

2. M/s Vi Microsystems Pvt.Ltd.,Plot.No. 75, Electronics Estate,Perungudi, Chennai-600 096.

3. SANDS Instrumentation Pvt.Ltd., 96,4th Avenue, Ashok nagar, Chennai -87

20. If sponsored by CSIR Laboratory please give detail of technical performance that will be

carried out at the CSIR laboratory and name, date of birth & designation of the CSIR scientist

collaborating and recommendation letter from the Director of collaborating laboratory.

Not Applicable

21. If applicable, indicate any link with ongoing projects of the sponsoring CSIR laboratory.

22. List not more than 25 of your publications with full bibliographic details/reports/patents or

other documents in the last 10 years

Please refer Annexure - II

ANNEXURE – I

Aim and significance of the project

Title of the project:


Aim of the project: To develop VLSI architecture for MIMO-OFDM-IDMA wireless

communication system, which is a potential candidate for high data rate wireless applications.

International Status of MIMO-IDMA System






D.Molteni et al proposed an analytical frame work for the performance assessment of

MIMO-OFDMA systems over correlated fading channels using coordinated and randomized

multi user strategies for interference mitigation in practical standards 3GPP LTE and WiMAX

IEEE 802.16 d-e[1]. Pierluigi Salvo Rossi proposed joint iterative channel estimation and multi

user detection for MIMO-OFDM system for throughput performance assessment under

different multiple access schemes [2] and has suggested Space Division multiple access (SDMA)

for large size constellations with interfering users in high SNR range. Zhi Quan suggested FPGA

implementation of CDMA Multi user detector [3] using Dichotomous Coordinate Descent

(DCD) based algorithm and analyzed the Bit Error Rate performance with 50 users. Quoc-Thai

Ho et al presented dedicated architecture can be used as an intellectual property(IP) core

processing an MUD function in the system on programmable chip (SOPC) of UMTS systems

using Virtex II and Virtex II Pro families of Xilinx as targted FPGA components [4]for

WCDMA systems. Quoc-Thai Ho , Daniel Massicotte, proposed implementation of Multi User

Detection based on cascade filters for Wideband CDMA system[5]. Quoc-Thai Ho ,Daniel

Massicotte also proposed FPGA implementation of Adaptive Multi User Detector for DS-

CDMA systems [6] and has developed architectures, can be used as optimized cores to

implement MUD function in a SoC. In [7], M.Wenk et al proposed hardware platform and

implementation of a real time multi user MIMO-OFDM Testbed and suggested that hardware

platform can be extended with bi directional communication facilities and a basic media access

control (MAC) layer equipped with Ethernet connectivity. Yang Lan et al proposed an 8 x 8

FPGA based MIMO-OFDM Real Time Transmission Testbed using Orthogonal grouping-based

near optimal detection algorithm (OGNO) [8] and presented their experimental results with

different number of subcarriers and demonstrated that the whole power dissipation ranges from

641 to 960 mW depending on OFDM subcarriers. In [9], Shau-Yu Cheng et al proposed Channel

estimator and aliasing canceller for Equalizing and decoding Non-cyclic prefixed single carrier

block transmission via MIMO-OFDM modem to support multimode and backward compatibility

under an acceptable complexity in IEEE 802.11 very high throughput. Chao-Wang Huang et al

proposed a novel message passing based MIMO-OFDM data detector with a progressive parallel

ICI canceller [10] and proposed an algorithm for very high speed detector/decoder. In [11],

Shingo Yoshizawa et al proposed VLSI architecture of a 4 X 4 MIMO-OFDM transceiver for

over 1-Gbps data transmission for forth coming Wireless LAN systems and they have

implemented transceiver with 6.6 to 8.7 millions in logic gates and consumes 641 to 960 mW in

power dissipation.

National Status of MIMO-OFDM-IDMA system

In India, the system with 3G technologies in wireless communication has been recently

installed and tested and the wireless communication using 4G technologies is still in research

level. Prabagarane Nagaradjane et al proposed MIMO Multi Carrier Interleae Division Multiple

Access System with Multi user detection and suggested VBLAST/LLSE/MAP detector for

MC/IDMA system [12].K.S.Vishvaksenan et al proposed FPGA implementation of Turbo

decoder for IDMA scheme and suggested different architecture for SISO block of turbo decoder.

M.Shukla et al proposed VHDL architecture of orthogonal interleavers for the IDMA [3].

Sudhakar Reddy.P, Ramachandra Reddy.G, proposed VLSI architecture for Channel Estimation

and Modulation for MIMO system[4].

Significance of the project

With the increasing importance of multi user communication systems one of the main

issues is to satisfy the different user’s rate under multi user interference. This problem can solved

using proper power allocation.

At present CDMA technology is being used in latest mobile instruments, as the

interference effect is less. However, Multiple Access Interference (MAI) increases with increase

in number of users. Hence CDMA system is capacity limited. In the future, the number of users

may increase, consequently the MAI will be more and hence the there will be system

performance degradation.Moreover, bandwidth of CDMA system increases with increase in

number of users.

The above-mentioned limitations in CDMA System are overcome in MIMO–IDMA

System. Always there is a demand for faster data transfer and increase in capacity in the uplink

multiple access system. The ever-increasing appetite for capacity and data rates has motivated

the emergence of new Multi User Detection techniques and multiple access schemes in wireless

communication.

Interleave Division Multiple Access (IDMA) is a promising air interface for future

wireless networks and it has recently been proposed as an alternative to Code Division Multiple

Access (CDMA). IDMA employs user-specific interleavers combined with low-rate channel

coding for user separation [4], [5]. It can outperform coded CDMA when iterative receivers are

used, and it allows the design of multiuser detectors with moderate complexity. Due to

similarities with CDMA, IDMA can also be seen as a special case of CDMA. Therefore it

inherits the same advantages against multipath fading and ISI. Chip level interleaving further

enhances the performance of IDMA and its complexity per chip per iteration is greatly reduced

and it is independent of the number of users.

MIMO system utilizes space multiplex by using array of antennas for enhancing the

efficiency. MIMO uses multiple inputs multiple outputs from single channel. MIMO describes

the ways to send the data from multiple users on the same frequency/ time channel using

multiple antennas at the transmitter and receiver. The system allows multiple users to send their

data from their transmitters with multiple antennas. The data is received in the form of MIMO

channel Matrix. MIMO system is used in many applications like WiMax, WiFi, WLANs, and

many more signal processing applications in cellular mobile communications.

Incorporating IDMA with MIMO (MIMO-IDMA) provides tremendous improvement in

spectral efficiency in both flat fading and frequency-selective MIMO channels [6]. MIMO-

IDMA systems are particularly attractive because they do not require any additional transmission

bandwidth, and unlike the traditional systems use multi-path interference to their benefit.

The entire MIMO-IDMA system with power optimization is depicted in the following

figure.

Base station /Receiver

. . .

.

Figure. Block Diagram of MIMO-IDMA System

Multi user detection is a promising way to enhance the capacity and performance of

MIMO-IDMA system. The turbo type iterative multi user detection is employed in the receiver.

The performance of the proposed MIMO-IDMA system is assessed through simulation results.

Power optimization [7], [8] is required for the MIMO–IDMA when the system is heavily

loaded. The proposed work introduces an optimization of the received power profile for iterative

multi user detection in MIMO-IDMA systems.

Transmitter K / User K

Encoder Interleaver K BPSK

KP


Encoder Interleaver 2 BPSK

2P


Encoder Interleaver 1

BPSK

1P

1d

2d

Kd

SOFT

MUD

De-Interleaver 1

Decoder

Interleaver 1

De-Interleaver 2

Interleaver2

Decoder

De-Interleaver K

Interleaver K

Decoder

1d̂

2d̂

Kd̂

Formulation of power allocation problem:

The optimization problem can be formulated as follows: Given a bit error rate (BER),

there is a corresponding variance at the decoder ( ) and we need to find the set , where

that minimizes the sum , while satisfying the constraint , where

is obtained by, , where q = 1…Q.

Q represents the number of iterations.

In our work, the power optimization can also be achieved in the following way:

ii) For Kth user, power to be allocated per antenna is decided after analyzing the channel

conditions through channel estimation.

ii) In the transmitter side, power is allocated to each user as and when required. i.e., unequal

power distribution .

It is proposed to solve the power allocation problem in MIMO–IDMA system using an

Evolutionary Optimization algorithm. Optimized power allocation is an important means to

increase the supportable load as it enhances the convergence behavior of the detector.

Furthermore any additional constraint regarding the realistic modeling of communication

systems can be implemented easily. In this work different bit error rate constraints are considered

and also the maximum number of iterations are taken into account. Computational complexity

can be reduced while maintaining the optimized power profile.

Differential Evolution (DE) is a global optimization algorithm, has good convergence

properties as it converges to the global minimum in consecutive independent trials [2]. But we

propose Covariance Matrix Adaptation Evolution Strategies (CMAES) algorithm, which still

converge faster than DE algorithm for power optimization.

FPGA implementation of Dichotomous Coordinate Decent (DCD) based CDMA multi

user detection is carried out in [9]. Design and FPGA implementation of Channel Estimation

method and Modulation Technique for MIMO system is discussed in [10]. Our proposed work

presents power optimization in MIMO–IDMA wireless communication system and

implementation using FPGA. In this work, an optimized model is designed using MATLAB to

derive the required specification such as power level, BER etc., MIMO-IDMA model can be

developed using Verilog and synthesized. The VHDL code for MIMO- IDMA system can be

simulated and synthesized for area, power, speed and implemented on Virtex2Pro FPGA. The

performance of each stage such as Transmitter, MIMO Channel and Receiver are verified using

logic analyzer and Mixed Signal Oscilloscope. Finally, the performance of entire FPGA

implemented optimized MIMO-IDMA system can be validated against MATLAB.

ReferencesInternational Status

[1] D.Molteni,M.Nicoli and U.Spagnolini “Performance of MIMO-OFDMA Systems in

correlated fading channels and non-stationary interference” IEEE Transactions on Wireless

communications,Vol.10,No.5,pp 1480-1494,May 2011.

[2] Pierluigi Salvo Rossi “On throughput of MIMO-OFDM systems with joint iterative

channel estimations and multi user detection under different multiple access schemes”,

IEEE Communication Letters,2011.

[3] Zhi Quan, Jie Liu, Yuriy Zakharov, “ FPGA Implementation of DCD based CDMA multi

user detector,” IEEE Intl conf. Digtal Signal Processing, pp.319-322, July 2007.

[4] Quoc-Thai Ho ,Daniel Massicotte, Adel-Omar Dahmane, “Implementation of MUD based

on cascade filters for WCDMA system” ,Eurasip journal on Applied Signal Processing,

2006

[5] Quoc-Thai Ho ,Daniel Massicotte, “FPGA implementation of Adaptive Multi User

Detector for DS-CDMA systems,” Springer proceedings,Vol 3203,pp.959-964,2004.

[6] M.Wenk,P.Luethi,T.Koch, “Hardware platform and Implementation of a Real time multi

user MIMO-OFDM Testbed,”

[7]

[8] Hsin-Lei Lin, Chia-Chen Hsu, Robert C. Chang, “Implementation Of Synchronization

For 2x2 MIMO WLAN Systems”, Intl. Conf. on consumer Electronics, pp295-296, Jan

2006.

[9] Remi Tassiing, Guangxi and Yongli Yang, “Power optimization in IDMA with SNR and

Differential Evolutions”, IEEE WiCOM ‘08, pp.1-5, Oct.2008

[10] Petra Weitkemper, Karl-Dirk Kammeyer, “Power Optimization of IDMA systems with

Different Target BER Constraints”, IEEE VTC’07, pp.2812-2816, April 2007.

[11] Li Ping, “Interleave-Division Multiple Access and chip-by-chip Iterative multi user

detection”, IEEE Commun. Magazine, vol.43, no.6, pp.s19- s23, June 2005.

[12] Li Ping, Lhai Liu, K.Y.Wu, and W.K.Leung, “ Interleave-Division Multiple-

Access” ,IEEE Trans.Wireless Commun.,vol.5,no.4, pp. 938-947, April 2006.

[13] Clemens Novak, Franz Hlawatsch, and Gerald Matz, “MIMO - IDMA: Uplink multiuser

MIMO communications using interleave division multiple access and low-complexity

iterative receivers”, IEEE Proc. ICASSP, vol.3, pp.225-228, April 2007.

[14] Peng Wang, Li Ping and Lihai Liu, “Optimized power allocation for multiple access

systems with practical coding and iterative multi user detection”, April 2006.

[15] Peng Wang, Li Ping and Lihai Liu, “Power allocation for multiple access systems with

practical coding and iterative multi user detection,” IEEE Proc. ICC 2006.

National Status

[] Prabagarane Nagaradjane,Sai N.Chandrasekaran,K.S.Visvaksenan, “ MIMO Multi

Carrier Interleave Division Multiple Access System with Multi user detection:

Performance results”, Int.J.Communications, Network and System Sciences,vol.3,pp

413-417,2010.

[] K.S.Visvaksenan R.Sshasayanan and D.V.Hariprasad “FPGA implementation of

Turbo Decoder for IDMA scheme”, Research journal of Information

Technology, vol.2, No.3, pp.104-113,2011

[] M.Shukla, “VHDL architecture of orthogonal interleavers for the IDMA”,

[] Sudhakar Reddy.P, Ramachandra Reddy.G, “Design and FPGA implementation of

Channel Estimation Method and Modulation Technique for MIMO system,”

European Journal of Scientific Research, vol.25, no.2, pp.257-265, 2009.

[] Kirubanandha Sarathy.N, Karthikeyan .K,Thirunadanasikamani.K, “VLSI design of

mixed radix FFT processor for MIMO-OFDM in wireless communications”, IEEE

ICCCT’10, pp.98-102,Oct 2010.

ANNEXURE – II

List of Publications of the Investigators

S.TAMIL SELVI

1. S.Tamil Selvi, S.Ananthakumaran, K.Ramar, “Multi-User Detection in DS-CDMA System using Parallel Interference Cancellation with Feedback Technique”, AMSE International Journal, vol.13, no.2, pp.1-14, Feb 2008.

2. S.Tamil Selvi, K.Ramar, “Performance evaluation of multi user detection for uplink wireless communications with various multiple access schemes " International journal of Applied Information and Technology, vol.5,no.6,pp.724-730, June 2009.

3. S.Tamil Selvi, S.Jeyapaul murugan , K.Ramar, “ Perfromance evaluation of IDMA System with Efficient Channel coding ”, International symposium on Management Engineering, china , August 2009.

4. S.Tamil Selvi, K.Ramar, “Routing in high speed Network:A survey and a proposal” atNational Conference , PSG Technology, Coimbatore , Feb. 2003.

5. D.Sankaraeswaran, S.Tamil Selvi, “Parallel Interference Cancellation for Multi-user Detection using Interleave Division Multiple Access”, National Conference on Recent Trends in Information Technology, Kamaraj College of Engineering, Virudhunagar, April 2006.

6. Poornima Packiaraj, S.Tamil Selvi, “Performance evaluation of MUD schemes for DS-CDMA System” National Conference on Signals, Systems and Communication, Anna University, Chennai, June 2006.

7. Linda Rufus, S.Tamil Selvi, “New Chip Interleaved Turbo Codes for DS-CDMA in a Frequency Selective Rayleigh Fading Channel” National Conference on Recent Trends in Communication Techniques, Noorul Islam College of Engineering, Kumarakoil, April 2006.

8. D.Avelin Sarah, S.Tamil Selvi, “Multi user detection in IDMA System using Reduced Rank Matrix Wiener filter”, National Conference VISION’07 on High Performance Computing, at Government College of Engineering, Tirunelveli, April 2007

9. Jesinda Janet ,S.Tamil Selvi, “Performance Evaluation of MC–IDMA using PIC with feedback in wireless communication”, National Conference at Noorul Islam College of Engineering, Thuckalai, March 2008.

10. S.Ananthi, S.Tamil Selvi “Multi user detection in OFDM – SDMA system”, National Conference, Noorul Islam College of Engineering, Thuckalai, March 2008.

11. S.Sankar Ganesh, S.Tamil Selvi, “ Multi user detection in Multi carrier IDMA system”, National Conference, PET Engineering College, Valliyur, March 2008.

12. S.Lakshmi, S.Tamil Selvi, “Reduced complexity sequential multi user detection for OFDM/SDMA system”, National conference, Government college of Engineering, Tirunelveli April 2009.

13. Geetha Priyadharshini, S.Tamil Selvi, “MIMO communications of IDMA using Alamouti codes”,Nationalconference, Allagappa Chettiar college of Engineering, Karaikudi , April 2009.

14. S.Lakshmi, S.Tamil Selvi , “ Sequential Multi user detection using M-Algorithm for OFDM/SDMA System” National conference NCMOC 2009, Alagappa Chettiar college of Engineering, Karaikudi April 2009.

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