Chip packaging techniques

By GANESH PChip Packaging TechniquescontentsPackage overviewThrough-hole packageSurface mount packageChip scale packageWafer level chip scale packageAdvantages of WL-CSPPACKAGE OVERVIEWDevelopment of IC package is a dynamic technology.From mobile telecommunication to automotive applications each imposes its own demands on electronic package.To meet such diverse range of requirements, IC package range encompasses over 30 different types.An overview of this range is shown in figure1.

THROUGH-HOLE MOUNT PACKAGELeads on the components are inserted into holes (PTH-Plated Through Hole) drilled in PCB and soldered to pads on the opposite side.Provides strong mechanical bond.The additional drilling required makes the boards more expensive to produce.These techniques are now usually reserved for bulkier components such as electrolytic capacitors, that requires the additional mounting strength.

Surface mount packageComponents are mounted directly onto the surface of PCB.It has largely replaced the through-hole technique.SMT component is smaller than through-hole counterpart because it may have short pins or leads or various styles, flat contacts, a matrix of solder balls(BGAs).Fewer holes need to be drilled through abrasive boards.Components can be placed on both sides of circuit board.Lower resistance and inductance at the connection.Manufacturing processes much more sophisticated than through-hole boards.SMDs solder connections may be damaged by potting compounds going through thermal cycling.SMDs cant be used directly with breadboard.

CHIP SCALE PACKAGEThis type have many forms Flip-Chip, Wire-Bonded, Ball Grid Array, leaded etc.,Wire-Bonded BGABGA-ball grid arrayArray of balls aligned to grids.Bond pads from top level layout padring are stitched to external pad frame with Gold Bond Wires.Pins are connected to balls through conductor traces on interpose substrate.

Flip-chip bgaChip/die is flipped, bond pads in padring layout are connected to external ball grid array via conductor traces on layered substrate.During packaging solder bumps are formed on bond pads which align and make contacts with conductor traces when flipped.This technique connects die bond pads to a package substrate without using wire bonds.The bumped die is placed on the package substrate where the bumps connect to the package pins/balls.

Wafer level chip-scale packageAllows direct connection without wires, to a printed circuit board by inverting the die and connecting by solder balls .Building up the package interconnect structure directly on the silicon circuit substrate.A dielectric re-passivation polymer film is applied over the active wafer surface.This film provides both mechanical stress relief for the ball attachment and electric isolation on the die surface.ADVANTAGES:Small package size, minimized IC to PCB inductance and shortened manufacture cycle time.Light weight and thinner package due to absent of lead frame and moulding compound.

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