FABRICATION OF MICROELECTRONIC DEVICES

CHAPTER 5

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LEARNING OUTCOMES

After completing the unit, students should be able to:

1. Define IC.

2. Arrange the fabrication sequence of IC.

3. Explain silicon, wafer preparation and film deposition process

4. Discuss oxidation, lithography, etching, diffusion and ion implantation, metallization and testing, bonding and packaging and theirs purpose.

5. Explain yield and reliability.

 

A collection of electronic devices such as transistors, diodes, and resistors that have been fabricated and electrically intra-connected onto a small flat chip of semiconductor material.

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WHAT IS IC?

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ADVANTAGES OF IC’s1) Small size:

As fabrication technology becomes more advanced, the size of devices decreases.

Consequently, more components can be put onto a chip (a small piece of semiconducting material on which the circuit is fabricated).

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ADVANTAGES OF IC’s2) Cost:

Mass processing and process automation have helped to reduce the cost of each completed circuit.

The components fabricated diodes, resistors, and capacitors.

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CHIPS………………………

Sizes that range from 3 mm X 3 mm to more than 50mm X 50 mm

New technology allows densities the range of 10 million devices per chip

The magnitude of integration has been termed Very Large Scale Integration (VLSI)

Some of the most advanced ICs may contain more than 100 million devices

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Clean Rooms…….

Because of the minute scale of microelectronic devices, all fabrication must take place in an extremely clean environment

Allowed to have a maximum number of 0.5-µm particles per cubic foot

Most modern clean rooms are class 1 (one particle per cubic foot) to class 10 (ten particles per cubic foot) facilities

Page 8General Fabrication Sequences for Integrated Circuits

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SEMICONDUCTORS & SILICON

Have electrical properties that lie between those of conductors and insulators

Exhibit resistivities between 10-3Ω-cm and 108Ω-cm

Become the foundation for electronic devices because their electrical properties can be altered when controlled amounts of selected impurity atoms are added to their crystal structures

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IMPURITY ATOMS…..

Known as DOPANTS.

Either one more valence electron (n-type or negative dopant) or one less valence electron (p-type or positive dopant) than the atoms in the semiconductor lattice.

n – type: donor (extra one valence electron) / group V (phosphorous)

p – type: acceptor (less one valence electron) / group III (boron)

For silicon, which is a group IV element, typical n-type and p-type dopants include phosphorus (group V) and boron (group III) 

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SILICON ADVANTAGES vs. GERMANIUM

Larger energy gap (1.1 eV)

Allows silicon-based devices to operate at temperatures about 150°C

Oxide (silicon dioxide) is an excellent insulator and can be used for both isolation and passivation purposes

Small energy gap (0.66 eV)

allows Germanium to operate at temperatures about 100°C).

Germanium oxide is water soluble and unsuitable for electronic devices.

 

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GALLIUM ARSENIDE ADVANTAGES vs. SILICON

Ability to emit light

Allowing fabrication of devices such as lasers and light-emitting diodes (LEDs)

Larger energy gap (1.43 eV)

Higher maximum operating temperature (about 200 °C).

Higher operating speeds

Energy gap (1.1 eV)

Operate at temperatures about 150°C

Lower operating speeds

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However…..GALLIUM ARSENIDE disADVANTAGES

Higher cost

Greater processing complications

The difficulty of growing high-quality oxide layers

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SILICON

PURIFICATION

STEPs

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CZOCHRALSKI PROCESS

The most widely used crystal-growing method in the

semiconductor industry.

In which a single crystal ingot, called a boule, is pulled upward from a pool of molten silicon.

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The Czochralski process for growing single-crystal ingots of silicon: (a)initial setup prior to start of crystal pulling, and (b)during crystal pulling to form the boule. 

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THE PROCESS…..

1. The setup includes a furnace, a mechanical apparatus for pulling the boule, a vacuum system, and supporting controls. 2. The furnace consists of a crucible and heating system contained in a

vacuum chamber. The crucible is supported by a mechanism that permits rotation during the crystal-pulling procedure.

3. Chunks of EGS are placed in the crucible and heated to a temperature slightly above the melting point of silicon: 1410CC. 4. Heating is by induction or resistance, the latter being used for large

melt sizes. 5. The molten silicon is doped prior to boule pulling to make the crystal

either p-type or n-type.6. To initiate crystal growing, a seed crystal of silicon is dipped into the

molten pool and then withdrawn upward under carefully controlled conditions.

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THE PROCESS…..(CONT.)

7. At first the pulling rate (vertical velocity of the pulling apparatus) is relatively rapid; this causes a single crystal of silicon to solidify against the seed, forming a thin neck.

8. The velocity is then re duced, causing the neck to grow into the desired larger diameter of the boule while main taining its single crystal structure.

9. In addition to pulling rate, rotation of the crucible and other process parameters are used to control boule size.

10. Single-crystal ingots of diameter = 200 mm or greater and up to 3 m long are commonly produced for subsequent fabrication of microelectronic chips.

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Grinding operations used in shaping the silicon ingot: (a) a form of cylindrical grinding provides diameter and roundness control, and (b) a flat ground on the cylinder. 

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Wafer slicing using a diamond abrasive cut-off saw. 

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Two of the steps in wafer preparation: (a)contour grinding to round the wafer rim, and (b) surface polishing 

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SILICON-BASED INTEGRATED CIRCUITS STAGES

Silicon Processing(in which sand is

reduced to very pure silicon and then

shaped into wafers)

IC Fabrication(consisting of multiple processing

steps that add, alter, and remove thin layers in selected regions to form the electronic devices; lithography is used to define the regions to be processed

on the surface of the wafer)

IC Packaging(in which the wafer is tested, cut into individual dies (IC chips), and the dies

are encapsulated in an appropriate package)

 

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Sequence of Processing Steps in The Production of Integrated Circuits

(1)Pure silicon is formed from the molten state into an ingot and then sliced

into wafers.(2) Fabrication of integrated circuits on the wafer surface.(3) Wafer is cut into chips and packaged.

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OXIDATION

The growth of an oxide layer as a result of the reaction of oxygen with the substrate material.

The thermally grown oxides display a higher level of purity than deposited oxides because they are grown directly from the high-quality substrate.

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TYPES OF OXIDATIONDRY OXIDATION

Relatively simple process and is accomplished by elevating the substrate temperature typically to 750 -1100 °C, in an oxygen-rich environment.

As a layer of oxide forms, the oxidizing agents must be able to pass through the oxide and reach the silicon surface where the actual reaction takes place.

Thus, an oxide layer does not continue to grow on top of itself, but rather it grows from the silicon surface outward.

Some of the silicon substrate is consumed in the oxidation process.

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TYPES OF OXIDATIONDRY OXIDATION

One important effect of this consumption of silicon is the rearrangement of dopants in the substrate near the interface

As different impurities have different segregation coefficients in silicon dioxide, some dopants deplete away from the oxide interface while others pile up.

Hence, processing parameters must be adjusted to compensate for this effect.

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TYPES OF OXIDATIONWET OXIDATION

Utilizes a water-vapour atmosphere as the agent.

Affects a considerably higher growth rate than that of dry oxidation, but it suffers from a lower oxide density and therefore a lower dielectric strength.

Common practice is to combine both dry and wet oxidation methods, growing an oxide in a three-part layer: dry, wet, dry.

This approach combines the advantages of wet oxidation's much higher growth rate and dry oxidation's high quality.

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TYPES OF OXIDATIONSELECTIVE OXIDATION

Useful primarily for coating the entire silicon surface with oxide, but it can also be necessary to oxidize only certain portions of the substrate surface.

The procedure of oxidizing only certain areas is termed selective oxidation and uses silicon nitride, which inhibits the passage of oxygen and water vapour.

Thus, through the masking of certain areas with silicon nitride, the silicon under these areas remains unaffected but the uncovered areas are oxidized.

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LITHOGRAPHY

The process by which the geometric patterns that define devices are transferred from a reticle to the substrate surface.

The lithographic process is applied to each microelectronic circuit many times, each time using a different reticle to define the different areas of the working devices.

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LITHOGRAPHY (CONT.)

Pattern transfer by lithography. Note that the mask in step three can be a positive or negative image of the pattern.

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ETCHING

Process by which entire films or particular sections of films are removed and it plays an important role in the fabrication sequence.

Etching profiles resulting from (a) isotropic wet etching and (b) anisotropic dry etching.

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ION IMPLANTATION

Accomplished by accelerating the ions through a high-voltage field of as much as one million electron-volts and then choosing the desired dopant by means of a mass separator.

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METALLIZATION & TESTING

Interconnections:Made by metals that exhibit low electrical resistance and good adhesion to dielectric insulator surfaces.

Electromigration:The process by which aluminium atoms are physically moved by the impact of drifting electrons under high current conditions.

Planarization:(Producing a planar surface) of these inter-layer dielectrics is critical in the reduction of metal shorts and of the linewidth variation of the interconnect. A common method used to achieve a planar surface is a uniform oxide etches process that smoothens out the "peaks" and "valleys" of the dielectric layer. 

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Processing n-type & p-type silicon

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BONDING & PACKAGING

Schematic illustrations of different IC packages: (a)dual-in-line (DIP)(b)ceramic flat pack(c)common surface mount configuration.