ALU & CPUALU & CPUALU & CPUALU & CPU

Computer ArchitectureComputer Architecture

Introducing ALU

• ALU: Arithmetic & Logic Unit– Performs arithmetic operations

• Addition• Subtraction

– Performs logic operations• AND: A•B• OR: A+B• NOT: A

– Desired operation/result is chosen based on a selection logic.

Exercise

• Develop a circuit that accepts 3 inputs (say A, B, and Cin) and generates 2 outputs (say Out and Cout) depending on 3 control inputs S1,S2, and S3 as shown in the truth table:

S0 S1 S2 Out Cout0 0 0 A•B X

0 0 1 A+B X

0 1 0 A X

0 1 1 B X

1 0 0 AB Cin

AB+BCin+

ACin

X = Don’t care (can be 1 or 0)

Solution: 1-bit ALU

AB

Out

000

001

010

011

100

S0

S1

S2

S0S1S2A•B

A+B

A

B

Full AdderCinSum

Cout

Mul

tiple

xer

This approach can be extended to include other operations such as subtraction.

n-bit ALU

• n-bit ALU – Repeat 1-bit ALU n times– All 1-bit ALUs get the same selection lines

– Carry out (Cout)from one stage is wired to carry-in of next state

• Similar to how a ripple carry adder (or subtraction circuit) is wired

– Performs operation on n-bits simultaneously

Example 4-bit ALU

ALU3 ALU2 ALU1 ALU0

A3 B3 A2 B2 A1 B1 A0 B0

Add/SubO0O1O2O3O4

OP0OP1

OP2

Selection lines simply renamed to operation code (OPCode) lines

Cin Cin Cin Cin

ALU Notation• An ALU is denoted using the following graphical

notation.

ALU

Operand1 (A)

Operand2(B)

Result

8 8

9

Operation Selection

(OP Code)

Indicates number of bits on each line. The size of each

operand is typically the same and

corresponds to the word size.

4

OP Code Result

010 A•B

110 A+B

210 A

310 B

… …

Thought Experiment

• Where do the inputs to the ALU come from?– The two operands– The operation the ALU needs to perform

• Similarly where do the outputs from the ALU go?

• Solution: Registers!– The fundamental storage units.

• Fixed number of D-Flip Flops to form a Word– Corresponding to size of ALU operands!– Operate as a single unit

• Store/Read n-bits at a time

D Q

CK

D Q

CK

D Q

CK

D Q

CK

D0 D1 D2 D3

Q3Q2

Q1Q0

Registers Revisited

Selecting a Register

• Given n Registers how to read data from a specific register?

Register 1 008

Register 2 018

Register 3 108

Register 4 118

2

MUX

Register Select

8

Set of registers is called a Register File

This is not a single Mux but a set of 8 Mux’s all having the same selection logic!

Selecting 2 Registers

• ALU needs 2 operands to work!– How to select 2 registers from a Register File?

008

01

10

11

2

MUX1

Register Select 1

8

8

8

8

00

01

10

11

2

MUX2

Register Select 2

8

8

8

8

8

Register

File

Operand1 Operand2

ALU with Inputs

ALU

8 8

8

Operation

4Mux1

Mux2

Register

File

(4)

8

Operand1

2

Operand2

2

Results

What do we do with results or output from the

ALU?

ALU Output

• Solution: Put it into a register!

• OK, so do we do that?– That is, Given 1 input how to route it on n

different paths?

8

8

8

8

8

Result from ALU

Select Inputs2

DeM

ux

00

01

10

11

Register 1

Register 2

Register 3

Register 4

Handling ALU Output

ALU

8 8

8

Operation

4

Mux1

Mux2

Register

File

(4)

Flags

DeMux

8

8

8

8

8

Operand1

2

Operand2

2

Destination

2

A

B

Each device has its own slection logic typically specified using a truth

table!

Operation Result

010 A•B

110 A+B

210 A

Clock

Data path

• The ALU and associated components constitute the Data Path– Includes Registers, Multiplexers and any other

device associated with ALU operations– All operands are typically the same size

• Register sizes match with size of operand

– Size of operands are associated with CPU• 32-bit processor (ALU uses 32-bit operands) • 64-bit processor (ALU uses 64-bit operands)