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Application Note 23Issue 2 March 1996

Zetex SPICE Models

Neil Chadderton

Introduction

SPICE was originally developed as asimulation tool for Integrated Circuitdesign (SPICE being an acronym forSimulation Program with IntegratedCircuit Emphasis) by the University ofCalifornia in the 1970s. It was quicklyimproved into the SPICE2 version fromwhich all commercial “Spice” programsare derived. It has since been enhanced( in terms of fas ter more robustalgorithms and graphics handlingcapabilities for circuit input, and ease ofanalysing simulation output) andmarketed by a number of companies foruse within the PC environment -commercial versions being PSPICE,HSPICE, IsSPICE, SPICEAGE, Microcapetc.

Though originally intended for ICdesign, the availability of low costcomputing, and the push towards robustdesign has introduced many othercircuit and system designers to theadvantages offered by analog circuits imula t ion. This has led to therequirement for device models for theactive components under consideration,and so now many semiconductorcompanies provide appropriate lytargeted SPICE models as part of thetechnical support function.

These models can be extremely usefulwhen used as a design tool, but caremust be exercised. Any simulationsoftware text will warn against solereliance on the software’s predictions.Models are (by def ini t ion) acompromise, and are essentially basedon a device’s common features. Anappreciation of the model derivation, themodel parameters, and it’s inherentlimitations should be sought, and wouldassist in the interpretation of simulationresults and their application to the realworld.

Zetex have created SPICE models for arange of semiconductor components.Many of these models are for the higherperformance Bipolar and MOSFETtrans is tors, but models for RFtransistors, variable capacitance diodes,switching diodes and standard smallsignal parts are also available. Thesemodels are available through any Zetexsales office or agent.

Appendix A includes a printout of theintroductory text file included in version2 of the Zetex SPICE models disc. Thisfile provides some background to howthe model files are organised, and a briefoverview of the model parameters foreach type of device model.

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Understanding Model Parameters and Applications Limitations

This application note is a guide to theunderstanding and use of Zetex SPICEmodels. It includes sections on howsome of these models are derived - themeasurements/optimisation necessary,how to customise models for thosecases where a model is not available,and the limitations to be aware of.

Measurement of ModelParameters

The bipolar transistor circuit model usedby the SPICE software is a modifiedversion of the Gummel-Poon modelformulated in 1970. The schematic ofthis model is shown in Figure 1. For acomprehensive description of themodel, including physical definitions ofthe model components, please refer toAppendix B, references 1 and 2.

Figure 2 shows a typical model for aZetex bipolar transistor.

Lines beginning with an asterisk indicatea non-executable comment; so devicedetails, date of creation, line spaces, andcopyright messages all start with thissymbol.

The line beginning “.MODEL ....” uses astandard SPICE command that defines amodel to the software. Following thiscommand are the device name, it’spolari ty , and a l is t of the modelparameters - the “+” sign being used forconcatenation to the original command.The text file reproduced in appendix Agives some brief details as to the effectseach parameter has on the model’sbehaviour.

The measurements necessary to derivethe bipolar transistor model parametervalues can conveniently be separatedinto dc and ac parameters as shown intable 1. The dc parameters are furtherseparated into those for forward andreverse operat ion. The paras it icres is tance components , and thesaturation current IS being common forboth forward and reverse modes. Thedescriptions of the forward parametersgiven below is equally applicable to thereverse parameters. (Appendix Breference 3).

An explanation of the function of the dcparameters is most easily accomplishedwith reference to a chart - sometimesreferred to as the “Gummel Plot”.Figure 3 shows a Gummel plot, whichillustrates the variation in collector andbase currents with base-emitter voltage- a requirement being that the device ison the edge of saturation, satisfied byVBC = 0 , (or VCE= VBE). The collectorcurrent IC (ideally) follows the Shockleyequation that defines the currentthrough a P-N junction:

I = Is [e qVf

KT −1]

IS - the transistor saturation current and is dependent on the size of the base-emitter area

k - Boltzmann’s constant=1.38 x 10-23J/K

q - electronic charge=1.602 x 10-19C

T - temperature in Kelvin, (300K is a common assumption)

VF - is the voltage across the junction.

With reference to the chart, IS is they-axis intercept of the collector currentcurve at VBE= 0, and NF defines the slopeof the line (referred to q/kT), and within

SPICE defaults to unity. At high currents,the collector current differs from thatpredicted by the equation due toresistances, and high level injectioneffec ts . These ef fects areaccommodated with in SPICE byallowing base-emitter de-biasing by theparasitic emitter resistance (or collectorresistance for the reverse mode), and bythe collector “knee” current parameter,IKF. (IKF is defined as the collectorcurrent at which the current gain= BF/2,see below).

The base current (IB) plot would ideallybe parallel to the collector current, theplot separation being IS/BF, howeverthere are a number of physical effectsthat are addressed by other parameters.

At low values of collector current,surface leakage and recombinationeffects introduce an additional slope tothe plot of IB, causing the line to interceptthe y axis at a higher position than wouldbe the case if IB was always a fixedfraction of IC. These effects are describedby two additional SPICE parameters; ISE- the y axis intercept for the IB curve atVBE=0, and NE - representing the slope ofthe affected region. These parametersintroduce a fall in hFE at low collectorcurrent. (Appendix B, reference 4 givessome useful illustrations on how theseparameters affect transistor curves).

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forward reverse

IS CJC

NF NR CJE

BF BR MJC

IKF IKR VJC

VAF VAR MJE

ISE ISC VJE

NE NC TF

Table 1Bipolar Transistor Model Parameters.

Figure 1Gummel-Poon Bipolar Transistor Model.

*ZETEX ZTX688B Spice model Last revision 8/11/90 *.MODEL ZTX688B NPN IS = 1.09E-12 NF = 0.9935 BF = 1180 IKF= 5.2 VAF= 25+ ISE=1.3E-13 NE =1.35 NR =0.992 BR =790 IKR=.5 VAR=5 ISC=0.174E-12+ NC =1.399 RB = .3 RE =.036 RC = .034 CJC= 104E-12 MJC= .29 VJC= .46 + CJE=280E-12 TF = .93E-9 TR =1.05E-9 *

Figure 2General Format of Zetex (Bipolar Transistor) SPICE Models.

This application note is a guide to theunderstanding and use of Zetex SPICEmodels. It includes sections on howsome of these models are derived - themeasurements/optimisation necessary,how to customise models for thosecases where a model is not available,and the limitations to be aware of.

Measurement of ModelParameters

The bipolar transistor circuit model usedby the SPICE software is a modifiedversion of the Gummel-Poon modelformulated in 1970. The schematic ofthis model is shown in Figure 1. For acomprehensive description of themodel, including physical definitions ofthe model components, please refer toAppendix B, references 1 and 2.

Figure 2 shows a typical model for aZetex bipolar transistor.

Lines beginning with an asterisk indicatea non-executable comment; so devicedetails, date of creation, line spaces, andcopyright messages all start with thissymbol.

The line beginning “.MODEL ....” uses astandard SPICE command that defines amodel to the software. Following thiscommand are the device name, it’spolari ty , and a l is t of the modelparameters - the “+” sign being used forconcatenation to the original command.The text file reproduced in appendix Agives some brief details as to the effectseach parameter has on the model’sbehaviour.

The measurements necessary to derivethe bipolar transistor model parametervalues can conveniently be separatedinto dc and ac parameters as shown intable 1. The dc parameters are furtherseparated into those for forward andreverse operat ion. The paras it icres is tance components , and thesaturation current IS being common forboth forward and reverse modes. Thedescriptions of the forward parametersgiven below is equally applicable to thereverse parameters. (Appendix Breference 3).

An explanation of the function of the dcparameters is most easily accomplishedwith reference to a chart - sometimesreferred to as the “Gummel Plot”.Figure 3 shows a Gummel plot, whichillustrates the variation in collector andbase currents with base-emitter voltage- a requirement being that the device ison the edge of saturation, satisfied byVBC = 0 , (or VCE= VBE). The collectorcurrent IC (ideally) follows the Shockleyequation that defines the currentthrough a P-N junction:

I = Is [e qVf

KT −1]

IS - the transistor saturation current and is dependent on the size of the base-emitter area

k - Boltzmann’s constant=1.38 x 10-23J/K

q - electronic charge=1.602 x 10-19C

T - temperature in Kelvin, (300K is a common assumption)

VF - is the voltage across the junction.

With reference to the chart, IS is they-axis intercept of the collector currentcurve at VBE= 0, and NF defines the slopeof the line (referred to q/kT), and within

SPICE defaults to unity. At high currents,the collector current differs from thatpredicted by the equation due toresistances, and high level injectioneffec ts . These ef fects areaccommodated with in SPICE byallowing base-emitter de-biasing by theparasitic emitter resistance (or collectorresistance for the reverse mode), and bythe collector “knee” current parameter,IKF. (IKF is defined as the collectorcurrent at which the current gain= BF/2,see below).

The base current (IB) plot would ideallybe parallel to the collector current, theplot separation being IS/BF, howeverthere are a number of physical effectsthat are addressed by other parameters.

At low values of collector current,surface leakage and recombinationeffects introduce an additional slope tothe plot of IB, causing the line to interceptthe y axis at a higher position than wouldbe the case if IB was always a fixedfraction of IC. These effects are describedby two additional SPICE parameters; ISE- the y axis intercept for the IB curve atVBE=0, and NE - representing the slope ofthe affected region. These parametersintroduce a fall in hFE at low collectorcurrent. (Appendix B, reference 4 givessome useful illustrations on how theseparameters affect transistor curves).

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forward reverse

IS CJC

NF NR CJE

BF BR MJC

IKF IKR VJC

VAF VAR MJE

ISE ISC VJE

NE NC TF

Table 1Bipolar Transistor Model Parameters.

Figure 1Gummel-Poon Bipolar Transistor Model.

*ZETEX ZTX688B Spice model Last revision 8/11/90 *.MODEL ZTX688B NPN IS = 1.09E-12 NF = 0.9935 BF = 1180 IKF= 5.2 VAF= 25+ ISE=1.3E-13 NE =1.35 NR =0.992 BR =790 IKR=.5 VAR=5 ISC=0.174E-12+ NC =1.399 RB = .3 RE =.036 RC = .034 CJC= 104E-12 MJC= .29 VJC= .46 + CJE=280E-12 TF = .93E-9 TR =1.05E-9 *

Figure 2General Format of Zetex (Bipolar Transistor) SPICE Models.

The Gummel Plot is produced either bycareful curve tracer measurement,and/or by an arrangement ofSource-Measure Units. The latter beingparticularly effective for low currentmeasurements, and the former for thehigh current range. If more than onemeasurement system is used to produceGummel data, then care must beexercised to ensure that temperatureand accuracy differences do not produceoffsets. The Gummel Plot measurementis usually automated, and the datacollected into a PC where a logarithmicregression routine is used to determineIS, NF, ISE and NE.

The slope of the IC versus VCE outputcharacteristics, (hoe in h-parameterpar lance) is due to base widthmodulation effects as described by J.M.Early - and sometimes termed the Earlyeffect, (please refer to Figure 4). TheEarly voltage is the point on the x axis atwhich the extrapolated curves wouldappear to intercept. This voltage (whichpossesses no sign) is known as VAF tothe SPICE software, and allows theSPICE equations to predict the IC valuefrom the basic Shockley equation, at anyvalue of VCE. This allows the model tobehave as expected in the linear region.

The VAF (VAR) parameters aredetermined by measuring IC ( IE) atseveral values of VCE (VEC), and usinglinear regression to find the voltage axisintercept. A range of base currents areused, such that the resultant collectorcurrents represent the usual operatingrange.

The ac parameters are the collector-baseand base-emitter capacitances, and theforward and reverse base transition time

parameters . The capaci tanceparameters CJ , MJ, and VJ aredetermined by measuring thecapacitance against reverse voltage(known as C-V data) for each junction,and then either using an iterative routinebased on the equation below, or the P-Njunction capacitance entry screen withinthe PSPICE PARTS package, or similarparameter extraction program.

C = CJ0

CJ0 - is the zero bias value

ϕ- is the junction barrier potential (known as VJC or VJE to SPICE)

M - is the grading coefficient (known as MJC or MJE to SPICE).

VR - is the applied reverse bias.

The transit time parameters can befound by an iterative approach based ona measurement of the FT profi le(transition frequency against collectorcurrent), and switching times for aparticular range of conditions. Theforward transit time TF is adjusted suchthat simulations of small signal RF gainmeasurements concur with FT

measurements (Appendix B reference 5)and turn-on times. The reverse transittime TR is determined by considerationof turn-off times, particularly bipolarstorage time, ts.

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Temperature: 27.0

0V 0.2V 0.4V 0.6V 0.8V 1.0V

V_V8IC(Q1) IB(Q1)

ICLog I

Figure 3IC and IB Vs VBE Transconductance Chart - “Gummel Plot” (FMMT617). (Note 1).

The Gummel Plot is produced either bycareful curve tracer measurement,and/or by an arrangement ofSource-Measure Units. The latter beingparticularly effective for low currentmeasurements, and the former for thehigh current range. If more than onemeasurement system is used to produceGummel data, then care must beexercised to ensure that temperatureand accuracy differences do not produceoffsets. The Gummel Plot measurementis usually automated, and the datacollected into a PC where a logarithmicregression routine is used to determineIS, NF, ISE and NE.

The slope of the IC versus VCE outputcharacteristics, (hoe in h-parameterpar lance) is due to base widthmodulation effects as described by J.M.Early - and sometimes termed the Earlyeffect, (please refer to Figure 4). TheEarly voltage is the point on the x axis atwhich the extrapolated curves wouldappear to intercept. This voltage (whichpossesses no sign) is known as VAF tothe SPICE software, and allows theSPICE equations to predict the IC valuefrom the basic Shockley equation, at anyvalue of VCE. This allows the model tobehave as expected in the linear region.

The VAF (VAR) parameters aredetermined by measuring IC ( IE) atseveral values of VCE (VEC), and usinglinear regression to find the voltage axisintercept. A range of base currents areused, such that the resultant collectorcurrents represent the usual operatingrange.

The ac parameters are the collector-baseand base-emitter capacitances, and theforward and reverse base transition time

parameters . The capaci tanceparameters CJ , MJ, and VJ aredetermined by measuring thecapacitance against reverse voltage(known as C-V data) for each junction,and then either using an iterative routinebased on the equation below, or the P-Njunction capacitance entry screen withinthe PSPICE PARTS package, or similarparameter extraction program.

C = CJ0

CJ0 - is the zero bias value

ϕ- is the junction barrier potential (known as VJC or VJE to SPICE)

M - is the grading coefficient (known as MJC or MJE to SPICE).

VR - is the applied reverse bias.

The transit time parameters can befound by an iterative approach based ona measurement of the FT profi le(transition frequency against collectorcurrent), and switching times for aparticular range of conditions. Theforward transit time TF is adjusted suchthat simulations of small signal RF gainmeasurements concur with FT

measurements (Appendix B reference 5)and turn-on times. The reverse transittime TR is determined by considerationof turn-off times, particularly bipolarstorage time, ts.

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Temperature: 27.0

0V 0.2V 0.4V 0.6V 0.8V 1.0V

V_V8IC(Q1) IB(Q1)

ICLog I

Figure 3IC and IB Vs VBE Transconductance Chart - “Gummel Plot” (FMMT617). (Note 1).

Once a prel iminary set of SPICEparameters have been derived via themeasurements outlined above, the draftmodel is verified in various simulationcircuits that reproduce the measurementconditions, and adjustments made toappropriate parameters as required.

Model limitations

Please refer to Appendix A, which is aprintout of the introductory text file onthe Zetex SPICE model disc, andincludes some comments on limitations.

In addition:

1. An important effect to consider formedium to high voltage device modelsis the “Quasi-saturation Effect”(Appendix B, reference 3).This effect isapparent as a two stage slope in thetransistor’s saturation region, and anabrupt fall in hFE at medium to highcollector currents. This feature has beenaddressed within later versions ofPSPICE, which includes additionalparameters to model this region ofoperation. Zetex SPICE models areintended to be of general application, sothese additional parameters are notincluded within the SPICE models. Some

experimentation is possible, usingpiecewise-linear (PWL) techniques withcur rent sources with in SPICEsubcircuits, to enable different values ofseries resistance.

NOTE: I t is recommended thatsimulations with high voltage modelsoperating near to, or at their maximumoperating current are thoroughlyvalidated.

2. Device package. The SPICEfundamental device models are not awareof the package used to encapsulate theproduct, so resistance (other than thatmeasured and accounted for within RC, REetc), inductance and stray capacitance willnot be included within the model. If thesecomponents are important within aparticular application, then it is possible tocreate a subcircuit within SPICE that couldincorporate the device model withadditional passive components torepresent parasitics. Eg. Inductance for RF transistors andvariable capacitance diodes, resistance forESR components of RF diodes, andleakage resistance for MOSFETs. (Pleaserefer to Figure 5 for an example of avariable capacitance diode with options

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Temperature: 27.0

0V 2V 4V 6V 8V 10V

V(V2:+)IC(Q1)

IB=7mA

IB=1mA

Figure 4IC Vs VCE Output Characteristics Plot, Illustrating the “Early Effect” (FMMT617). (Note1).

* ZETEX ZC830A Spice Model Last revision 4/3/92 *.MODEL ZC830A D IS= 5.355E-15 N= 1.08 RS= 0.1161 XTI =3+ EG= 1.11 CJO= 19.15E-12 M= 0.9001 VJ= 2.164 FC= 0.5+ BV= 45.1 IBV= 51.74E-3 TT= 129.8E-9* + ISR= 1.043E-12 NR= 2.01 (INCLUDE FOR LATER SPICE VERSIONS)**NOTES: FOR RF OPERATION ADD PACKAGE INDUCTANCE 0F 2.5E-9H AND SET*RS=0.68 FOR 2V, 0.60 FOR 5V, 0.52 FOR 10V OR 0.46 FOR 20V BIAS.* Figure 5Zetex ZC830A Variable Capacitance Diode SPICE Model, Illustrating Parasitic and ESRComponents.

Once a prel iminary set of SPICEparameters have been derived via themeasurements outlined above, the draftmodel is verified in various simulationcircuits that reproduce the measurementconditions, and adjustments made toappropriate parameters as required.

Model limitations

Please refer to Appendix A, which is aprintout of the introductory text file onthe Zetex SPICE model disc, andincludes some comments on limitations.

In addition:

1. An important effect to consider formedium to high voltage device modelsis the “Quasi-saturation Effect”(Appendix B, reference 3).This effect isapparent as a two stage slope in thetransistor’s saturation region, and anabrupt fall in hFE at medium to highcollector currents. This feature has beenaddressed within later versions ofPSPICE, which includes additionalparameters to model this region ofoperation. Zetex SPICE models areintended to be of general application, sothese additional parameters are notincluded within the SPICE models. Some

experimentation is possible, usingpiecewise-linear (PWL) techniques withcur rent sources with in SPICEsubcircuits, to enable different values ofseries resistance.

NOTE: I t is recommended thatsimulations with high voltage modelsoperating near to, or at their maximumoperating current are thoroughlyvalidated.

2. Device package. The SPICEfundamental device models are not awareof the package used to encapsulate theproduct, so resistance (other than thatmeasured and accounted for within RC, REetc), inductance and stray capacitance willnot be included within the model. If thesecomponents are important within aparticular application, then it is possible tocreate a subcircuit within SPICE that couldincorporate the device model withadditional passive components torepresent parasitics. Eg. Inductance for RF transistors andvariable capacitance diodes, resistance forESR components of RF diodes, andleakage resistance for MOSFETs. (Pleaserefer to Figure 5 for an example of avariable capacitance diode with options

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Temperature: 27.0

0V 2V 4V 6V 8V 10V

V(V2:+)IC(Q1)

IB=7mA

IB=1mA

Figure 4IC Vs VCE Output Characteristics Plot, Illustrating the “Early Effect” (FMMT617). (Note1).

* ZETEX ZC830A Spice Model Last revision 4/3/92 *.MODEL ZC830A D IS= 5.355E-15 N= 1.08 RS= 0.1161 XTI =3+ EG= 1.11 CJO= 19.15E-12 M= 0.9001 VJ= 2.164 FC= 0.5+ BV= 45.1 IBV= 51.74E-3 TT= 129.8E-9* + ISR= 1.043E-12 NR= 2.01 (INCLUDE FOR LATER SPICE VERSIONS)**NOTES: FOR RF OPERATION ADD PACKAGE INDUCTANCE 0F 2.5E-9H AND SET*RS=0.68 FOR 2V, 0.60 FOR 5V, 0.52 FOR 10V OR 0.46 FOR 20V BIAS.* Figure 5Zetex ZC830A Variable Capacitance Diode SPICE Model, Illustrating Parasitic and ESRComponents.

provided for ESR and packageinductance).

It also follows from the above that for dcor low frequency operation, and forthose cases where a device model is notavailable for the package of interest, itmay be worth considering models forelectrical ly similar parts in otherpackages.

3. Breakdown voltage. The SPICEbipolar transistor models do not possessa breakdown vol tage for anycombination of terminals. This featurecan be added within a subcircuit asabove, by including a diode across therelevant terminals, with BV set to theminimum breakdown voltage specifiedon the transistor’s datasheet. However,this will only indicate that there iscurrent flow under overvoltage ortransient conditions - it will not of coursemodel the effects this would have on adevice. This includes effects such as hFEdegradation due to reverse emitter-basecurrent , heat ing and secondarybreakdown effects , catastrophicbreakdown of the gate oxide ofMOSFETs, osc i l lat ion, and noisegeneration (at low values of avalanchecurrent).

4. Safe Operating Area. Partially coveredby the comments above on breakdownvoltage, safe operating area (SOA) is notaddressed by the SPICE model. So thedesigner would need to consider theusual SOA issues such as: maximumpulse currents (in reality limited bydevice gain hFE/gFS and the bond wirefusing current); thermal resistance of thebasic silicon/package combination; andsecondary breakdown loci. This can be

done with reference to the models’circuit behaviour and the datasheetcharts, but for final design validation fullbreadboard analysis is recommended.

5. Parametric variation. The models donot include Monte Carlo parameters sosta t is t ica l analys is of c i rcui tperformance due to lot and devicevariation is not available.

NOTE: The model parameters arederived using nominal or mid-bandvalue components.

Application Examples

This section presents several basicsimulation circuits to demonstrate someof the functions that can evaluated usingZetex SPICE models. These circuitsrepresent some of the more basic,typical applications that can benefit fromusing Zetex components, and may serveas a basis for further experimentation.

It is recommended that any design isthoroughly checked in hardware beforecommitting the design to production, toavoid falling prey to any softwaregenerated optimism, or effects due tomodel limitations of the Zetex parts andother circuit components.

Discrete Component “OperationalAmplifier”. This form of circuit is verypopular within the audio industry for lownoise pre-amplification of mV levels ignals , part icularly f rom lowimpedance sources such as moving coiltransducers. The advantage of a discreteimplementation is that it allows thedesigner to employ relatively large area,high gain input devices. These devicespresent a low value of base spreading

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resistance to the input circuit, therebyminimising the amount of thermal noisegenerated. (Figure 6).

Automotive Relay Driver. Discretetransistors and Dar l ingtons havewidespread appeal as a cost effectiverelay or solenoid driver. A first passanalysis of such a circuit may suggestthat the opera t ing condit ionsexperienced by the device, (that is the

level of performance demanded by theload under nominal conditions) are fairlybenign. However, when transient events(such as generated by the manyinductive loads sharing a commonsupply line) and environmental factorsare considered, it is evident that thetrans is tor dr iver deserves someattention.

As an example, the circuit shown in

Figure 6Discrete Component “Op-amp” using Matrix Geometry Transistors for MinimalThermal Noise Generation. (Note 1).

provided for ESR and packageinductance).

It also follows from the above that for dcor low frequency operation, and forthose cases where a device model is notavailable for the package of interest, itmay be worth considering models forelectrical ly similar parts in otherpackages.

3. Breakdown voltage. The SPICEbipolar transistor models do not possessa breakdown vol tage for anycombination of terminals. This featurecan be added within a subcircuit asabove, by including a diode across therelevant terminals, with BV set to theminimum breakdown voltage specifiedon the transistor’s datasheet. However,this will only indicate that there iscurrent flow under overvoltage ortransient conditions - it will not of coursemodel the effects this would have on adevice. This includes effects such as hFEdegradation due to reverse emitter-basecurrent , heat ing and secondarybreakdown effects , catastrophicbreakdown of the gate oxide ofMOSFETs, osc i l lat ion, and noisegeneration (at low values of avalanchecurrent).

4. Safe Operating Area. Partially coveredby the comments above on breakdownvoltage, safe operating area (SOA) is notaddressed by the SPICE model. So thedesigner would need to consider theusual SOA issues such as: maximumpulse currents (in reality limited bydevice gain hFE/gFS and the bond wirefusing current); thermal resistance of thebasic silicon/package combination; andsecondary breakdown loci. This can be

done with reference to the models’circuit behaviour and the datasheetcharts, but for final design validation fullbreadboard analysis is recommended.

5. Parametric variation. The models donot include Monte Carlo parameters sosta t is t ica l analys is of c i rcui tperformance due to lot and devicevariation is not available.

NOTE: The model parameters arederived using nominal or mid-bandvalue components.

Application Examples

This section presents several basicsimulation circuits to demonstrate someof the functions that can evaluated usingZetex SPICE models. These circuitsrepresent some of the more basic,typical applications that can benefit fromusing Zetex components, and may serveas a basis for further experimentation.

It is recommended that any design isthoroughly checked in hardware beforecommitting the design to production, toavoid falling prey to any softwaregenerated optimism, or effects due tomodel limitations of the Zetex parts andother circuit components.

Discrete Component “OperationalAmplifier”. This form of circuit is verypopular within the audio industry for lownoise pre-amplification of mV levels ignals , part icularly f rom lowimpedance sources such as moving coiltransducers. The advantage of a discreteimplementation is that it allows thedesigner to employ relatively large area,high gain input devices. These devicespresent a low value of base spreading

AN23 - 8 AN23 - 9

resistance to the input circuit, therebyminimising the amount of thermal noisegenerated. (Figure 6).

Automotive Relay Driver. Discretetransistors and Dar l ingtons havewidespread appeal as a cost effectiverelay or solenoid driver. A first passanalysis of such a circuit may suggestthat the opera t ing condit ionsexperienced by the device, (that is the

level of performance demanded by theload under nominal conditions) are fairlybenign. However, when transient events(such as generated by the manyinductive loads sharing a commonsupply line) and environmental factorsare considered, it is evident that thetrans is tor dr iver deserves someattention.

As an example, the circuit shown in

Figure 6Discrete Component “Op-amp” using Matrix Geometry Transistors for MinimalThermal Noise Generation. (Note 1).

Figure 7Automotive Relay Driver Circuit for Analysis of Transistor Behaviour under TransientConditions. (Note 1).

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Temperature: 27.0

0s 100ms 200ms 300ms 400ms 500ms

TimeV(Q3:C)

0VSEL>>

Collector-Emitter Voltage

IC(Q3)

Collector Current

Figure 8Automotive Relay Driver Circuit - SPICE Prediction of IC and VCE when subject to a + 80V, 230ms “Load Dump” Transient (Device “on” prior to Transient). (Note 1).

Figure 7 models the effect of a positiveline transient on the operation of asimple relay driver while in the on-state.The resultant SPICE derived traces aregiven in Figure 8, which shows thecollector current and collector-emittervoltage conditions imposed on thetransistor. It can be seen that for thegiven bias condition, the transistor isunable to remain in the saturated stateduring the first few milli-seconds of thetransient, but as the transient inducedcurrent falls, the transistor has sufficienthFE to turn-on to a low VCE(sat). The periodin which the device is within the linearoperation region must be carefullyconsidered, with respect to thermal andsecondary breakdown compliance.

SPICE could further be used to verify thetransient power generated, and to modelthe effects of different base drives.

Positive Line Switch. High gain low

Figure 7Automotive Relay Driver Circuit for Analysis of Transistor Behaviour under TransientConditions. (Note 1).

AN23 - 10 AN23 - 11

Temperature: 27.0

0s 100ms 200ms 300ms 400ms 500ms

TimeV(Q3:C)

0VSEL>>

IC(Q3)

Collector Current

Figure 8Automotive Relay Driver Circuit - SPICE Prediction of IC and VCE when subject to a + 80V, 230ms “Load Dump” Transient (Device “on” prior to Transient). (Note 1).

Figure 7 models the effect of a positiveline transient on the operation of asimple relay driver while in the on-state.The resultant SPICE derived traces aregiven in Figure 8, which shows thecollector current and collector-emittervoltage conditions imposed on thetransistor. It can be seen that for thegiven bias condition, the transistor isunable to remain in the saturated stateduring the first few milli-seconds of thetransient, but as the transient inducedcurrent falls, the transistor has sufficienthFE to turn-on to a low VCE(sat). The periodin which the device is within the linearoperation region must be carefullyconsidered, with respect to thermal andsecondary breakdown compliance.

SPICE could further be used to verify thetransient power generated, and to modelthe effects of different base drives.

Positive Line Switch. High gain low

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VCE(sat) B ipolar t ransistors are anexcellent choice for this function(otherwise known as high side drivers,circuit block switches etc) as they allowa much more compact and cost effectivedesign than competing MOS options.The generic form of the circuit shown inFigure 9, shows an FMMT717 SuperSOT(optimised SOT23) Bipolar transistoroperating as a high side 600mA switch-as used for a mobile telephone transmitswitch for example. Figure 10 shows theconditions experienced by the device atinitial switch-on as the 100µF capacitorcharges.

Figure 9Positive Line Switch using Zetex FMMT717 SuperSOT SOT23 PNP Bipolar Transistor,as a 600mA Load Supply Switch. (Note 1).

Temperature: 27.0

0.8ms 1.0ms 1.2ms 1.4ms 1.5ms

TimeIE(Q1)

Emitter current

v(q1:e)-v(q1:c)

0VSEL>>

Figure 10Positive Line Switch - SPICE Prediction of IC and VCE at Turn-on, showing CapacitiveCharging Current in C1. (Note 1).

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VCE(sat) B ipolar t ransistors are anexcellent choice for this function(otherwise known as high side drivers,circuit block switches etc) as they allowa much more compact and cost effectivedesign than competing MOS options.The generic form of the circuit shown inFigure 9, shows an FMMT717 SuperSOT(optimised SOT23) Bipolar transistoroperating as a high side 600mA switch-as used for a mobile telephone transmitswitch for example. Figure 10 shows theconditions experienced by the device atinitial switch-on as the 100µF capacitorcharges.

Figure 9Positive Line Switch using Zetex FMMT717 SuperSOT SOT23 PNP Bipolar Transistor,as a 600mA Load Supply Switch. (Note 1).

Temperature: 27.0

0.8ms 1.0ms 1.2ms 1.4ms 1.5ms

TimeIE(Q1)

Emitter current

v(q1:e)-v(q1:c)

0VSEL>>

Figure 10Positive Line Switch - SPICE Prediction of IC and VCE at Turn-on, showing CapacitiveCharging Current in C1. (Note 1).

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Switch Element in DC-DC Step-DownConverter. Figure 11 shows the generalform of the “Buck” or step-downconverter us ing a ZTX788B PNPtransistor - this being an E-Line (TO92style) Super-β transistor, having a BVCEOof 15V and a 3A continuous currentrating. The circuit performs a 12V to 5Vconversion at 100kHz, and supplies a 2Aload. Figure 12 shows the waveformsrecorded at the pulse source V2, and atthe collector of the transistor, both withrespect to 0V. The effect of the bipolartransistor storage time (ts) can be seenas a delay between the V2 transition to0V, and the fall of the collector voltage.This storage time can be reduced to

some extent by optimising the base bias,and base-emitter res is tors for aparticular load current (perhaps also bysacrificing on-state loss by operating thetrans is tor c lose to the edge ofsaturation) but this may not always bepossible or preferred.

Figure 11DC-DC Step-Down Converter using ZTX788B as a Switch Element in a 12V to 5V CircuitOperating at 100kHz. (Note 1).

Temperature: 27.0

492us 496us 500us 504us 508us

V(Q1:c) V(V2:+)

Figure 12DC-DC Step-Down Converter - SPICE Prediction of ZTX788B Switching Waveforms.Traces show PWM drive (5V level) and Collector-to-0V Waveforms. Note Storage TimeEffects. (Note 1).

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Switch Element in DC-DC Step-DownConverter. Figure 11 shows the generalform of the “Buck” or step-downconverter us ing a ZTX788B PNPtransistor - this being an E-Line (TO92style) Super-β transistor, having a BVCEOof 15V and a 3A continuous currentrating. The circuit performs a 12V to 5Vconversion at 100kHz, and supplies a 2Aload. Figure 12 shows the waveformsrecorded at the pulse source V2, and atthe collector of the transistor, both withrespect to 0V. The effect of the bipolartransistor storage time (ts) can be seenas a delay between the V2 transition to0V, and the fall of the collector voltage.This storage time can be reduced to

some extent by optimising the base bias,and base-emitter res is tors for aparticular load current (perhaps also bysacrificing on-state loss by operating thetrans is tor c lose to the edge ofsaturation) but this may not always bepossible or preferred.

Figure 11DC-DC Step-Down Converter using ZTX788B as a Switch Element in a 12V to 5V CircuitOperating at 100kHz. (Note 1).

Temperature: 27.0

492us 496us 500us 504us 508us

V(Q1:c) V(V2:+)

Figure 12DC-DC Step-Down Converter - SPICE Prediction of ZTX788B Switching Waveforms.Traces show PWM drive (5V level) and Collector-to-0V Waveforms. Note Storage TimeEffects. (Note 1).

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Figure 13DC-DC Step-Down Converter using ZTX788B with Active Turn-Off Topology in a 12V to5V Circuit operating at 100kHz. (Note 1).

Temperature: 27.0

15us 20us 25us12us

TimeV(V2:+) V(Q1:c)

Figure 14DC-DC Step-Down Converter - SPICE Prediction of ZTX788B Switching Waveforms.Traces show PWM Drive and Collector-to-0V Waveforms. Bipolar Transistor Turn-offTime = 50ns. (Note 1).

An alternative is to consider changingthe passive turn-off (achieved by resistorR1) to an active turn-off method. Figure13 shows one option of providing activeturn-off to the base of the Bipolartransistor, and although this hasresulted in the addit ion of a fewcomponents, this implementation ismore cost effective than would be thecase with a TO220 MOSFET based

design. The effect of the modification isapparent in Figure 14, which shows acombined storage and fall time of 40ns -comparable with MOSFETs, and alsoproducing minimal switching loss.

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Figure 13DC-DC Step-Down Converter using ZTX788B with Active Turn-Off Topology in a 12V to5V Circuit operating at 100kHz. (Note 1).

Temperature: 27.0

15us 20us 25us12us

TimeV(V2:+) V(Q1:c)

Figure 14DC-DC Step-Down Converter - SPICE Prediction of ZTX788B Switching Waveforms.Traces show PWM Drive and Collector-to-0V Waveforms. Bipolar Transistor Turn-offTime = 50ns. (Note 1).

An alternative is to consider changingthe passive turn-off (achieved by resistorR1) to an active turn-off method. Figure13 shows one option of providing activeturn-off to the base of the Bipolartransistor, and although this hasresulted in the addit ion of a fewcomponents, this implementation ismore cost effective than would be thecase with a TO220 MOSFET based

design. The effect of the modification isapparent in Figure 14, which shows acombined storage and fall time of 40ns -comparable with MOSFETs, and alsoproducing minimal switching loss.

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Temperature: 27.0

0s 1.0us 2.0us 3.0us 4.0us 5.0us 6.0us

TimeV(Q2:E)

0VSEL>>

Gate Voltage

IG(M2)+ IG(M4)

Gate Charge Current

Figure 16Complementary Emitter Follower MOSFET Gate Driver - SPICE Prediction of GateVoltage and Current Waveforms. Gate Turn-On = 50ns. (Note 1).

Figure 15Complementary Emitter Follower MOSFET Gate Driver using ZTX618/718. (Note 1).

Complementary Emitter Fol lowerMOSFET Gate Driver. A high currentbuffer is often required to supply thehigh transient currents demanded byPower MOSFETs operating at highswitching speeds, say within off-lineconverters. This buffer is used tointerface the power devices to the PWMcontroller IC which may have limitedcurrent source/sink capability. Figure 15shows a conceptual circuit of a typicalgate driver pair using the high gain 3ADC rated trans istors ZTX618 andZTX718. Figure 16 shows the gatevoltage waveform, and the total gatecharging current for a pair of powerMOSFETs.

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Temperature: 27.0

0s 1.0us 2.0us 3.0us 4.0us 5.0us 6.0us

TimeV(Q2:E)

0VSEL>>

Gate Voltage

IG(M2)+ IG(M4)

Gate Charge Current

Figure 16Complementary Emitter Follower MOSFET Gate Driver - SPICE Prediction of GateVoltage and Current Waveforms. Gate Turn-On = 50ns. (Note 1).

Figure 15Complementary Emitter Follower MOSFET Gate Driver using ZTX618/718. (Note 1).

Complementary Emitter Fol lowerMOSFET Gate Driver. A high currentbuffer is often required to supply thehigh transient currents demanded byPower MOSFETs operating at highswitching speeds, say within off-lineconverters. This buffer is used tointerface the power devices to the PWMcontroller IC which may have limitedcurrent source/sink capability. Figure 15shows a conceptual circuit of a typicalgate driver pair using the high gain 3ADC rated trans istors ZTX618 andZTX718. Figure 16 shows the gatevoltage waveform, and the total gatecharging current for a pair of powerMOSFETs.

Appendix AReproduction of “Zetex.txt” Introductory text from Zetex SPICEmodels disc version 2.

ZETEX SEMICONDUCTORS

SPICE DISC VERSION 2V0 Oct 1995

Zetex is the largest UK owned specialist semiconductor manufacturer.

Zetex products are based on Bipolar and MOSFET technologies offeredin a variety of package assemblies suitable for either through-holeor surface mount applications.The product range includes: High current, very low VCE(sat) bipolar transistors Darlington transistors Small signal transistors RF and switching transistors Switching, reference and variable capacitance diodes MOSFETs Power management linear ICs A 20V linear ASIC process Opto-electronic products.

Zetex’s 60,000 square feet production area features cleanroomsoperating to class 10 and class 100, with SPC, ESD, PPM, FMEA, andFIT programs in place to ensure consistent product quality. Thefac i l i t y i s approved to BS EN ISO 9001 (which covers bo thdevelopment and production functions), and products are routinelysupplied to many international standards including BS9300, CECC50000, and IECQ 750000, as we l l as many customer speci f icapprovals conferred by major OEMs. All this is supported by adedicated sales and marketing team including full technical andapplications assistance.

For more information on the company and its products, please contact your nearest sales office.

Zetex plcFields New Road, Chadderton, Oldham, OL9 8NP, United KingdomTelephone +44 (0)161-627-5105 (Sales) , +44 (0)161-627-4963(General Enquires), Facsimile: +44 (0)161-627-5467

A Telemetrix PLC Group Company

Zetex GmbHStreitfeldstraBe 19 D81673 MunchenTelefon: +49 (089) 45 49 49 0 Fax: +49 (089) 45 49 49 49

Zetex Inc.47, Mall Drive, Unit 4, Commack NY 11725Telephone: +1 (516) 543-7100 Fax: +1 (516) 864-7630

Zetex (Asia) Ltd.3510 Metroplaza, Tower 2, Hing Fong Road, Kwai Fong, Hong KongTelephone: 26100 611 Fax: 24250 494

______________________________________________________________ Zetex Spice Models

Introduction

Welcome to version 2 of the Zetex disc of Spice device models. Thisrelease contains Spice models for 108 Zetex device parents thatsource approx imate ly 280 device types . These types inc ludeswi tch ing and var icap d iodes , b ipo la r (h igh cur ren t lowVCE(sat)),small signal bipolar, RF bipolar, bipolar Darlington andMOSFET transistors. This range is continuously under expansion asnew products are introduced and retrospective models are generatedfor existing products.

This latest version of the Spice disc also includes a symbollibrary that allows the models to be used with the Windows versionsof PSpice. Further information on the symbol library,includinginstallation instructions, will be found in an additional textf i le in the root directory of this disc. This f i le is cal ledZETEXSYM.TXT.

The Spice models supplied on this disc are accessible in threeways:

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Appendix AReproduction of “Zetex.txt” Introductory text from Zetex SPICEmodels disc version 2.

ZETEX SEMICONDUCTORS

SPICE DISC VERSION 2V0 Oct 1995

Zetex is the largest UK owned specialist semiconductor manufacturer.

Zetex products are based on Bipolar and MOSFET technologies offeredin a variety of package assemblies suitable for either through-holeor surface mount applications.The product range includes: High current, very low VCE(sat) bipolar transistors Darlington transistors Small signal transistors RF and switching transistors Switching, reference and variable capacitance diodes MOSFETs Power management linear ICs A 20V linear ASIC process Opto-electronic products.

Zetex’s 60,000 square feet production area features cleanroomsoperating to class 10 and class 100, with SPC, ESD, PPM, FMEA, andFIT programs in place to ensure consistent product quality. Thefac i l i t y i s approved to BS EN ISO 9001 (which covers bo thdevelopment and production functions), and products are routinelysupplied to many international standards including BS9300, CECC50000, and IECQ 750000, as we l l as many customer speci f icapprovals conferred by major OEMs. All this is supported by adedicated sales and marketing team including full technical andapplications assistance.

For more information on the company and its products, please contact your nearest sales office.

Zetex plcFields New Road, Chadderton, Oldham, OL9 8NP, United KingdomTelephone +44 (0)161-627-5105 (Sales) , +44 (0)161-627-4963(General Enquires), Facsimile: +44 (0)161-627-5467

A Telemetrix PLC Group Company

Zetex GmbHStreitfeldstraBe 19 D81673 MunchenTelefon: +49 (089) 45 49 49 0 Fax: +49 (089) 45 49 49 49

Zetex Inc.47, Mall Drive, Unit 4, Commack NY 11725Telephone: +1 (516) 543-7100 Fax: +1 (516) 864-7630

Zetex (Asia) Ltd.3510 Metroplaza, Tower 2, Hing Fong Road, Kwai Fong, Hong KongTelephone: 26100 611 Fax: 24250 494

______________________________________________________________ Zetex Spice Models

Introduction

Welcome to version 2 of the Zetex disc of Spice device models. Thisrelease contains Spice models for 108 Zetex device parents thatsource approx imate ly 280 device types . These types inc ludeswi tch ing and var icap d iodes , b ipo la r (h igh cur ren t lowVCE(sat)),small signal bipolar, RF bipolar, bipolar Darlington andMOSFET transistors. This range is continuously under expansion asnew products are introduced and retrospective models are generatedfor existing products.

This latest version of the Spice disc also includes a symbollibrary that allows the models to be used with the Windows versionsof PSpice. Further information on the symbol library,includinginstallation instructions, will be found in an additional textf i le in the root directory of this disc. This f i le is cal ledZETEXSYM.TXT.

The Spice models supplied on this disc are accessible in threeways:

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1) The directory ZTXMODS contains a separate Spice model file foreach Zetex device type for which a model is presently available.New model releases between major revisions of the Spice disc willbe stored in the NEWMODS directory.

2) The directory ZTXLIBS contains the file ZMODELS.LIB in which allavailable Zetex device models are collected into a single file. Newmodel releases between major revisions of the Spice disc will bestored within the ZNEWMODS.LIB library.

3) The directory ZTXWIN contains a symbol library (ZETEXM.SLB) thatenables Windows versions of PSpice to use the Zetex SPICE models.

ZTXMODS and NEWMODS Model Files

Each of these files is a Spice model for a single Zetex device.They can be loaded into your simulation simply by employing the Spicecommand <.INCLUDE Device_name.MOD>. Only the device typesspecifically required by the circuit under simulation need beincluded in this way. All diode models and all but one of the bipolartransistor models are simple <.MODEL> files. However, the model forthe FMMT597Q, all Darlington transistors and all MOSFET models aremulti-component subcircuits and so are supplied as <.SUBCKT> files.

The diode models should be included in circuit files using the normalSpice reference: <Dnum Anode_node Cathode_node Device_name>.

Bipolar transistor models should be included using <QnumCollector_node Base_node Emitter_node Device_name>.

All other models should be referenced as subcircuits,ie in the form<Xnum Collector_node Base_node Emitter_node Device_name> for theFMMT597Q and all Darlington transistors,and as <Xnum Drain_nodeGate_node Source_node Device_name> for all MOSFET models.

The ZMODELS.LIB and ZNEWMODS.LIB Library Files

To save disc and directory space,some users may prefer to use themodel libraries. For later Spice versions the ZMODELS.LIB andZNEWMODS.LIB libraries are available. These are simply collectionsof all Zetex Spice models exactly as they appear in the individual

model directories. By using the statement <.LIB ZMODELS.LIB> and<.LIB ZNEWMODS.LIB>, Spice will be able to access any model withinthe libraries without the need for multiple <.INCLUDE> statements.

Note that all subcircuits, be they in the library files or theindividual model files use the same connection sequence as Spiceuses for single element models, thus easing their use._________________________________________________________________Model Parameters and Limitations

Bipolar Models

All bipolar transistor and Darlington models are based on theSpice modified Gummel-Poon model. Following is a typical model fora single transistor:-

ZETEX ZTX109 Spice model Last revision 4/90*.MODEL ZTX109 NPN IS=1.8E-14 ISE=5.0E-14 NF=.9955 BF=400 BR=35.5+IKF=.14 IKR=.03 ISC=1.72E-13 NC=1.27 NR=1.005 RB=.56 RE=.6 RC=.25+VAF=80 VAR=12.5 CJE=13E-12 TF=.64E-9 CJC=4E-12 TR=50.72E-9MJC=.33*

A brief guide to the effect of each model element :-

IS and NE controls Icbo and where hFE falls with high Ic.ISE and NE control the fall in hFE that occurs at low Ic.BF controls peak forward hFE.BR controls peak reverse hFE ie collector and emitter reversed.IKF controls where hFE falls at high collector currents.IKR controls where reverse hFE falls at high emitter currents.ISC and NC controls the fall of reverse hFE at low currents.RC, RB and RE add series resistance to these device terminals.VAF controls the variation of collector current with voltage when the transistor is operated in its linear region.VAR the reverse version of VAF.CJC, VJC and MJC control Ccb and how it varies with Vcb.CJE controls Cbe.TF controls Ft and switching speeds.TR controls switching storage times.

The standard bipolar transistor Spice model includes a parameterthat allows BF, the hFE parameter, to vary with temperature. This

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1) The directory ZTXMODS contains a separate Spice model file foreach Zetex device type for which a model is presently available.New model releases between major revisions of the Spice disc willbe stored in the NEWMODS directory.

2) The directory ZTXLIBS contains the file ZMODELS.LIB in which allavailable Zetex device models are collected into a single file. Newmodel releases between major revisions of the Spice disc will bestored within the ZNEWMODS.LIB library.

3) The directory ZTXWIN contains a symbol library (ZETEXM.SLB) thatenables Windows versions of PSpice to use the Zetex SPICE models.

ZTXMODS and NEWMODS Model Files

Each of these files is a Spice model for a single Zetex device.They can be loaded into your simulation simply by employing the Spicecommand <.INCLUDE Device_name.MOD>. Only the device typesspecifically required by the circuit under simulation need beincluded in this way. All diode models and all but one of the bipolartransistor models are simple <.MODEL> files. However, the model forthe FMMT597Q, all Darlington transistors and all MOSFET models aremulti-component subcircuits and so are supplied as <.SUBCKT> files.

The diode models should be included in circuit files using the normalSpice reference: <Dnum Anode_node Cathode_node Device_name>.

Bipolar transistor models should be included using <QnumCollector_node Base_node Emitter_node Device_name>.

All other models should be referenced as subcircuits,ie in the form<Xnum Collector_node Base_node Emitter_node Device_name> for theFMMT597Q and all Darlington transistors,and as <Xnum Drain_nodeGate_node Source_node Device_name> for all MOSFET models.

The ZMODELS.LIB and ZNEWMODS.LIB Library Files

To save disc and directory space,some users may prefer to use themodel libraries. For later Spice versions the ZMODELS.LIB andZNEWMODS.LIB libraries are available. These are simply collectionsof all Zetex Spice models exactly as they appear in the individual

model directories. By using the statement <.LIB ZMODELS.LIB> and<.LIB ZNEWMODS.LIB>, Spice will be able to access any model withinthe libraries without the need for multiple <.INCLUDE> statements.

Note that all subcircuits, be they in the library files or theindividual model files use the same connection sequence as Spiceuses for single element models, thus easing their use._________________________________________________________________Model Parameters and Limitations

Bipolar Models

All bipolar transistor and Darlington models are based on theSpice modified Gummel-Poon model. Following is a typical model fora single transistor:-

ZETEX ZTX109 Spice model Last revision 4/90*.MODEL ZTX109 NPN IS=1.8E-14 ISE=5.0E-14 NF=.9955 BF=400 BR=35.5+IKF=.14 IKR=.03 ISC=1.72E-13 NC=1.27 NR=1.005 RB=.56 RE=.6 RC=.25+VAF=80 VAR=12.5 CJE=13E-12 TF=.64E-9 CJC=4E-12 TR=50.72E-9MJC=.33*

A brief guide to the effect of each model element :-

IS and NE controls Icbo and where hFE falls with high Ic.ISE and NE control the fall in hFE that occurs at low Ic.BF controls peak forward hFE.BR controls peak reverse hFE ie collector and emitter reversed.IKF controls where hFE falls at high collector currents.IKR controls where reverse hFE falls at high emitter currents.ISC and NC controls the fall of reverse hFE at low currents.RC, RB and RE add series resistance to these device terminals.VAF controls the variation of collector current with voltage when the transistor is operated in its linear region.VAR the reverse version of VAF.CJC, VJC and MJC control Ccb and how it varies with Vcb.CJE controls Cbe.TF controls Ft and switching speeds.TR controls switching storage times.

The standard bipolar transistor Spice model includes a parameterthat allows BF, the hFE parameter, to vary with temperature. This

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AN23 - 24 AN23 - 25

parameter is called XTB and defaults to zero, Eg. no temperaturedependence. If hFE temperature effects are of i nterest, then thefollowing values may be used to provide an estimate, or a starting pointfor further investigation. It is suggested that the appropriate datasheet hFE profile is examined, and a Spice test circuit created thatsimulates the device in question and generates a set of hFE curves. Two or three such iterations should normally be sufficient to define avalue for XTB in each case.

Polarity XTBNPN 1.6PNP 1.9

Please remember that these notes are only a rough guide as to theeffect of model parameters. Also, many of the parameters areinterdependent so adjusting one parameter can affect many devicecharacteristics.

At Zetex, we have endeavoured to make the models perform as closelyto actual samples as possible but some compromises are forcedwhich can result in simulation errors under some circumstances.Themain areas of error observed so far have been:-

1. Spice is often over optimistic in the hFE a transistor will givewhen operated above i t ’s data sheet current ratings. This isparticularly true for a high voltage transistor operated at a lowcollector-emitter voltage.

2. Spice can be pessimistic when predicting switching storage timewhen current is extracted from the base of a transistor to speedturn-off.

Darlington Models

These are subc i rcu i ts us ing a s tandard t rans is to r mode l . ADarlington model looks like:-

*ZETEX BCX38B Darlington Spice Subcircuit Last revision 4/9/90*.SUBCKT BCX38B 1 2 3* C B EQ1 1 2 4 SUB38B

Q2 1 4 3 SUB38B 12.75*

.MODEL SUB38B NPN IS=1.1E-14 ISE= etc+ etc.ENDS BCX38B

Note that because Zetex Darlingtons are monolithic, the twotransistors used are identical in all respects other than size.(The number at the end of the Q2 line multiplies the size of theSUB38B transistor by 12.75 - the ratio of the areas of the inputand output transistors for this device).

MOSFET Models

None of Spice’s standard MOSFET models fit the characteristics ofvert ica l MOSFETs too wel l . Consequent ly the models of ZetexMOSFETs supplied on this disc have been made using subcircuitsthat include additional components to improve simulation accuracy.

A typical MOSFET model:-

*ZETEX ZVN4106 MOSFET Spice Subcircuit Last revision 11/91*.SUBCKT ZVN4106 3 4 5*Nodes D G SM1 3 2 5 5 MOD1 L=1 W=1RG 4 2 343RL 3 5 6E6D1 5 3 DIODE1.MODEL MOD1 NMOS VTO=2.474 RS=1.68 RD=0.0 IS=1E-15 KP=-.296+CGSO=23.5P CGDO=4.5P CDB=35.5P PB=1 LAMBDA=267E-6.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222.ENDS ZVN4106*

In the NMOS model,

VTO defines Vgs(th).RS and RD add series terminal resistance.IS controls the behaviour of the model’s body diode.KP controls GmLAMBDA controls variation of drain current with drain-source

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parameter is called XTB and defaults to zero, Eg. no temperaturedependence. If hFE temperature effects are of i nterest, then thefollowing values may be used to provide an estimate, or a starting pointfor further investigation. It is suggested that the appropriate datasheet hFE profile is examined, and a Spice test circuit created thatsimulates the device in question and generates a set of hFE curves. Two or three such iterations should normally be sufficient to define avalue for XTB in each case.

Polarity XTBNPN 1.6PNP 1.9

Please remember that these notes are only a rough guide as to theeffect of model parameters. Also, many of the parameters areinterdependent so adjusting one parameter can affect many devicecharacteristics.

At Zetex, we have endeavoured to make the models perform as closelyto actual samples as possible but some compromises are forcedwhich can result in simulation errors under some circumstances.Themain areas of error observed so far have been:-

1. Spice is often over optimistic in the hFE a transistor will givewhen operated above i t ’s data sheet current ratings. This isparticularly true for a high voltage transistor operated at a lowcollector-emitter voltage.

2. Spice can be pessimistic when predicting switching storage timewhen current is extracted from the base of a transistor to speedturn-off.

Darlington Models

These are subc i rcu i ts us ing a s tandard t rans is to r mode l . ADarlington model looks like:-

*ZETEX BCX38B Darlington Spice Subcircuit Last revision 4/9/90*.SUBCKT BCX38B 1 2 3* C B EQ1 1 2 4 SUB38B

Q2 1 4 3 SUB38B 12.75*

.MODEL SUB38B NPN IS=1.1E-14 ISE= etc+ etc.ENDS BCX38B

Note that because Zetex Darlingtons are monolithic, the twotransistors used are identical in all respects other than size.(The number at the end of the Q2 line multiplies the size of theSUB38B transistor by 12.75 - the ratio of the areas of the inputand output transistors for this device).

MOSFET Models

None of Spice’s standard MOSFET models fit the characteristics ofvert ica l MOSFETs too wel l . Consequent ly the models of ZetexMOSFETs supplied on this disc have been made using subcircuitsthat include additional components to improve simulation accuracy.

A typical MOSFET model:-

*ZETEX ZVN4106 MOSFET Spice Subcircuit Last revision 11/91*.SUBCKT ZVN4106 3 4 5*Nodes D G SM1 3 2 5 5 MOD1 L=1 W=1RG 4 2 343RL 3 5 6E6D1 5 3 DIODE1.MODEL MOD1 NMOS VTO=2.474 RS=1.68 RD=0.0 IS=1E-15 KP=-.296+CGSO=23.5P CGDO=4.5P CDB=35.5P PB=1 LAMBDA=267E-6.MODEL DIODE1 D IS=1.254E-13 N=1.0207 RS=0.222.ENDS ZVN4106*

In the NMOS model,

VTO defines Vgs(th).RS and RD add series terminal resistance.IS controls the behaviour of the model’s body diode.KP controls GmLAMBDA controls variation of drain current with drain-source

voltage when operated in the linear region.CGDO controls Crss.CGSO controls Ciss.CBD controls Coss.

Added to Spice’s standard NMOS model are a gate resistor to controlswitching speeds, a drain-source resistor to control leakage and adrain-source diode to accurately reflect the performance of theMOSFET’s body diode.The MOSFET models mirror the performance of the real devices wellin most areas. One area not covered however is the way that Crssand Coss varies with drain-source voltage. Thus if the models areused a t a d ra in -sou rce vo l tage wel l away f rom da ta sheetcapacitance definition voltages, and capacitance is critical,thenthe values used for CGSO and CGDO may need adjustment.

Diode Models

Diodes from Zetex’s Switching and Varicap range are presentlymodelled on this disc. They use a standard Spice diode model and atypical file appears as follows:-

*ZETEX ZC830A Spice Model Last revision 4/3/92*.MODEL ZC830A D IS=5.355E-15 N=1.08 RS=0.1161 XTI=3+ EG=1.11 CJO=19.15E-12 M=0.9001 VJ=2.164 FC=0.5+ BV=45.1 IBV=51.74E-3 TT=129.8E-9* + ISR=1.043E-12 NR=2.01 (INCLUDE FOR LATER SPICE VERSIONS)**NOTES: FOR RF OPERATION ADD PACKAGE INDUCTANCE 0F 2.5E-9H AND SET*RS=0.68 FOR 2V, 0.60 FOR 5V, 0.52 FOR 10V OR 0.46 FOR 20V BIAS.*

In this model,

IS contols forward and reverse current against voltage.N controls forward current against voltage.RS controls forward voltage at high current.CJO, M and VJ control variation of capacitance with voltage.BV and IBV control reverse breakdown characteristics.TT controls switching reverse recovery characteristics.

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ISR and NR (if activated) control reverse biased leakage.

For operation at RF (which would be the norm for a varicap diode)it is recommended that a 2.5nH series inductor be added as anex t ra c i r cu i t e lement to correc t fo r the inheren t packageinductance. Also, to give the varicap diode it’s correct Q, themodel value for RS should be changed to the appropriate figuresuggested in the NOTES for the expected reverse bias.

The switching diode models may include a constant value capacitorrather than the parameters CJO etc if chip and packaging straysgreatly exceed true junction capacitance values.

________________________________________________________________

Further Information

Zetex’s library of Spice models is being continuously updated soif the model you require does not appear on this disc, pleasecontact us at the address given below or through your local Zetexoffice. If you have any problems with the models supplied here, youmay use the same address to request applications assistance.

Zetex plcFields New Road, Chadderton, Oldham, OL9 8NP, United KingdomTelephone (44)161-627-5105 (Sales), (44)161-627-4963 (General Enquires)Facsimilie: (44)161-627-5467

voltage when operated in the linear region.CGDO controls Crss.CGSO controls Ciss.CBD controls Coss.

Added to Spice’s standard NMOS model are a gate resistor to controlswitching speeds, a drain-source resistor to control leakage and adrain-source diode to accurately reflect the performance of theMOSFET’s body diode.The MOSFET models mirror the performance of the real devices wellin most areas. One area not covered however is the way that Crssand Coss varies with drain-source voltage. Thus if the models areused a t a d ra in -sou rce vo l tage wel l away f rom da ta sheetcapacitance definition voltages, and capacitance is critical,thenthe values used for CGSO and CGDO may need adjustment.

Diode Models

Diodes from Zetex’s Switching and Varicap range are presentlymodelled on this disc. They use a standard Spice diode model and atypical file appears as follows:-

*ZETEX ZC830A Spice Model Last revision 4/3/92*.MODEL ZC830A D IS=5.355E-15 N=1.08 RS=0.1161 XTI=3+ EG=1.11 CJO=19.15E-12 M=0.9001 VJ=2.164 FC=0.5+ BV=45.1 IBV=51.74E-3 TT=129.8E-9* + ISR=1.043E-12 NR=2.01 (INCLUDE FOR LATER SPICE VERSIONS)**NOTES: FOR RF OPERATION ADD PACKAGE INDUCTANCE 0F 2.5E-9H AND SET*RS=0.68 FOR 2V, 0.60 FOR 5V, 0.52 FOR 10V OR 0.46 FOR 20V BIAS.*

In this model,

IS contols forward and reverse current against voltage.N controls forward current against voltage.RS controls forward voltage at high current.CJO, M and VJ control variation of capacitance with voltage.BV and IBV control reverse breakdown characteristics.TT controls switching reverse recovery characteristics.

AN23 - 26 AN23 - 27

ISR and NR (if activated) control reverse biased leakage.

For operation at RF (which would be the norm for a varicap diode)it is recommended that a 2.5nH series inductor be added as anex t ra c i r cu i t e lement to correc t fo r the inheren t packageinductance. Also, to give the varicap diode it’s correct Q, themodel value for RS should be changed to the appropriate figuresuggested in the NOTES for the expected reverse bias.

The switching diode models may include a constant value capacitorrather than the parameters CJO etc if chip and packaging straysgreatly exceed true junction capacitance values.

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Further Information

Zetex’s library of Spice models is being continuously updated soif the model you require does not appear on this disc, pleasecontact us at the address given below or through your local Zetexoffice. If you have any problems with the models supplied here, youmay use the same address to request applications assistance.

Zetex plcFields New Road, Chadderton, Oldham, OL9 8NP, United KingdomTelephone (44)161-627-5105 (Sales), (44)161-627-4963 (General Enquires)Facsimilie: (44)161-627-5467

Appendix B

References

1. “An Integral Charge Control Model ofBipolar Transistors”, Gummel and H.C.Poon, Bell Syst. Tech. J., Vol. 49, May 1970.

2. “Modeling the Bipolar Transistor”CAD for Electronic Circuits , Volume 1,Ian E. Getreu. E lsevier Scientif icPublishing Company. ISBN 0-444-41722-2.

3 . “MicroSim PSPICE A/D CircuitAnalysis Reference Manual”, AnalogDevices, Pages 170-178.

4.”SPICE- A Guide to Circuit Simulation& Analysis Using PSPICE” , Paul W.Tuinenga. Prentice-Hall, Inc. ISBN0-13-747270-6.

5. “Measuring Small Signal CommonEmitter Current Gain of Transistors atHigh Frequencies” ASTM Standard, Vol.10.04 Electronics, F632-79.

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Note 1: Circuit diagrams and waveformsreproduced from PSpice “Schematics”and “Probe” screens, with permission ofMicroSim Corporation.

understanding model parameters and applications … · 2016-11-22 · application note 23 issue 2...

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