single phase transformerless inverter topologies for grid-tied

Single phase transformerless inverter topologies for grid-tiedphotovoltaic system: A review

Monirul Islam a,n, Saad Mekhilef a,n, Mahamudul Hasan b

a Power Electronics and Renewable Energy Research Laboratory (PEARL), Department of Electrical Engineering, Faculty of Engineering, University of Malaya,Kuala Lumpur 50603, Malaysiab Department of Mechanical Engineering, University of Malaya, Kuala Lumpur 50603, Malaysia

a r t i c l e i n f o

Article history:Received 10 October 2013Received in revised form12 December 2014Accepted 4 January 2015

Keywords:Common mode voltageGrid connectedLeakage currentRenewable energyPhotovoltaicTransformerless inverter

a b s t r a c t

Grid-tied inverters are the key components of distributed generation system because of their function asan effective interface between renewable energy sources and utility. Recently, there has been anincreasing interest in the use of transformerless inverter for low-voltage single-phase grid-tiedphotovoltaic (PV) system due to higher efficiency, lower cost, smaller size and weight when comparedto the ones with transformer. However, the leakage current issues of transformerless inverter, whichdepends on the topology structure and modulation scheme, have to be addressed very carefully. Thisreview focuses on the transformerless topologies, which are classified into three basic groups based onthe decoupling method and leakage current characteristics. Different topologies under the three classesare presented, compared and evaluated based on leakage current, component ratings, advantages, anddisadvantages. An examination of demand for the inverter, the utility grid, and the PV module arepresented. A performance comparison in MATLAB/Simulink environment is done among differenttopologies. Also an analysis has been presented to select a better topology. Finally, based on the analysisand simulation results, a comparison table has been presented. Furthermore, some important experi-mental parameters have been summarized.

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Contents

1. Introduction . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22. Grid-tied photovoltaic inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.1. Classification of grid-tied PV inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1.1. Central inverters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1.2. String inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1.3. Module integrated inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32.1.4. Multi-string inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3

2.2. Design of grid-tied PV inverter . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33. Requirements of the grid-tied PV system. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4

3.1. Requirements of the grid . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43.2. Requirements of the photovoltaic module . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6

4. Transformerless inverter for grid-tied PV system . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64.1. Parasitic capacitance and leakage current issues . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 64.2. Classification of transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 74.3. Zero state decoupled transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8

4.3.1. H5 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.3.2. HERIC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 84.3.3. H6-type MOSFET inverter topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94.3.4. Improved H6 topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

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n Corresponding authors.E-mail addresses: [email protected] (M. Islam),

[email protected] (S. Mekhilef).

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4.3.5. Highly reliable and efficient (HRE) topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94.4. Zero-state mid-point clamped transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

4.4.1. H6 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 94.4.2. HB-ZVR topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104.4.3. oH5 topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104.4.4. PN-NPC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10

4.5. Solidity clamped transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104.5.1. Neutral point clamped three-level VSI . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 104.5.2. Active NPC topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.5.3. Dual-parallel-buck converter. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.5.4. Virtual DC bus topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.5.5. Flying capacitor topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 114.5.6. Conergy NPC topology. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12

5. Performance comparison of different transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 136. Analysis and discussion. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 147. Conclusion . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15Acknowledgments . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16Appendix A. Important experimental parameters of different transformerless topologies . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16References . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

1. Introduction

The conventional generation systems such as coal fired, gas andnuclear power as well as hydroelectric dams are centralized andoften require electricity to be transmitted over long distances. Thesecurity and stability of the conventional electrical power systemare under threat due to a number of blackouts caused by chainfailure [1] and electric grid ruptures caused by extreme weather[2]. In contrast, distributed energy resources such as solar power,wind power, biomass, and biogas are decentralized, modular andmore flexible. As well, these energy sources have the advantagethat the power is produced in close proximity to where it isconsumed [3,4]. This way the losses due to transmission lines canbe reduced. In addition, the constant consumption of fossil fuels isleading to energy crisis and increasing environmental pollutionproblems. Therefore, the distributed energy resources, particularlyPV and wind power basis [5], have achieved great response incurrent years to meet the world energy demand and become theimportant alternatives of traditional power sources [3,4,6].

Among a variety of renewable energy sources, PV is predictedto have the biggest generation, up to 60% of the total energy by theend of this century [7,8], because the energy which is convertedinto electrical energy is the light from the sun, which is free,available almost everywhere and will still be present for millionsof years long after all non-renewable energy sources have beendepleted [7,9]. Though the PV module is still expensive, due to thelarge-scale manufacturing it is becoming increasingly cheaper inthe last few years. In addition, the PV module has no moving parts,which have made it a very robust, long lifetime and low main-tenance device. Based on the newest report of InternationalEnergy Agency (IEA) on installed PV power, the milestone of100 GW PV system all over the world was achieved at the end of2012, and increased to 140 GW at the end of 2013 which is shownin Fig. 1 [10].

Fig. 2 shows the share of grid-tied and off-grid PV installation.It can be seen that the off-grid market can hardly be comparedwith the grid-tied market. The evaluation of the share of grid-tiedPV market per region from 2000 to 2013 is shown in Fig. 3. ThoughAsia started to dominate the market in the early 2000, after 2004 agreat development can be seen in Europe. While Europe and Asiapresented a major part of grid-tied PV installation globally in 2013,the Middle East & Africa started to grow in 2012 and 2013.However, for grid-tied PV system, the power electronic technologyplays an important role in the integration of PV energy sources

Fig. 1. Evaluation of PV installation [10].

Fig. 2. Share of grid-connected and standalone PV installation [10].

M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–8670

into the utility grid. Generally, a single-phase power converter isused to process the power of PV energy sources with certainmatters like efficiency and cost as the main factors.

The scope of this paper is to provide an overview and discusssome trends in grid-tied photovoltaic inverter. Firstly, the overviewof grid-tied PV system is presented including different types of PVinverter and the examination of demands for the utility grid, andthe PV modules. Further, the leakage current issues of transformer-less inverter for grid-tied PV system are discussed. Next, a review oftransformerless topologies for grid-tied PV system by emphasizingthe leakage current and efficiency is presented. At last, simulationsare carried out of different topologies to compare their perfor-mance. Finally, the approaches are further discussed and evaluatedto select the most suitable topologies for future grid-tied PV system.

2. Grid-tied photovoltaic inverter

2.1. Classification of grid-tied PV inverter

The general classifications of grid-tied PV inverters are asfollows [11–15]:

� Central inverter;� String inverter;� Module integrated inverter;� Multi-string inverters.

2.1.1. Central invertersThe central inverter system depicted in Fig. 4(a) was imple-

mented in the past technology [15], where PV plants bigger than10 kWp were prepared in series or parallel strings and connectedto the inverter. The inverters were mostly connected to a three-phase application; thus no decoupling was necessary. The voltagegenerated by the series connected modules was high enough tosatisfy the input voltage condition of the inverter [12]. However,this inverter had some significant disadvantages such as highpower losses due to centralized maximum power point tracking(MPPT), high voltage DC cables between PV panels and invertersdue to high input voltage, non-flexible design, losses in the string-diodes, and being expensive. Consequently, it was not possible toacquire the advantages of huge production. Furthermore, the

power delivered to the grid by the central inverter was of verypoor quality involving many current harmonics.

2.1.2. String inverterThe string inverter that offers a number of advantages are

leading the present technology [15]. Fig. 4(b) describes the stringinverter system, where a single PV string made by series con-nected solar panels is coupled to an inverter. The string voltagemay be sufficient, and thus voltage boosting is not required. Thenormal operating voltage of string inverter is 340–510 VDC for230 VAC application. The opportunity of using less PV modulesconnected in series is also available if a DC–DC booster or a linefrequency transformer has been used. Compared to the centralinverter, the string inverter has several advantages such as nostring diode losses, individual MPPTs can be applied for everystring, lower price due to huge production, and overall higherefficiency [13,14].

2.1.3. Module integrated inverterThe module integrated inverter system is shown in Fig. 4(c),

where an AC module made by a single solar panel and its owninverter is connected to the grid. There is no mismatch betweenthe PV modules; as a result, the power loss is well minimized. It isalso possible to obtain maximum power from the PV module as aresult of its own inverter and MPPT [11]. The advantage of an easyexpanding of the system is available here due to the modularstructure. The main disadvantage is the reduced overall efficiencybecause of higher voltage amplification and installation cost.However, this can be overcome by huge production, leading tolow manufacturing and retail costs.

2.1.4. Multi-string inverterThe multi-string inverter is the evaluation of string inverter

depicted in Fig. 4(d), where each string made of several solarpanels is coupled to its own DC-to-DC converter with individualMPPT and feed energy to a common DC to AC inverter. Conse-quently, each PV power plant with a few modules can be func-tioned separately. The advantages of string and module integratedinverter is combined here. Since each PV string is controlledindividually, the overall efficiency is higher. There are severaladvantages of multi-string inverters such as cost reduction, moreflexible, small DC-link capacitor, and high energy reveal due tolocal MPP tracking and optimum monitoring of the PV system[12,16].

2.2. Design of grid-tied PV inverter

The PV generates DC voltage; thus, it requires a converter toconvert into a voltage of corresponding amplitude at the mainfrequency for feeding it into utility grid as shown in Fig. 5. Most ofthe countries report installing PV system by counting DC power,but some report AC power also. The inverter role in grid-tied PVsystem is to be the interface between two energy sources: the PVmodule on one side and the utility grid on the other side. Since theinverter converts DC power of PV module into AC power forfeeding it into utility grid, it is responsible for power quality thatneeds to be satisfied by the requirement of different standards,which are briefly described in the next section. Depending on thegalvanic isolation between the PV module and the grid, the grid-tied PV inverter can be categorized as isolated or non-isolated. Thegalvanic isolation between the PV module and the grid can beobserved by using a line frequency transformer or a high fre-quency transformer that adjusts converter DC voltage [6,17,18].Due to size, weight and price in favor of high frequency transfor-mers, the tendency of removing the line frequency transformers is

Fig. 3. Share of grid-connected PV market per region [10].

M. Islam et al. / Renewable and Sustainable Energy Reviews 45 (2015) 69–86 71

increased when designing the new converter. Also the existence ofhigh-frequency transformer requires several power stages, whichmakes reducing cost and increasing efficiency a challenging task[19–21]. On the other hand, transformerless grid-tied inverter hasthe benefits of lower cost, higher efficiency, smaller size, andweight when compared to the ones with transformer [22–28].Furthermore, during the last few years, a change of paradigmconcerning the size of the grid-tied inverter has been observed[29,30]. Because of some limitations of big central inverters ofpower more than 100 kW, the present technology consists of thesmall size string or multi-string inverters which improve the MPPTof large PV groups of panel [14,31,32].

3. Requirements of the grid-tied PV system

The photovoltaic system connected to the grid involves twomajor tasks: (1) it must be ensured that the solar panels are

operated at MPP; and (2) the injected current to the grid must besinusoidal which has to comply with some specific standards. Inthis section, these tasks are further investigated.

3.1. Requirements of the grid

The grid connected PV system must comply with some specificstandards that are regulated by the utility in each country such asIEEE 1547.1-2005, VDE0126-1-1, EN 50106, and IEC61727. Thesestandard deal with matters like total harmonic distortion (THD)and individual harmonic current levels, injected DC current leveland leakage current, range of voltage and frequency for regularoperation, power factor (PF), detection of islanding operation(islanding or non-islanding functions), grounding of the system,and automatic reconnection and synchronization [33–36]. Table 1summarizes the requirements of IEEE 1547 standard [14,37].

As seen in Table 1, the IEEE 1547 standard set some restrictionson maximum acceptable DC current injection into the utility grid.

Fig. 4. Different types of grid-tied PV inverter: (a) central inverter; (b) string inverter; (c) module inverter; and (d) multi-string inverter.


Generally, the saturation of distribution transformer is neglectedby limiting the DC current injection [38,39]. Nevertheless, the limitis quite small in IEEE 1547 standard (o0.5% of rated outputcurrent) and it is difficult to maintain this value precisely withthe exciting circuit inside the inverter. Rather this can be sup-pressed by providing a galvanic isolation between PV module andthe grid. However, this matter is a great concern in case oftransformerless inverter and different control strategies have beeninvestigated to effectively limit the DC current injection into theutility grid [40–42]. The DC current injection requirement given bydifferent standards could be summarized as shown in Table 2.

The EN 50106 standard deals with the voltage characteristics ofelectrical energy in the public distribution system. It defines therequirements of the main voltages and their permitted deviationranges at the point of common coupling (PCC) in low voltage andmedium voltage distribution system under normal operatingcondition. Table 3 shows the requirement of the EN 50106standard. In the table, low and medium voltages are defined asthe phase–phase nominal root mean square (RMS) voltage thatdoes not exceed 1000 V for low voltage and lies between 1 and35 kV for medium voltage.

The German VDE-0126-1-1 standard is the only standard thatspecifically deals with transformerless PV inverter concerning faultor leakage current levels. According to VDE-0126-1-1 standard, thedisconnection time of the inverter from the grid is 0.3 s when theRMS value of leakage current is greater than 30 mA. The RMS

Table 2Maximum DC current injection described in different standard.

Standard IEC61727 VDE0126-1-1 IEEE1547

DC current injection o1% of rated output current o1A o0.5% of rated output current

Table 3Requirements of the standard EN 50106 [43].

Parameters Characteristics of the supply voltage

Low voltage Medium voltage

Power frequency 71% (49.5–50.5 Hz) for 99.5% of week 71% (49.5–50.5 Hz) for 99.5% of week�6%/þ4% (47–52 Hz) for 100% of week �6%/þ4% (47–52 Hz) for 100% of week

Voltage magnitude variations 710% for 95% of week 710% for 95% of weekRapid voltage changes 5% Normal 4% Normal

10% Infrequently 6% InfrequentlyPltr1 for 95% of week Pltr1 for 95% of week

Supply voltage dips 10–50% 10–15%Short interruptions of supply voltage (up to 3 min) (up to 3 min)

few tens – few hundreds/year few tens – few hundreds/yearDuration: 70% of themo1 s Duration: 70% of themo1 s

Long interruptions of supply voltage (longer than 3 min) (longer than 3 min)o10–50/year o10–50/year

Temporary power frequency overvoltage o1.5 kV RMS 1.7 Uc (solid or impedance earth)2.0 Uc (unearthed or resonant earth)

Transient overvoltage Generallyo6 kV, Not definedoccasionally higher; rise time: ms – ms

Table 4Leakage current value and their correspondingdisconnection times listed in VDE 0126-1-1 stan-dard [33].

Leakage current value(mA)

Disconnection time(s)

30 0.360 0.15

100 0.04

VgPV Filter

Lowfrequency

transformer

Converter

VgPV

Highfrequency

transformer

Converter

F il ter

VgPV

Converter

Filter

Fig. 5. Grid-tied PV system using (a) grid size low-frequency transformer; (b) DCside high-frequency transformer; and (c) transformerless inverter.

Table 1IEEE 1547 requirements for grid connection [14].

Nominal power 30 kWHarmonic currents (2–10) 4.0%

(11–16) 2.0%(17–22) 1.5%(23–34) 0.6%(435) 0.3%THD 5%

DC current injection o0.5% of rated output currentAbnormal voltage Vo50% or V4137% 6 cyclesdisconnection 50%oVo88% or 110%oVo137% 120 cyclesAbnormal frequency forated–0.7 Hz 6 cyclesdisconnection f4ratedþ0.5 Hz 6 cycles


values of the fault or leakage current and their correspondingdisconnection times are detailed in Table 4.

3.2. Requirements of the photovoltaic module

A model for PV module and its electrical characteristics areillustrated in Fig. 6. The most common material for the solar cell iscrystalline silicon which is divided into multiple categories accord-ing to the crystallinity and crystal size as mono-crystalline silicon,poly-crystalline silicon, ribbon silicon, and mono-like-multi sili-con. Analysts have predicted that the cost of polycrystalline siliconwill drop as companies build additional poly-silicon capacityquicker than the industry's demand. The MPP voltage range forthis kind of PV modules is normally defined between 23 and 38 V.On the other hand, the amount of material required for creatingthe active material of solar cell is reduced by thin film technolo-gies. Since silicon solar panels only use one pane of glass, thin filmpanels are approximately twice as heavy as crystallinesilicon panel.

The PV module must be operated at the MPP that has to beguaranteed by the inverter. Generally, most of the energy iscaptured at MPP, accomplished by MPP tracker (MPPT). In orderto operate the PV module around MPP without excessive variation,it is necessary to reduce the ripple at the terminal of the PVmodule. The relationship between the amplitude of the voltageripple and the utilization ratio can be found from the analysis ofthe circuit shown in Fig. 6, which can be expressed as [44]

Δv¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi2ðKPV�1ÞPMPP

3αVMPPþβ

s¼ 2

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiffiðKPV�1ÞPMPP

d2PPV=dV2

PV

sð1Þ

where Δv is the voltage ripple, PMPP and VMPP are the power andvoltage at MPP, α and β are the coefficients which describe thesecond order Taylor approximation of the current and KPV is theutilization ratio which is given from the ratio of average generatedpower to the theoretical MPP power. The coefficient can becalculated as follows [44]:

iPV ¼ αV2PVþβVPVþγ ð2Þ

VPV � VMPPþΔv sin ωtð Þ ð3Þ

α¼ 12d2IMPP

dV2MPP

ð4Þ

β¼ dIMPP

dVMPP�2αVMPP ð5Þ

γ ¼ αV2MPP�

dIMPP

dVMPPVMPPþ IMPP ð6Þ

Based on the calculations, the utilization ratio will be 98% if theamplitude of the ripple voltage is lower than 8.5% of the MPPvoltage. As an example, in order to obtain a utilization ratio of 98%

for a PV module with an MPP voltage of 35 V, the amplitude of theripple voltage should not exceed 3 V.

4. Transformerless inverter for grid-tied PV system

4.1. Parasitic capacitance and leakage current issues

The PV module generates an electrically chargeable surfacearea which faces a grounded frame. In case of such configuration, acapacitance is formed between the PV module and the ground.Since this capacitance occurs as an undesirable side effect, it isreferred to as parasitic capacitance. The value of the parasiticcapacitor depends on many factors such as solar panel and framestructure, surface of cell, distance between cells, weather condi-tion, humidity, dust or salt covering the PV panels, etc. [45–48].In [49], the parasitic capacitance of Soleil FVG 36, Kyocera KS10,and BPSolar MSX120 multi-crystalline PV arrays has been mea-sured at different atmospheric conditions. It can be seen that themaximum value of 75 nF/kW has been measured for BPSolarMSX120 PV module by considering the worst-case scenario. It isalso mentioned that a value of 1000 nF/kW could be measured forthin film modules due to the metallic sheet on which the shellshave been installed. Therefore, a non-negligible parasitic capaci-tance is present in every PV installation.

In order to remove the effect of leakage current and parasiticcapacitance on the grid connected PV system, a transformer isused that confirms the galvanic isolation between the PV moduleand the grid. However, in case of transformerless inverter, agalvanic connection between the PV module and the grid existsthat can create a common-mode resonant circuit [46,50,51].An alternating CM voltage, which mostly depends on the topologystructure and control scheme, can electrify the resonant circuitand may lead to a high ground leakage current [48,52]. In order toanalyze the CM characteristics, full-bridge (FB) transformerlessinverter for the single-phase grid-tied PV system is consideredwhich is shown in Fig. 7, where LA, LB and Co make up the low passLC type filter and Cdc represents the DC-link capacitor. LCM and LDMdenote the common-mode (CM) and differential-mode (DM)

VgVpv

S1 S3

S2 S4

LA

LB

CoA

B

N

P

PV CV

V

C C i

LDM LCM

C

Z

C C

Fig. 7. Single-phase transformerless FB inverter for the grid-tied PV system.

iSC UPVid

iPV

UPVPPV

iPViSC

PMPP

UMPP IMPP,

uOCFig. 6. Characteristics and model of a PV cell: (a) electrical model with current and voltage defined and (b) electrical characteristics of PV cell.


inductor, respectively, and CDM and CCM are the DM and CMcapacitors, respectively, in the EMI filter.

The voltage between the mid-points A & B, of the bridge-legand the reference terminal N, is symbolized as VAN and VBN, andimposed by the switches modulation scheme. Therefore, these twooutputs can be assumed as controlled voltage sources and sub-stituted in Fig. 7. According to the definition of CM and DM voltage

VCM ¼ 1=2 VANþVBNð Þ ð7Þ

VDM ¼ VAN�VBN ð8Þwhere VCM and VDM are, respectively, the CM and DM voltages.Solving Eqs. (7) and (8); VAN and VBN can be expressed as follows:

VAN ¼ ð1=2ÞVCMþVDM ð9Þ

VBN ¼ ð1=2ÞVCM�VDM ð10ÞIn order to achieve the CM model at switching frequency, Eqs.

(9) and (10) have been substituted for the bridge-leg in Fig. 7 andthe new model can be obtained as shown in Fig. 8.

According to the ‘superposition principle’, the differentialbranch and element can be removed while the CM branch andelement are retained. Moreover, the grid voltage can be shortened

at medium frequency range. Finally, an equivalent CM circuit couldbe drawn as shown in Fig. 9.

From the simplified circuit made in Fig. 9, the total CM voltagefor single-phase FB inverter can easily be derived as follows:

VtCM ¼ VCMþVDM

2LB�LALAþLB

ð11Þ

In the half-bridge inverter family, one of the filter inductors LAor LB is commonly zero. On the other hand, LA and LB are usuallydesigned with equal values for the FB inverter family. As a result,the condition of eradicating CM leakage current is concluded as

V tCM ¼ VCM ¼ 1=2 VANþVBNð Þ ¼ constant ð12ÞIt can be seen from Eq. (12) that the CM voltage to be calculated

by the bridge-leg voltage VAN and VBN, which is different fordifferent topologies, mostly depends on the topology structure andthe modulation strategy. Therefore, the topology and the modula-tion strategy must be designed very carefully to minimize groundleakage current for the transformerless grid-tied PV system.

4.2. Classification of transformerless topologies

Despite the numerous transformerless grid-tied PV invertertopologies, most of them can be grouped into three classes as (1)zero-state decouple topologies; (2) zero-state mid-point clampedtopologies; and (3) solidity clamped topologies. The above-mentioned groups are based on the leakage current characteristicsand the decoupling method of transformerless topologies. Thezero-state decouple topologies can decouple the PV module fromthe grid during the freewheeling mode. And the topologies thatdecouple the PV module from the grid during the freewheelingmode and also clamp the short circuited output voltage to themid-point of DC-link have been included in the zero-state mid-point clamped topologies. However, the solidity clamped topolo-gies have solid connection between the PV module and the grid.Fig. 10 details the classification, where the transformerless topol-ogies under each group is presented.

4.3. Zero state decoupled transformerless topologies

The conventional FB topology has a number of features forsingle-phase operation connected with PV module such as simple

(V)

( V)

(A)

VAB

i leakage

VCM

Fig. 11. CM voltage and leakage current for FB inverter by employing bipolar-SPWM.

icmCPVg

Zg

VgCCM

LA

EVDM -VDM

LB

CCM

LCM

CDM

VCM

Fig. 8. The equivalent CM model of transformerless FB inverter.

icm

C

Zg

N

VtCM=VCM+VDM/2(LB-LA/LA+LB)

LA//LB LCM

CCM

Fig. 9. The final CM model of transformerless FB inverter.

Zero state decoupletopologies

Zero state mid-pointclamped topologies

Solidity clamped topologies

Transformerless Topologies

H6 topology [27]HB-ZVR topology [25]oH5 topology [26]PN-NPC topology [62]Topology proposed in [63]

H5 topology [24]HERIC topology [53]H6-type MOSFET inverter topology [59]Improved H6 topology [67]HRE topology [52]Other topologies proposed in [23], [54], [55], [56], [57], [58], [60], and [61].

NPC three-level VSI [40]ANPC topology [79, 80]Dual-parallel-buck topology [22]Virtual DC bus topology[68]Flying capacitor topology [87, 90, 91]

Fig. 10. Classification of transformerless inverter topologies [53,54,56–58,60,61,63,64].


circuit structure, low DC bus voltage compared with half-bridgetopology, low cost, high efficiency, small amount of PV moduleconnected in series and many more. The FB inverter operated withbipolar sinusoidal pulse width modulation (SPWM) generates lowleakage current as shown in Fig. 11. However, it produces highripple at the inverter output, which increases the size of theoutput filter. Consequently, energy conversion efficiency isdecreased. The simulation parameters are given in Table 5. Onthe other hand, the FB inverter operating with unipolar-SPWMintroduces high frequency CM leakage current as shown in Fig. 12.In unipolar-SPWM, the zero voltage state occurs when the bottomor upper switches are off state. The active and zero states occur atevery PWM cycle, as a result the CM voltage fluctuates with highfrequency. In order to ensure almost constant CM voltage, the PVmodule must be decoupled from the grid during the freewheelingperiod. A number of modified FB topologies have been proposed inthe literature by decoupling the PV module from the grid during

the freewheeling period. In this section, the topologies based onzero-state decouple are further reviewed.

4.3.1. H5 topologyAn explicit inverter topology proposed in [24] is called H5

topology as shown in Fig. 13. This topology is patented by theworld famous SMA solar technology, which is enumerated as oneof the world's top producers of PV inverter. It is made up by addingan extra switch with FB topology. The unipolar-SPWM has beenapplied to operate this inverter with three-level output voltage. Inthe positive half cycle of the grid current, switches S4 and S5 arecommutated with switching frequency and the active currentflows through S1, S4, and S5. The zero voltage vectors are achievedwhen S4 and S5 are turned off and the freewheeling current flowsthrough S1 and the body-diode of S3. In the negative half cycle, S5and S2 are switched with switching frequency and the freewheel-ing current flows through S3 and the body-diode of S1. Since theoutput current flows through three switches in the active mode,higher conduction losses are present [69,70]. However, using thistopology, the maximum efficiency and California energy commis-sion (CEC) efficiency have been reported as 98.5% and 98.0%,respectively, for 8 kW inverter [71].

4.3.2. HERIC topologyFull-bridge inverter along with AC bypass (FB-ACBP) topology

has been proposed in [72] as shown in Fig. 14, called HighlyEfficient and Reliable Inverter Concept (HERIC) topology. Thistopology has been implemented in some commercial inverters,especially those from Sunway's converter [22,65]. It has the benefitof three-level output voltage by employing unipolar-SPWM withlow current ripple across the output filter. Two switches are addedin the AC side to provide the path of freewheeling current. In orderto flow the freewheeling current, either S5 or S6 is turned on forpositive or negative half cycle of grid current. Though the PVmodule is decoupled from the grid, a varying CM voltage is presentbecause the potential of the freewheeling path is not clamped tothe half of the DC input voltage. However, the ground leakagecurrent is minimized to an acceptable level [25,72]. Furthermore,the inverter efficiency has been kept high because the load currentis short circuited via S5 or S6 during the freewheeling period [33].

VgVpv

S1 S3

S2 S4

LA

LB

A

B

N

P

S5PV Cdc Co

S6

Fig. 14. HERIC topology.

Table 5Parameters used in simulation.

Inverter parameter Value

Input voltage 400 VDCGrid voltage/frequency 230 V/50 HzRated power 1000 WAC output current 4.2 ASwitching frequency 20 kHzDC bus capacitor 1000 mFFilter capacitor 2.2 mFFilter inductor LA, LB 3 mHPV parasitic capacitor Cpv1, Cpv2 75 nF

VAB

ileakage

VCM

(V)

(V)

(A)

Fig. 12. CM voltage and leakage current for FB inverter by employing unipolar-SPWM.

VgVpv

S1 S3

S2 S4

LA

LB

CoA

B

N

PS5

PV Cdc

Fig. 13. Circuit structure of H5 topology.

VgVpv

S1

S2 S4

LA

LB

A B

N

P

PVCdc

D1

S3

Co

D2S5 S5

Fig. 15. H6-type MOSFET inverter topology.


4.3.3. H6-type MOSFET inverter topologyYu et al. proposed an H6-type MOSFET inverter topology in [59]

by removing the use of low effective IGBTs which is depicted inFig. 15. Unipolar-SPWM can be implemented for this topology withthree-level output voltage. In the positive half cycle of grid current,the freewheeling current flows through S5 and D1, when S1 andS4 are turned off. In contrast, it flows through S6 and D2, when S2and S3 are turned off for the negative half cycle of grid current.Therefore, the reverse-recovery issues are not required for thistopology that allows utilizing MOSFET switches. The indicatedpeak efficiency and European efficiency of H6-type MOSFETinverter on 300 W prototype circuit with 180 VDC bus voltageand 30 kHz operating frequency were 98.3% and 98.1%, respec-tively [59,73]. In the active mode, the grid current flows throughthree switches; as a result, higher conduction losses still remain.Another difficulty is that the anti-parallel diodes of MOSFETs willbe activated if a phase shift occurs between the inverter outputvoltage and current. Consequently, the dependability of the systemwill be reduced due to the low reverse recovery issues of MOSFETsanti-parallel diode [52,73].

4.3.4. Improved H6 topologyAnother H6 topology has been proposed in [67], where the

author has analyzed the effect of switches junction capacitance onthe CM voltage and achieved an improved grid-tied inverter thatcan meet the condition of constant CM voltage. Two extra switchesS5 and S6 are symmetrically added to the FB inverter to developthis topology, which is depicted in Fig. 16. In practical cases, whenthe inverter commutates from one non-decoupling mode to onedecoupling mode, the slope of the leg point voltage VAN and VBN

depends on the junction capacitance of the switches [67,74,75].As a result, the CM voltage is affected by the junction capacitance.

The modulation technique used for this topology is unipolar-SPWM and double frequency SPWM. It has been shown that theCM voltage will be constant if two extra capacitors with the valuesof 29 pF are connected in parallel to the switches S3 and S4 underunipolar-SPWM. On the other hand, under double-frequencySPWM, the CM voltage will be constant if four extra capacitorswith the values of 470 pF are connected in parallel to the switchesS1, S2, S3, and S4. Double-frequency SPWM reduces the currentripples across the output filter which is half if compared with theunipolar-SPWM scheme [67]. The main disadvantage of this

topology is the necessity of additional capacitors which mayincrease the losses.

4.3.5. Highly reliable and efficient (HRE) topologyBin et al. proposed a high reliability and efficiency (HRE)

topology in [52] by using MOSFETs as main power switches, whichis shown in Fig. 17. The HRE topology splits the AC side into twoindividual parts for positive and negative half cycle of grid currentif compared with HERIC topology. Diodes D1–D4 accomplish thevoltage clamping functions for the active switches S1–S4. When S1and S3 are turned off, the freewheeling current flows through S5and D5 decoupling the PV module from the grid for positive halfcycle. On the other hand, when S2 and S4 are turned off, thefreewheeling current flows through S6 and D6 for the negativehalf cycle of grid current. Coupled inductors L1 and L2 areactivated for the positive and negative half cycles, respectively.The reported maximum and CEC efficiencies of the HRE inverteron a 5 kW prototype circuit with 20 kHz switching frequency were99.3% and 99%, respectively. The main topology consists of sixMOSFETs and six diodes which increase the complexity and theinitial cost.

4.4. Zero-state mid-point clamped transformerless topologies

The zero-state mid-point clamped transformerless topologiesare very similar to the zero-state decoupled topologies and themajority of mid-point clamped topologies can be obtained fromdecouple topologies. The only difference is that the short circuitedoutput voltage during freewheeling period is clamped to the mid-point of DC bus. Consequently, the CM voltage kept constantduring the whole period. In this section, zero-state mid-pointclamped transformerless topologies are further investigated.

4.4.1. H6 topologyA topology by adding two switches and a bidirectional clamp-

ing branch with the FB topology has been proposed in [27], calledfull-bridge with DC bypass (FB-DCBP) topology as illustrated inFig. 18. The clamping branch constitutes a capacitive divider andtwo diodes that can clamp the CM voltage to the half of the DCinput voltage. The switches S1 & S4 are commutated with line-frequency and in anti-parallel to S2 and S3, based on whether thegrid voltage is in the positive or negative half period. Duringfreewheeling mode, either diode D1 or diode D2 can be conductedbased on whether the freewheeling path potential (VANEVBN) ishigher or lower than half of the DC link voltage. In this topology,leakage current removal effect depends only on the turn-on speedof the clamping diodes. The main drawbacks of FB-DCBP topologyare that the conduction losses are more due to the inductorcurrent flowing through four switches in the active mode [27].The reported maximum efficiency and European efficiency of H6inverter for 5 kW prototype circuit with 350 VDC input voltagewere 97.4% and 97.16%, respectively.

VgVpv

S1 S3

S2 S4

L

L

Co

C

A

B

N

PS5

PV

S6

C D1

D2

Fig. 18. H6 topology by Gonzalez et al.

VgVpv

S1 S3

S2 S4

LA

LB

CoA

B

N

PS5

PV

S6

Cdc

Fig. 16. Improved H6 topology.

VgVpv

S1

S6

L1

N

P

PV C

D3

D1

S2D4

D5

D2

D6

S4 S3

L2S5

Fig. 17. Highly reliable and efficiency topology by Gu et al.


4.4.2. HB-ZVR topologyFB inverter topology with AC bypass has been proposed in [25]

called H-Bridge Zero Voltage Rectifier (HB-ZVR) topology, wherethe short circuited output voltage during freewheeling period isclamped to the mid-point of the DC bus through a diode rectifierand one bidirectional switch. In order to defend the lower DC linkcapacitor from short circuiting, an extra diode is added as shownin Fig. 19. The operational principle of HB-ZVR topology is verysimilar to the HERIC topology [72]. The gate pulse of S5 in thepositive half-wave is the contrary gate pulse of S1 and S4, with asmall dead time to neglect grid short circuit [25,76]. During thenegative half wave, S5 is controlled using the contrary gate pulseof S2 and S3 and creates zero-voltage state by short-circuiting theoutput of the inverter and clamping them to the mid-point of theDC bus. The clamping function of this topology has been doneusing diode D5, which allows one-directional clamping only if thefreewheeling path potential is higher than the mid-point voltageof the DC link. As a result, CM voltage fluctuation could beobserved when the reverse condition is occurred. Another dis-advantage of this topology is the necessity of dead time whichincreases the distortion of the output current.

4.4.3. oH5 topologyHuafeng et al. proposed a modified H5 topology in [26], called

optimized H5 (oH5) topology which is presented in Fig. 20.A clamping branch consisting of a switch and a capacitor dividerare added with the H5 topology which guarantees that the free-wheeling path potential is clamped to the half of DC bus voltage.Switches S5 and S6 are commutated complementarily during thewhole grid period to ensure the disconnection of PV module fromthe grid. Unfortunately, a dead time must have to be added between

the gate signals of the switches S5 and S6 to avoid the short circuitof the input split capacitor Cdc1. As a result, CM voltage fluctuates indead time [26,55]. Another disadvantage of this topology is thathigher conduction losses still remain due to the inductor currentflowing through three switches in the active mode.

4.4.4. PN-NPC topologyThe neutral point clamped (NPC) topology is an excellent

exploration for the grid-tied PV system [40,77]. Zhang et al.proposed two kinds of switching cells, the positive neutral-pointclamped cell and the negative neutral-point clamped cell to buildNPC topology in [62] called the PN-NPC topology which is illu-strated in Fig. 21. The working principle of the PN-NPC topology issimilar to that of the H6 topology [27]. During freewheeling period,the short circuited output voltage is directly clamped to the half ofDC input voltage through switches S7 and S8. As a result, the CMvoltage is kept constant at VPV/2 and the leakage current is as low asother mid-point clamped topologies. The PN-NPC inverter hasthree-level output voltage with excellent DM characteristics. Themain drawback of this topology is the higher number of switcheswhich leads to more complexity if compared with other topologies.Another difficulty is that the inductor current flows through fourswitches in the positive half cycle of grid current; thus, higherconduction losses are also present in this topology [62].

4.5. Solidity clamped transformerless topologies

In solidity clamped transformerless topologies, a solid connec-tion has been observed between the PV module and the grid in thefreewheeling mode such that the high frequency CM voltage isaimed to be kept constant. Although the common property ofthese topologies is the solid connection, their operating principle,DC bus, boosting, and output voltage characteristics may bedifferent. In this section, some of the solidity clamped transfor-merless topologies are reviewed.

4.5.1. Neutral point clamped three-level VSIThe neutral point clamped half-bridge is the multilevel-based

topology for single phase operation which is mostly used in highpower motor drive applications [77]. Recently, an NPC topologyhas been proposed in [40] for single phase operation to be used inthe grid-tied PV system. It has one leg consisting of four switchesS1–S4 and two diodes D1–D2 to clamp the mid-point voltage asillustrated in Fig. 22. These clamping diodes provide the free-wheeling path for the output current in the freewheeling mode,resulting in the 0V output state [40,65]. The operating principle ofthis topology is very similar to that of the half-bridge topology, butthe efficiency is more and current ripple is less. Furthermore, thehigh frequency CM voltage is kept constant; thus leakage current

VgVpv

S1

S4

LA

N

P

S2

S3

D2

D1

PV

PV

Fig. 22. Neutral point clamped three-level voltage source inverter.

VV

S1 S3

S2 S4

L

L

C

C

A

B

N

P

S5

C

PV

Fig. 19. HB-ZVR topology.

VgVpv

S1 S3

S2 S4

L

L

Co

C

A

B

N

PS5

PV

S6C

Fig. 20. oH5 topology.

VgVpv

S1

S2

S6

LA

LB

AB

N

P

PV

Cdc1

S3

Co

S4

S5

S8

S7

Cdc2

Fig. 21. PN-NPC topology.


is minimized. On the other hand, unipolar-SPWM can be employedto this topology with three-level output voltage as in the FBtopology [51]. The main drawback of this topology is the necessityof higher input voltage 800 V if compared with the FB topology.Therefore, it requires high capacity bank of capacitor, which isanother disadvantage of this topology [66,78].

4.5.2. Active NPC topologyThe modification of NPC topology has also been proposed by

replacing the clamping diodes with power switches, called activeNPC (ANPC) topology as shown in Fig. 23 [79,80]. The ANPCtopology has several ways to clamp the mid-point voltage ifcompared with the conventional NPC topology. When theswitches S5 and S2 are turned on, the upper clamping path isestablished as well as lower clamping path is established byturning on S3 and S6 [81,82]. The key feature of ANPC topologyis the improvement of power loss distribution; thus the powersemiconductors load uniformly and increase the efficiency of theconverter [77,80]. A number of different control strategies for NPCtopology have been proposed in the literature [77,79–83], wherethe author has established various paths of freewheeling currentfor uniform loss distribution.

4.5.3. Dual-parallel-buck converterAraujo et al. proposed a solidity clamped transformerless

topology in [22] called dual-parallel-buck converter as shown inFig. 24. This topology has been derived from [84] and [85] to getreverse power flow. The negative output of PV module is directlyconnected to the neutral of the inverter in the positive half cycle aswell as to the phase in the negative half cycle. Therefore, highfrequency CM voltage oscillation is minimized, resulting in lowleakage current. The inductor current flows through two switchesin the active mode; thus the conduction loss is reduced. Thereported maximum efficiency and European efficiency for a4.5 kW prototype circuit with 16 kHz switching frequency were99% and 98.8%, respectively. The main drawback of this topology isthat the grid will be short circuit if no dead time is present

between switches S3 and S4 through which the grid is directlyconnected [52]. At the moment of zero crossing, a dead time of500 mS has been added that may increase the distortion of theoutput current and reduce the reliability of the topology [22].

4.5.4. Virtual DC bus topologyYunjie et al. proposed a cost-effective PV inverter by introducing

virtual DC bus concept [68]. In order to suppress the leakage current,the parasitic capacitance between the PV module and the ground hasbeen avoided by connecting the grid neutral-line directly to thenegative pole of the DC bus as shown in Fig. 25. Meanwhile, a virtualDC bus is created to provide the negative level. Thus, the inverterobtains three-level output voltage as like the unipolar FB inverterwith good DM characteristics. In the positive half cycle of gridcurrent, switches S1 and S3 are always on and S2 is always off, whileS4 and S5 commutate complementarily with high frequency. In thenegative half cycle, S5 is always on and S4 is always off, while S1 andS3 synchronously and S2 complementarily commutate with switch-ing frequency [68]. The main difficulty of this topology is controllingthe charging of virtual DC bus capacitor by the real bus at everyswitching cycle. Another difficulty of this topology is that the powerswitches are affected by some extra current stresses due to theoperation of switched capacitor, which reduces the efficiency andreliability [67,68].

4.5.5. Flying capacitor topologyFig. 26 shows another half-bridge three-level inverter topology

called flying capacitor (FC) topology that can be considered as anexcellent solution for transformerless PV inverter. In this topology,the clamping diodes have been replaced with a capacitor that“floats” with respect to the DC source reference. The additionallevels are achieved by means of the capacitor and it is mandatoryto confirm a constant voltage across the capacitor at the desired

VgVpv

S1 S2

S4LA

LB

A

B

N

P

PV Cdc

D3

D2S3

D4

Fig. 24. Dual-parallel-buck topology.

Vg

Vpv

S1

S3

S2 S4LA

C1

AN

P

S5

PV

C2

Fig. 25. Circuit structure of virtual DC bus topology.

VgVpv

S1

S4

LA

Co

Cdc1

N

P

S2

S3

Cdc2

PV

S5

S6

Fig. 23. Active NPC topology.

VgVpv

S1

S4

LA

Co

Cdc1

N

P

S2

S3

Cdc2

PVCFC

Fig. 26. Flying capacitor topology.


level, particularly when loading the outer DC link capacitor.However, imbalances can lead to high voltages that can destroythe inverter [86–88]. Therefore, a special circuit for pre-charging

the floating capacitor is required to overcome the undesiredovervoltage, which increases the complexity in the control circuitof FC inverter [69,89,90]. In addition, a high number of capacitorsare required for larger structures. The most interesting feature ofFC inverter is the fault tolerant operation that can be obtained for ahigh number of levels. This characteristic allows the inverter tocontinue the operation even if a single switch fault per phase ormultiple faults in different phase occur [91].

4.5.6. Conergy NPC topologyConergy NPC topology is an excellent alternative of the classical

NPC topology with the output voltage clamped to the neutral-point using bi-directional switches which have been patented byconergy [92] which is shown in Fig. 27(a). An alternative realiza-tion of the same concept has been presented in [93], where theclamping circuit consists of one switch and four diodes as shownin Fig. 27(b). In this topology, the zero-voltage state can beachieved by clamping the output voltage to the ground (middle-point of DC bus) using switches S3 and S4. During the positive halfcycle, S1 and S3 commutate complementarily at the high fre-quency as well as S2 and S4 commutate complementarily withhigh frequency in the negative half cycle. During the wholeprocess, the CM voltage has been clamped to VPV/2 and, as aresult, low leakage current follows through the parasitic capaci-tance [81]. This topology has similar characteristics as the NPChalf-bridge topology, but it shows higher efficiency, which makesit suitable for low power PV application [69].

(A)

ig

VAB

ileakage

VAN

VCM

VBN

(V)

(A)

(V)

(V)

(V)

Fig. 28. CM and DM characteristics of H5 topology.

VgVpv

S1

S4LA

Co

Cdc1

N

P

S2

S3

Cdc2

PV

Vg

Vpv

S1

LA

Co

Cdc1

N

P

S2

S3

Cdc2

PVD1 D3

D4D2

Fig. 27. (a) Conergy NPC topology and (b) variant of conergy NPC topology.

ig

VAB

ileakage

VAN

VCM

VBN

(A)

(V)

(A)

(V)

(V)

(V)

Fig. 29. CM and DM characteristics of HERIC topology.


5. Performance comparison of different transformerlesstopologies

In order to present a performance comparison among thetopologies discussed earlier, simulations were carried out inMATLAB/Simulink software environment based on the parametersgiven in Table 5. The parameters were the same for all thetopologies to make a fair comparison. During the simulation, thePV module, and the stray capacitance between the PV module andthe ground have been replaced with a 400 VDC source and twocapacitors of 75 nF each, respectively. However, for the cases ofNPC and ANPC topology, the input voltage was 800 VDC.

The output waveform and CM behavior of the selected H5, HERIC,H6, oH5, NPC, and ANPC topologies are depicted in Figs. 28–33. It canbe seen that all the topologies are generating three-level outputvoltage which reduces the grid current ripple across the output filterinductor. Therefore, the DM behavior of all the topologies is almostidentical. But it can be observed from Figs. 32 and 33 that for theapplication of 230 VAC, the NPC and ANPC topologies are required tobe implemented with 800 VDC input voltage, which is double ifcompared to the other selected topologies.

As seen in Fig. 28(b), the voltages VAN and VBN of H5 topology arenot clamped at the mid-point of dc-link voltage during the free-wheeling mode, but well clamped to VPV and 0 during active mode.As a result, it fluctuates (from 130 V to 200 V) with switchingfrequency which induces a non-negligible leakage current as shownin Fig. 28(a). The CM characteristic of HERIC topology which is shownin Fig. 29(b) also indicates the CM voltage fluctuation of amplitudearound 200 V with switching frequency. Thus, the leakage current isnot completely eliminated as shown in Fig. 29(b). On the other hand,the voltages VAN and VBN of H6 topology which are shown in Fig. 30(b) are completely complementary to each other; as a result, the CMvoltage kept constant at the mid-point of the DC-link voltage.

ig

VAB

ileakage

VAN

VCM

VBN

(A)

(V)

(A)

(V)

(V)

(V)

Fig. 30. CM and DM characteristics of H6 topology.

ig

VAB

ileakage

VAN

VCM

VBN

(A)

(V)

(A)

(V)

(V)

(V)

Fig. 31. CM and DM characteristics of oH5 topology.

ig

VAB

i leakage

(A)

(V)

(A)

Fig. 32. Inverter output voltage and leakage current of NPC topology.

ig

VAB

ileakage(A)

(V)

(A)

Fig. 33. Inverter output voltage and leakage current of ANPC topology.


Another zero-state mid-point clamped topology (oH5 topology)shows constant CM voltage because the voltages VAN and VBN arecompletely clamped to the mid-point of DC-link during the free-wheeling period which is demonstrated in Fig. 31(b). Thus, lowleakage current is observed for both H6 and oH5 topology aspresented in Figs. 30(a) and 31(a), respectively.

In the case of solidity clamped transformerless topologies, highfrequency CM voltage fluctuation is not present due to the solidconnection between the PV module and grid. The leakage currentdepends on the grid impedance. The leakage current waveform forNPC and ANPC topologies is presented in Figs. 32 and 33. It can beseen that very low leakage current flows through the system.Therefore, it can be concluded that the zero-state decoupled trans-formerless topologies cannot completely eliminate leakage current,while the zero-state mid-point clamp and the solidity clamp trans-formerless topologies present almost zero leakage current.

6. Analysis and discussion

It can be seen that a lot of research on transformerless inverterhave been completed to minimize the leakage current and increasethe efficiency. In this paper, based on the leakage current character-istics and decoupling methods, a large number of transformerlesstopologies have been classified in a small number of basic groups.Furthermore, not only the cause of leakage current but also theoperation principle, advantages and disadvantages of each topologyare investigated. It is shown that the cause of leakage current forzero-state decoupled topologies is the mismatch between theinverter output voltage and DC-link capacitance voltage, while inthe solidity clamped method the neutral line impedance plays animportant role. In mid-point clamped method, the grid voltage isfollowed by the parasitic capacitance voltage; as a result, the

leakage current is very low [55,94]. However, each of the topologyhas some advantages and disadvantages, and it is difficult to narratewhich topology is better than other. In order to select a bettertopology, it is interesting to compare the above-presented topolo-gies by highlighting some key features as follows:

� Number of input capacitor and capacitance: The input capacitorsare necessary for the PV inverter, which supply the ACcomponent of input current. The design and control of DC-link capacitor will be more complex if it is more than one. Inaddition, the necessity of input capacitance for some topologiescan reach high values because of low frequency input current.

� Power semiconductors: The initial cost of PV inverters directlyaffects the total cost of the grid-tied PV system. Therefore, it isvery important to reduce the cost of the inverter. Because of thisreason, the topology with the lowest number of switches could bebetter. Furthermore, the efficiency of the inverter is affected by thepower rating of the switches. Therefore, it would be significant toimplement topologies using low voltage rating switches.

� Efficiency: The key feature of a grid-tied PV inverter is to attainhigher efficiency over a wide load range. Therefore, the topol-ogies with high efficiency could be appropriate alternatives.

� Leakage current: As explained earlier, the most important issueof transformerless PV inverter is leakage current that increasesthe grid current harmonics and system losses, and also createsstrong conducted and radiated electromagnetic interference[62]. Therefore, it is mandatory to reduce the leakage currentwithin the limit described in the international regulations.

According to the above analysis, a comparison among varioustransformerless topologies has been conducted and summarizedin Table 6. It can be seen that most of the topologies under zero-state mid-point clamped and solidity clamped methods need to be

Table 6Comparison of the several existing topologies.

Transformerlesstopologies

Inputcapacitor

Input voltage(230 VAC application)

Switches Diodes Transistorvoltage, V(No. ofswitches)

Outputvoltage level

Leakagecurrent

Maximumefficiency (%)

Zero-state decoupletransformerless topologies

H5 topology 1 400 VDC 5 0 0 1200(5)

3 Low 98.5

HERIC topology 1 400 VDC 6 0 0 1200(6)

3 Low –

H6-type MOSFETinverter topology

1 400 VDC 6 2 250(6)

0 3 Low 98.3

Improved H6topology

1 400 VDC 6 0 600(6)

0 3 Very low 97.1

HRE topology 1 400 VDC 6 6 600(6)

0 3 Low 99.3

Zero-state mid-point clampedtransformerless topologies

H6 topology 2 400 VDC 6 2 600(2)

1200(4)

3 Very low 97.4

HB-ZVR topology 2 400 VDC 5 5 0 1200(5)

3 Low 94.88

oH5 topology 2 400 VDC 6 0 600(2)

1200(4)

3 Very low –

PN-NPC 2 400 VDC 8 0 600(6)

1200(2)

3 Very low 97.8

Solidity clamped transformerlesstopologies

NPC three-level VSI 2 800 VDC 4 2 600(4)

0 3 Very low 98.16

Active NPC topology 2 800 VDC 6 0 0 1200(6)

3 Very low 97.34

Dual-parallel-bucktopology

1 400 VDC 4 4 650(2)

900(2)

3 Low 99.0

Virtual DC bustopology

2 400 VDC 5 0 600(5)

0 3 Low –

Flying capacitor 3 800 VDC 4 0 0 1200(4)

3 Very low –

Conergy NPCtopology

2 800 VDC 4 0 0 1200(4)

3 Very low 97.67


implemented with two input capacitors that can increase thecomplexity of the control circuit. However, these topologiespresent very low leakage current. In contrast, though zero-statedecouple topologies cannot completely eliminate leakage currentbut only one input capacitor is required for them. It can be seenthat some of the topologies could be implemented with lessnumber of switches and also low voltage rating switches.

7. Conclusion

In this paper, a comprehensive review on the grid-tied PV systemfollowed by the single-phase transformerless topologies has beenpresented. Due to the omission of transformer, a resonant circuit canbe created and electrified by the fluctuating CM voltage that dependson the topology structure and modulation scheme. As a result, non-negligible leakage current may flow through the system. Threemethods have been presented based on the decoupling method andleakage current characteristics as (1) disconnecting the PV modulefrom the grid during zero state; (2) clamping the short-circuitedoutput voltage to the half of DC input voltage during freewheelingperiod; and (3) making a solid connection by connecting the neutralline to one pole of PV panels. The operation principle, advantages anddisadvantages of the existing transformerless topologies have been

Table A3Parameters for the H6-type MOSFET inverter topology byYu et al. [59].


Input voltage 180–200 VDCGrid voltage/frequency 120 V/50 HzRated power 300 WSwitching frequency 30 kHzDC bus capacitor 470 mFFilter capacitor 0.68 mFFilter inductor LA, LB 0.8 mHPV parasitic capacitor Cpv1, Cpv2 75 nFPower switches (S1–S6) FDB2710 (250 V)

Table A4Parameters of the improved H6 topology by Yang et al. [67].


Input voltage 380 VDCGrid voltage/frequency 220 V/50 HzRated power 1000 WSwitching frequency 20 kHzDC bus capacitor 940 mFPower switches (S1–S6) IRGB4056DPbFFilter inductor LA, LB 4 mHPV parasitic capacitor Cpv1, Cpv2 75 nF

Table A5Parameters for the HRE topology by Bin et al. [52].


Input voltage 380 VDCGrid voltage/frequency 240 V/60 HzRated power 5000 WAC output current 21 ASwitching frequency 20 kHzPower switches (S1–S6) IPW60R041C6Diodes (D1–D6) APT30DQ60BGFilter inductor L1, L2 0.95 mHPV parasitic capacitor Cpv1, Cpv2 100 nFDigital controller Texas instrument's 28335

Table A6Parameters for the H6 topology by Gonzalez et al.


Input voltage 350–800 VDCGrid voltage/frequency 230 V/50 HzRated power 5000 WSwitching frequency 16 kHzPower switches (S1–S4) Mitsubishi CM100DY-24NF (1200 V)Power switches (S5–S6) IR G4PSC71UG (600 V)Filter inductor LA, LB 3 mH

Table A2Parameters of HERIC topology [95].


Input voltage 350 VDCGrid voltage/frequency 230 V/50 HzRated power 1000 WSwitching frequency 8 kHzDC bus capacitor 250 mFFilter capacitor 2 mFFilter inductor LA, LB 1.8 mH

Table A1Important parameters for H5 topology [26].


Input voltage 340–700 VDCGrid voltage/frequency 240 V/50 HzRated power 1000 WSwitching frequency 20 kHzDC bus capacitor 470 mFFilter capacitor 6.6 mFFilter Inductor LA, LB 4 mHPV parasitic capacitor Cpv1, Cpv2 100 nF

Table A8Parameters for oH5 topology [26].


Input voltage 340–700 VDCGrid voltage/frequency 240 V/50 HzRated power 1000 WSwitching frequency 20 kHzDC bus capacitor Cdc1, Cdc2 470 mF/400 VFilter capacitor Co 6.6 mFFilter inductor LA, LB 4 mHMOSFET S1�S6 IXFN36N100PV parasitic capacitor Cpv1, Cpv2 100 nF

Table A7Parameters for the HB-ZVR topology by Kerekes et al.


Input voltage 350 VDCGrid voltage/frequency 230 V/50 HzRated power 2800 WSwitching frequency 8 kHzPower switches (S1–S5) PM75DSA120 (1200 V)Filter capacitor, Co 2 mFFilter inductor LA, LB 1.8 mHDC bus capacitor 250 mFDead time 2.5 ms


presented. Simulation results have been given to compare theperformance of the topologies. Finally, a discussion has been pre-sented to select a suitable topology. Additionally, a comparison tablehas been accomplished for direct comparison among the topologies.Therefore, it is expected that this review will be helpful for referenceon transformerless grid connected PV inverter for the researchers,engineers, manufacturers and users.

Acknowledgments

The authors wish to acknowledge the financial support fromthe University of Malaya through HIR-MOHE project UM.C/HIR/MOHE/ENG/41 and UMRG project RP015D-13AET.

Appendix A. Important experimental parameters of differenttransformerless topologies

See Appendix tables A1–A13.

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Input voltage 376–537 VDCGrid voltage/frequency 230 V/50 HzRated power 4500 WSwitching frequency 16 kHzDC bus capacitor 1.7 mFFilter capacitor 3.3 mFFilter inductor LA, LB 3 mHSwitches S3–S4 IPW90R120C3Switches S1–S2 IPW60R045CP

Table A13Parameters for active NPC inverter [68].


Input voltage 400 VDCGrid voltage/frequency 230 V/50 HzRated output power 500 WSwitching frequency 20 kHzInput capacitor, C1 470 mFSwitched capacitor, C2 940 mFPower switches IKP15N60TPV panel capacitance, CPV 75 nF


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