protected virtual address mode

7/25/2019 Protected Virtual Address Mode

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PROTECTED VIRTUAL ADDRESS MODE (PVAM)

80286 is the first processor to support the concepts of virtual memory and memory management.

The virtual memory does not exist physically it still appears to be available within the system.

The concept of VM is implemented using hysical memory that the !" can directly access and

secondary memory that is used as storage for data and program# which are stored in secondary

memory initially. The $egment of the program or data re%uired for actual execution at that

instant is fetched from the secondary memory into physical memory. &fter the execution of this

fetched segment# the next segment re%uired for further execution is again fetched from the

secondary memory# while the results of the executed segment are stored bac' into the secondary

memory for further references. This continues till the complete program is executed.

(uring the execution the partial results of the previously executed portions are again fetched into

the physical memory# if re%uired for further execution. The procedure of fetching the chosen

program segments or data from the secondary storage into physical memory is called swapping.

The procedure of storing bac' the partial results or data bac' on the secondary storage is called

unswapping. The virtual memory is allotted per tas'.

The 80286 is able to address ) * byte +2 ,0bytes- of virtual memory per tas'. The complete

virtual memory is mapped on to the )6Mbyte physical memory. f a program larger than

)6Mbyte is stored on the hard dis' and is to be executed# if it is fetched in terms of data or

program segments of less than )6Mbyte in si/e into the program memory by swapping

se%uentially as per se%uence of execution. henever the portion of a program is re%uired for

execution by the !"# it is fetched from the secondary memory and placed in the physical

memory is called swapping in of the program. & portion of the program or important partial

results re%uired for further execution may be saved bac' on secondary storage to ma'e the M

free for further execution of another re%uired portion of the program is called swappingout of

the executable program.


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80286 uses the )61bit content of a segment register as a selector to address a descriptor stored in

the physical memory. The descriptor is a bloc' of contiguous memory locations containing

information of a segment# li'e segment base address# segment limit# segment type# privilege

level# segment availability in physical memory# descriptor type and segment use another tas'.

Physical address calculation

& virtual address# li'e a real address# is made up of a )61bit segment selector and a )61bit

offset

rom the diagram# we can see that there are 2),entries in each descriptor table and# as

with real mode# each segment can reference up to 2)6bytes of memory which give us up

to 2,0bytes or )*3 of virtual address space

!$4,4 Microprocessors and ts &pplications age 2


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TI=0 TI=1

Virtual Address

16 bit selector 16 bit offset

Index TI RPL

15 3 2 1 0

Base Address

Physical Address


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e can also see that the calculated physical address is 251bits which means that we can

address 225bytes or )6M3 of memory

3ecause the virtual address space is far bigger than the physical address space# not all of

it can exist in memory simultaneously

The $ can leave data that hasn7t been accessed on an auxiliary storage device such as a

hard dis' and copy it to memory when needed# or can ma'e more room in memory by

moving not recently used data to the dis'

& list of the virtual to physical mappings is stored in memory and is loo'ed up whenever

memory is accessed

The 80286 has a single lo!al Descri"tor Ta!le +*(T- which is shared between all

tas's and addresses up to 4)2M3 of the virtual address space

ach tas' will have its own Local Descri"tor Ta!le +9(T- which is a private 4)2M3 of

address space

The following registers are involved in address translation:



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The following steps are involved in address translation:

)- btain the selector from a segment register

2- f T ; 0# then obtain the global descriptor table address from the *(T register

and go to step 5

,- f T ; ) indicating the local descriptor table then:

i. *et the selector for the 9(T7s segment from the 9(T register

ii. xtract the index from this selector and multiply by 8

iii. &dd this to the *(T address from the *(T register

iv. etch the addressed descriptor from memory

v. xtract from this the base address of the 9(T

5- xtract the index from the segment register and multiply by 8 and add it to the

descriptor table address. etch the descriptor from memory

4- xtract from the descriptor the segment base address


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6- &dd the offset to the segment base address. This is the desired physical address


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!ode and data +including stac' data- are stored in two types of segments: code segments and data

segments. 3oth types are identified and defined by segment descriptors +$ ; )-. !ode segments

are identified by the executable +- bit set to ) in the descriptor access rights byte. The access

rights byteof both code and data segment descriptor types have three fields in common: present +- bit#

(escriptor rivilege 9evel +(9-# and accessed +&- bit. f ; 0# any attempted use of this

segment will cause a not1present exception. (9 specifies the privilege level of the segment

descriptor. (9 controls when the descriptor may be used by a tas'. The & bit shows whether the

segment has been previously accessed for usage profiling# a necessity for virtual memory

systems. The !" will always set this bit when accessing the descriptor.

(ata segments +$ ; )# ; 0- may be either read only or read write as controlled by the bit of

the access rights byte. =ead1only + ; 0- data segments may not be written into. (ata segments

may grow in two directions# as determined by the xpansion (irection +(- bit: upwards +( ;

0- for data segments# and downwards +( ; )- for a segment containing a stac'. The limit field

for a data segment descriptor is interpreted differently depending on the ( bit.


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& code segment +$ ; )# ; )- may be execute1only or execute@read as determined by the

=eadable +=- bit. !ode segments may never be written into and execute1only code segments += ;

0- may not be read. & code segment may also have an attribute called conforming +!-. &

conforming code segment may be shared by programs that execute at different privilege levels.

The (9 of a conforming code segment defines the range of privilege levels at which the

segment may be. The limit field identifies the last byte of a code segment.

$A$TM $*M>T ($!=T=$+$; 0# TA ; )1,-

n addition to code and data segment descriptors# the protected mode 80286 defines $ystem

$egment (escriptors. These descriptors define special system data segments which contain a

table of descriptors +9ocal (escriptor Table (escriptor- or segments which contain the execution

state of a tas' +Tas' $tate $egment (escriptor-.

igure shown below gives the formats for the special system

data segment descriptors. The descriptors contain a 251bit base address of the segment and a )61

bit limit. The access byte defines the type of descriptor# its state and privilege level. The

descriptor contents are valid and the segment is in physical memory if ; ). f ; 0# the

segment is not valid. The (9 field is only used in Tas' $tate $egment descriptors and

indicates the privilege level at which the descriptor may be used +see rivilege-. $ince the 9ocal

(escriptor Table descriptor may only be used by a special privileged instruction# the (9 field s

not used. 3it 5 of the access byte is 0 to indicate that it is a system control descriptor. The type

field specifies the descriptor type.



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*&T ($!=T=$ +$ ; 0# TA ; 51


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igure shows the format of the gate descriptors. The descriptor contains a destination pointer that

points to the descriptor of the target segment and the entry point offset. The destination selector

in an interrupt gate# trap gate# and call gate must refer to a code segment descriptor. These gate

descriptors contain the entry point to prevent a program from

constructing and using an illegal entry point. Tas' gates may only refer to a tas' state segment.

$ince tas' gates invo'e a tas' switch# the destination off1 set is not used in the tas' gate.


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xception ), is generated when the gate is used if a destination selector does not refer to the

correct descriptor type. The word count field is used in the call gate descriptor to indicate the

number of parameters +01,) words- to be automatically copied from the callerBs stac' to the stac'

of the called routine when a control transfer changes privilege levels. The word count field is not

used by any other gate descriptor. The access byte format is the same for all gate descriptors. ;

) indicates that the gate contents are valid. ; 0 indicates the contents are not valid and causes

exception )) if referenced. (9 is the descriptor privilege level and specifies when this

descriptor may be used by a tas'. 3it 5 must e%ual 0 to indicate a system control descriptor. The

type field specifies the descriptor type as indicated in igure.

Se#$ent Descri"tor Cache Re#isters

& concept of caching was introduced in 80286 to minimi/e the time re%uired for fetching

the fre%uently re%uired descriptor information from the main memory. The caching is nothing but

maintaining the most fre%uently re%uired data for execution in a high speed memory called cache

memory. & 61byte segment descriptor cache register is assigned to each of the four segments# i.e.

!$# ($# $$ and $. & segment descriptor is automatically loaded in a segment descriptor cache

register# whenever the associated segment register is loaded with a selector. nce a cache registeris loaded# all the information regarding the segment is obtained from the cache register# instead

of referring to the main memory for the descriptor again and again. These cache registers are not

available for programming. They automatically change when a segment register is reloaded.

igure shows the 61byte format of the cache registers and the corresponding segment registers.

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Selector %ields

n the protected mode# the contents of the segment registers are 'nown as selectors. The selector

contains three fields in its )61bit format. The 21bit field (01(2 is called as =9 field i.e.

re%uested privilege level that describes the desired privilege of the segment. The ( 2bit indicates

the descriptor table type# i.e. local descriptor table# if it is ) and global descriptor table# if it is 0.

The index field (,1()4points to the re%uired descriptor base in the descriptor table. igure C.))

shows the selector field format.

LOCAL A&D LO'AL DESCRIPTOR TA'LE


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Two tables of descriptors# called descriptor tables# contain all descriptors accessible by a tas' at

any given time. & descriptor table is a linear array of up to 8)C2 descriptors. The upper ), bits of

the selector value are an index into a descriptor table. ach table has a 251bit base register to

locate the descriptor table in physical memory and a )61bit limit register that confine descriptor

access to the defined limits of the table as shown in igure. & restartable exception +),- will

occur if an attempt is made to reference a descriptor outside the table limits. ne table# called the

*lobal (escriptor table +*(T- contains descriptors available to all tas's. The other table# called

the 9ocal (escriptor Table +9(T-# contains descriptors that can be private to a tas'. ach tas'

may have its own private 9(T. The *(T may contain all descriptor types except interrupt and

trap descriptors. The 9(T may containB only segment# tas' gate# and call gate descriptors. &

segment cannot be accessed by a tas' if its segment descriptor does not exist in either descriptor

table at the time of access.



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The 9*(T and 99(T instructions load the base and limit of the. global and local descriptor

tables. 9*(T and 99(T are privileged# i.e. they may only be executed by trusted programs

operating at level 0. The 9*(T nstruction loads a six byte field containing the )61bit table limit

and 251bit physical base address of

the *lobal (escriptor Table as shown in igure )


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Interru"t Descri"tor Ta!le

The protected mode 80286 has a third descriptor table# called the nterrupt (escriptor Table

+(T-# used to define up to 246 interrupts. t may contain only tas' gates# interrupt gates and trap

gates. The (T +nterrupt (escriptor Table- has a 251bit physical base and )61bit limit register in

the !". The privileged 9(T instruction loads these registers with a six byte value of identical

form to that of the 9*(T instruction.



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protected virtual address mode

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