noao monsoon image acquisition system · 2006-12-08 · solutions to a large class of image...

12/8/2006 1

NOAO NOAO MONSOONMONSOON

Image Acquisition SystemImage Acquisition System

Preliminary Design ReviewPreliminary Design Review

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MONSOON Presentation OverviewMONSOON Presentation Overview

Project Overview – Barry StarrIR Science Issues – Mike MerrillOUV Science Issues – Chuck ClaverSystem Design – Barry StarrDHE Design – Barry StarrDHE Backplane – Gustavo RahmerSoftware Design – Nick BuchholzProject Status – Barry StarrProject Management Issues – Barry StarrDiscussion

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Project OverviewProject Overview

Barry Michael Starr

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NOAO’s stated mission:• Facilitate the implementation of the Decadal Survey.• LSST / GSMT / TSIP / USGP Instruments / Detectors & Controllers• Promote collaboration with external organizations

Existing astronomical systems unable to adequately support next generation projects due to the following limitations:• Cannot provide high channel counts & high aggregate data rates• Possess high cost/channel & high power dissipation /channel

Existing NOAO systems are:• Aging & varied - currently 7 system types supported at

KPNO/CTIOBottom Line: MONSOON is in direct support of NOAO’s mission

MONSOON MotivationMONSOON Motivation

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Large format optical imagers• LBNL Mosaic (4k x 4k) 0.4 to 1 µm OUV • WIYN QUOTA (8k x 8k)• ODI (32k x 32k) 0.4 to 1 µm OUV• LSST (40k x 40k) 0.4 to 1 µm OUV

Large format IR imagers• ORION lab system (2k x 2k) 1-5 µm IR• NEWFIRM (4k x 4k) 1-2.5 µm IR • GSAOI (4k x 4k) 1-2.5 µm IR

NOAO Defined Next Generation SystemsNOAO Defined Next Generation Systems

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MONSOON Fundamental Concepts:MONSOON Fundamental Concepts:““Image ServerImage Server””or or ““Pixel ServerPixel Server””

Integrated Systems Concept: • Image Acquisition System vs. “Controller”• Key element in “Observatory” system• More than “Interface Electronics”• Focus on all key issues:

• Signal acquisition • Data flow • Processing• System management

• Remote location / reliability is of vital importance

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MONSOON Priority: MONSOON Priority: Observing EfficiencyObserving Efficiency

• Maximize “open shutter” integration time !!!• Every photon’s sacred…• Telescope time is an increasingly costly commodity.• Support the relentless acquisition of images.

• Provide “Detector-limited” performance• Detector costs are a pacing item in system costs.• We can and must design systems which do not degrade

this performance.• This can be done at a non-pacing cost/performance trade

space.

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MONSOON Fundamental Concepts:MONSOON Fundamental Concepts:““DetectorDetector--LimitedLimited”” PerformancePerformance

“Detector-Limited” implies:• Noise

• Read noise• Channel-to-channel cross talk

• Linearity• Dynamic range• MTF (pixel-to-pixel cross talk, settling time)• Readout rate• Readout modes, etc.

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MONSOON Fundamental Concepts:MONSOON Fundamental Concepts:““Total Cost of OwnershipTotal Cost of Ownership””

Purchase Costs– All components, hardware & software, cables, power supplies…

Integration Costs– Packaging, cabling, software development, documentation development,

physical size, weight, power and cooling requirements.

Maintenance Costs– Manpower costs for calibration, troubleshooting, replacement time,

documentation, organization overhead from lack of common systems.

Replacement Cost– Cost of components, modularity, delivery times, control of technology

Loss of Science Time– Loss of time due to inefficiency, overheads, down-time, reliability….

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MONSOON VisionMONSOON VisionWhat if…– There was a community wide solution to the “pixel server”

What if…– This solution was developed by a distributed team of the best in the field

What if…– This solution could work regardless of detector technology or institution

What if…– This solution could be implemented with existing technology, and low-cost

tools…What if..– It could improve on existing solutions in all ways:

• Cost, performance, power, speed, size, reliability, calibration, stability…What if…– It could provide a scalable hardware /software solution:

• single detector to LSSTNow the good news: It can !

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MONSOON MONSOON Development ModelDevelopment Model

Full “open source” development– Schematics, artworks, source code…

Strong internal NOAO collaboration– ETS / CTIO / KPNO

Strong external collaboration– NOAO / ASTEROID Group (Keck / Lick / UCLA / Caltech )– Steward / SOAR / WIYN / UH / others…

Monsoon + ASTEROID => MONSTEROID

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Project Scope DefinitionProject Scope Definition

MONSOON has designed an architecture to support solutions to a large class of image acquisition needs.

By image we mean all focal plane images.– (incl. spectra, wave fronts & all other images formed on electronic focal

planes)

We are currently implementing only a small subset of these solutions based on need and available resources.

Capabilities will be added as specific needs are defined and resources identified & allocated.

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IR Science IssuesIR Science Issues

K. Michael Merrill

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The IR ChallengeThe IR ChallengeWithin the last quarter century, infrared detectors have evolvedfrom individual discrete devices to high tech aggregates of millions of pixels.The scientific drivers for yet more pixels have kept apace -already several projects are dependent on multiple 2K X 2K arrays to reach their goals and next generation facilities envision focal planes paved with detector tiles.To service such focal plane composites requires sophisticated control of multiple devices, but management of the digitized data flow off the focal plane through the data pipeline to the investigator and the archive looms equally large.

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InSb Array development at NOAO:•58X62 (smallest box)•256X256•1024X1024 ALADDIN•2048X2048 Orion

NEWFIRM footprint with 4 Orion detector focal plane mosaic

Science in the raw:•H2 gas emission (left panel)•PAH dust emission (middle)•JHK color composite (right)

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High Background Science:

•imaging at the South Pole

•NGC6334 - PAH,L,M’composite

•relentless observing

•limited by data flow, not natural background

Challenge to excel…

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Multi-wavelength astrophysics with SQIID:simultaneous operation of 4 arrays sharing a single FOV through dichroics

M17: the Omega Nebula

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Science/Technology DriversScience/Technology Drivers

Astronomy continues to move in the direction of larger telescopes, higher spatial/spectral resolution instrumentation, and larger image fields:

– Science of scale requires measurement of large areas of the sky at depth– Science of change requires commensurate measurements over time– Identification and census of rare objects requires mining of large areas– Need for sample completeness and statistitical accuracy requires measurement of multiple

sources at the same time Scarcity & high cost of observing resources demands an observing environment that:

– reliably delivers accurately calibrated, repeatable observations– must be flexible - optimized to meet the diverse needs of the science– must be adaptable to accommodate changing needs– is capable of relentless operation with high efficiency

Science data flow requires:– uniformity and efficiency in acquiring, processing and archiving image data– rapid turnaround of very large data volumes– optimal coupling with data processing, instrument, and telescope systems

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NEWFIRM:NEWFIRM:Wide field deep IR imaging in the large telescope eraWide field deep IR imaging in the large telescope era

Study of growth of structure and complexity in the Universe

1-2.4 µm region physically rich, readily accessible

8-10 meter telescopes: Superb image quality over small fields

NOAO 4-m’s: Deep wide surveys fill the “2MASS gap”

Widely recognized need for US system competitiveness

Variety of specific science programs proposed in different venues

NEWFIRMNOAO Extremely Wide Field Infrared Imager

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Galactic IR survey science examplesGalactic IR survey science examplesThe stellar initial mass function in molecular clouds– Complete samples over area, mass, and time– Variability as a selection tool enabled by large AΩ– Database enables substantial ancillary/follow-up investigations– Model cloud survey covers 165 sq deg, I J H Ks, to Ks = 18-20

Energy and chemical exchange in molecular clouds– Ties between energetic outflows and global problems of star formation– IR emission lines trace shock and photo-excited interfaces in embedded

flows– Complete sample of outflow population –> local, global impact– 20 sq degrees per molecular cloud > 1.64 µm [Fe II], 2.12 µm H2, 2.17 µm

Br α


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Extragalactic IR survey science examplesExtragalactic IR survey science examples

Evolved galaxies and clustering at 2 < z < 3– Tests for galaxy formation, cosmology– Many square degrees, K = 22, J = 24

Young galaxies and quasars at z > 5– Tail end of first episode of primordial star formation– “Small” area, very deep, K = 23, J = 25

Linking the local and distant Universe– Explore z < 0.1 clusters at large radii for accretions, mergers– Tens of square degrees, K ~ 21


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InSb wavelength (0.9 to 5.5 µm) & the anticipated range in instrumental spectral resolution (λ/Δλ = 4 to 100,000) span a wide range in photon background.Requires operation at both read noise and shot noise limits– individual instruments often face both environments– operation at magnifications with a large per pixel FOV increases the background– operation in conjunction with AO systems increases background for λ > 2 µm

Estimated System Background

Estimated per unit airmass for the Gemini North telescope on Mauna Kea with the f/16 IR secondary at 1:1 magnification == 0.05 arcsec/pixel, 1 mm PWV, 0°C, 2.5% net system warm emissivity, and 50% net system efficiency.

Gemini Estimated System BackgroundGemini Estimated System Background

Band J H K H2 L' M' Brackett αcentral wavelength: λ ( μm) 1.27 1.67 2.22 2.12 3.82 4.7 4.05

spectral resolution: λ/Δλ 4.7 6.1 5.6 111.5 6.3 23.5 75detection rate: e's/sec 100 250 200 11 1.6E+05 5.3E+05 3.0E+04

sec to reach 2e5 e's 2000 800 1000 18200 1.25 0.38 6.67sec to reach 25e's RMS 6.25 2.5 3.125 56.8 0.004 0.001 0.021

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System Background: Science ImplicationsSystem Background: Science Implications

Surveys push for an order of magnitude fainter sensitivity over wide areas of the skyMost imaging will be background limited– 2X fainter takes 4X longer– favors accumulation of moderate to short exposures to

maintain dynamic rangeMost spectroscopy will be read noise limited between the atmospheric emission lines– favors array operation which reduces read noise– favors array operation which provides compensation for

baseline drift over long integration timesScience goals require operation in both read noise

and background limited environments.

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System Background: Array/Controller ImplicationsSystem Background: Array/Controller Implications

Science modes of operation require:Relatively rapid pixel handling rates and short frame read times

Avoid saturation at high background (minimum integration time <<1 sec)Permit optimal video signal filtering at low to moderate backgroundMinimize read noise at low background (multiple read pairs required)

Operation varied to meet system requirements in terms of noise and frame rate (minimum integration time and observing efficiency)Reset method (global/ripple/pixel)Readout method (Fast/Fowler sampling/multiple digital sampling/etc)Pixel transfer (sub-raster/ROI)Pixel pre-processing (co-addition/reference compensation)

Must provide multiple distinct operating modes

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OUV Science IssuesOUV Science Issues

Chuck Claver

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Science of ScaleScience of Scale

Much of the recent work with large telescopes focus on detailed studies of small numbers of objects.Follows that we ask how these details apply to classes of objectsLeads to “Science of Scale”Decadal Survey has endorsed this concept through the LSST.

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Science of Scale ExamplesScience of Scale Examples

Large Synoptic Survey Telescope– 8.4m primary, 3 mirror modified Paul design– 3 degree FOV

One Degree Imager (3.5m WIYN)– 1 degree FOV with 1024 independent OT CCDS– 32K x 32K array implements a “rubber focal surface”– Independent OT clocking at >20hz

Gemini Multi-Object Spectrograph– Concept for wide field spectroscopy of 1000’s of objects

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LargeLarge--aperture Synoptic Survey aperture Synoptic Survey Telescope (LSST)Telescope (LSST)

NEOs >300m diameterDark Matter from Weak Lensing Transient PhenomenonParallax of the Solar Neighborhood to V=27

55cm2.5 Gpix

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LSST Operation ModeLSST Operation Mode

Survey the entire visible sky every 4 nightsRequires cadence of 30 seconds– 20 sec. exposure– 10 sec. overhead

• Read array• Re-point• Shutter open-close

Shut

ter O

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lose

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30 sec

20sExposure

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One Degree Imager (WIYN)One Degree Imager (WIYN)1 degree by 1 degree field on 3.5-m WIYNCCD array – 32K X 32K (16 inches on a side) with 0.11” pixels“Orthogonal Transfer” CCD technology to do “tip-tilt” correction in CCD (Tonry, Burke, & Schechter 1997)– Predict median seeing to 0.55”, 0.45”, & 0.35” in R, I,

Z bands– Mag limit (S/N=10, 1H) in BVRI ≈ 26.2, 26.1, 25.9,

25.5

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ODI Operation ModeODI Operation ModeThe The ““rubberrubber”” focal surfacefocal surface

Orthogonal Transfer Array, 4k x 4k format with 12µm pixels

8x8 Independent 5122 OT CCD– Guide star positions at 20+hz– X-Y correction surface maps to

individual OT ccds– Independent “tilt” correction on

arcrminute scale gives “rubber”focal surface

ODI = 64 OTAs in a 32k x 32k format.

16”

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Unique FacilitiesUnique FacilitiesUnique facilities are costly– LSST “Instrument” est. $30-40M– ODI est. $4M

On sky time highly valued– Demands efficient operation to maximize science returns

Present day acquisition systems are not capable for future science needs– Low efficiency

• Low pixel rates• High power consumption

– Not scalable to the size of system needed

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System DesignSystem Design

Barry Michael Starr

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Systems Design Approach to MONSOONSystems Design Approach to MONSOON

Investigate requirements, – Interview all stakeholders, Astros & Tech Staff

(NOAO / KPNO / CTIO / ASTEROID / LSST /…)Analyze and document existing systemsDefine requirementsEvaluate existing solutions/technologiesDevelop planImplement planDeliver systemEvaluate project performance

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MONSOONMONSOON Application AreasApplication Areas

Science Observing Laboratory Detector R&DETS Instrument DevelopmentNOAO Technical Imaging

GuidersAO Systems

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MONSOON System RequirementsMONSOON System Requirements

Scalable, low-cost, high-performance system.Support both IR and OUV devices.“Detector-Limited” performanceMaximize “open-shutter” integration timeDevice independent data acquisition architecture.Small modular packaging.Low power dissipation.Low total cost of ownership.

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All data pipelines 32-bit for future expansionData rates: Up to 120Mpixel/sec per controller chassisData processing rates: “scalable” (w/Fiber broadcast)Data storage rates: “scalable” (w/Fiber broadcast)Data display rates: “scalable” (w/Fiber broadcast)# of Channels/Controller:

Up to 216 ch per DHE chassis (w/out Bridge, 8 Slot backplane)

Up to 532 ch per DHE chassis (w/Bridge, 16 Slot backplane)

# of Controllers/System: >100

MONSOON System Data MONSOON System Data Performance MetricsPerformance Metrics

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Current dynamic range: > 60,000:1– 16-bit 1mhz ADC resolution, supporting S/N > 90db– Future support for higher resolutions

Non-linearity: < 0.1% over entire rangeRead noise: < 10% contribution to total system noise– Actual input noise and system gain & BW set by FPA used

Channel to channel cross talk: < 0.0015% (16-bit resolution)

Pixel to pixel cross talk: < 0.01%Calibrated, measured, recorded performance.

MONSOON ANALOG PerformanceMONSOON ANALOG Performance

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MONSOON Image Acquisition SystemMONSOON Image Acquisition System

Scalable multi-channel high-speed Image Acquisition SystemScalable at all levels based on cost/performance trade-offsSpecifically designed to address the needs of next-generation IR & CCD mosaic systems– ORION (2k x 2k) InSb & HgCdTe development – NEWFIRM (4k x 4k)– WYIN QUOTA (8k x 8k) => ODI (32k x 32k)– LSST (40k x 40k) and growing….

Increased performance over existing solutions– With reduced total cost – With reduced size – With reduced power consumption

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MONSOON Scalable ArchitectureMONSOON Scalable Architecture

LINUX PCPCI FIBER CARD

Ethernet Link100Mb/s

1Gb/s Fiber(50Mpixel/s)


LINUX PCPCI FIBER CARD1Gb/s Fiber

(50Mpixel/s)

SYNC


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MONSOON System CommunicationsMONSOON System Communications(3 Critical Networks)(3 Critical Networks)

1) 1 GHz (2.4 GHz) COTS fiber optic network• Hi-speed, lo-latency

• 50 Mpixel/s SL100, 120 Mpixel/s SL240• Handles all primary communication to Detector Head Electronics (DHE)

• Command/response & pixel data• Supports point-to-point, loop, and broadcast topologies

2) Ethernet• Provides “backdoor” path to DHE for system error recovery, diagnostics,

and development when fiber not active• Not intended for any “normal mode” use.

3) Controller synchronization• Key system element, “hard-synchronized” controllers• Distributed 40 Mhz master system clock and sync pulse • Controlled impedance, skew adjusted LVDS signal distribution

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3 Layer System Architecture3 Layer System ArchitectureSupervisor Layer– Provide single point contact to system– Control only, not pixel data– Provides client access security

Pixel Acquisition Node (PAN) Layer– All low-level data processing (except digital averaging)

– No knowledge of other PAN-DHE pairs– Single exposure sequencing

(Fowler Sampling, coadds, MSR techniques, OT imaging)

Detector Head Electronics (DHE) Layer– Integration timing (if master)– Detector readout sequencing & digital avgs.– Shutter control & array temperature control

Monsoon System Context DiagramScience Client System

Local DHSInterface

ICD 4.0 GPX Interface

(Level 0 )

2.0PAN

System

3.0DHE

System

ICD 6.0 Generic DHEICD 6.1 MONSOON DHE

ICD 5.0 (TBD)

[SupervisoryProcess]

MONSOONPixel Server

Local StatusInterface

(Instrum ent Control System)(Observation Control System)

Client System(Engineering Lab Console)

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1) Detector Head Electronics (DHE) Level:- Hi-speed “standard” backplane based-design- Acq channels & functionality added as needed to support multiple devices / DHE- Adapt to FPA requirements…. Analog FPA => digital FPA…. No problem!

2) Fiber Optic Link Level:- Upgraded from 1 GHz to 2.4 GHz to support req’d pixel rate (50 Mpix/s =>120 Mpix/s)

3) Pixel Acquisition Node (PAN) PC Level:- Pc’s can be upgraded for data processing req’s (cpu’s, memory, network int)

4) Data Processing / Fiber Network Level:- Systran supports data broadcast capability to support distributed pixel processing

5) System Level- Controller/data acquisition nodes can be added to support arbitrarily large systems

MONSOON Scalable at Multiple LevelsMONSOON Scalable at Multiple Levels

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Visible MOSAIC Development PathVisible MOSAIC Development Path

4”

QUOTA: 8K

16”

ODI: 32K (~$4M)

LSST: 37K

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QUOTA to ODI to LSSTQUOTA to ODI to LSSTSystem ScalingSystem Scaling

QUOTA(ODI = 16x)(LSST = 20x)

LINUX PCPCI F IBER CARD


1Gb/s F iber(50Mpixel/ s)

DATA ACQUISITION NODE 1


DETECTORCONTROLLERNODE 1


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MONSOON Designed to Be Built MONSOON Designed to Be Built Quickly, Efficiently, EffectivelyQuickly, Efficiently, Effectively

Heavy Use of COTS TechnologyArchitecture Supports Distributed Parallel Development by Multiple Engineering GroupsArchitecture Supports Existing Controllers for Backward Compatibility– SDSU II – Lick Guider

Use of Technologies and Tools Which are Available at Modest or No-Cost Now!Clear Definition of Interfaces and Subsystems – (Hardware & Software)

Application of Fundamental System Design ConceptsAttention to the Fundamental Laws of Physics as Applied to Electronic Systems

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Interface DefinitionsInterface DefinitionsScience or Engineering Clients

SDSU-IIDetector

Head Electronics

MONSOONDetector

Head Electronics

Simulated GenericDetector

Head Electronics

OTHERDetector

Head Electronics

Supervisor Layer Software

Pixel Acquisition Node Software

ICD 6 .1 MON SO ON D HE Interface & D esign

IC D 6.2 SDSU- IIDH E Inter face & Design

IC D 6.99 O ther D HEInter face & Design

OTHER DHE Interface So ftware

SDSU -II DH E Interface Software

MONS OON DHEInterface So ftware

OTH ER F iberD rivers

SD SU-II FiberDrivers

Systran F ib erD rivers

Systran Fiber Hdwr SDSU-II Fiber Hdwr OTHER Fiber Hdwr

ICD 6.0 Generic Detector Head ElectronicsCommand and Data Stream Interface Description

C om m unications to Simulator

ICD 4.0 Generic Pixel Server - Communications, Command/Response and Data Stream Interface Description

ICD 4.1 Specific System Restrictions on Science Clients

ICD 7.0 MON SO ON Backplan e

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MONSOON Key TechnologiesMONSOON Key Technologies

Low-cost “GHz–class” PC’s– Removes the need for embedded DSPs in system, (PC cost ~ 2.5k)

Scalable commercial high-bandwidth fiber optic networks– Buy not build, use a well-supported commercial product

• Systran FiberExtreme SL100/SL240 • SL100: 100 Mbyte/s => 50 <Mpix/s , SL240 240 Mbyte/s => 120 Mpix/s

Standard software systems– Use dependable components with large user base

• Redhat LINUX• Existing software components or systems or design patterns?

State-of-the art analog & mixed signal electronic components– Increased performance with reduced power, size, and cost

• Allows construction of large channel count systems

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LowLow--Cost Cost ““GHz GHz –– ClassClass”” PCPC’’ss

Actual NOAO Benchmarks published at IPAC meeting on 4/01:• 10 Hz rates for co-additions on 2k x 2k images • > 2 Hz rates projected on 4k x 4k images

Benchmarks taken with low-cost (~2k) modest performance Dell 800mhz dual CPU Poweredge 1400 series workstation

TEST IMAGE SIZE

LINUX PC Frames/S (Mpix/S)

SPARC ULTRA5 Frames/S (Mpix/S)

Coadd (1CPU, No Optimization) 2K x 2K 6.1 (24.2) 2.25 (9.0) Coadd (2CPU, 2 Processes) 2K x 2K 10.5 (42) N/A Save FITS (1CPU, No Optimization) 2K x 2K 0.6 (2.3) 0.2 (.76) Save FITS (2CPU, 2 Processes) 2K x 2K 0.6 (2.3) N/A

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SYSTRAN FiberExtremeSYSTRAN FiberExtreme

• Embedded “CMC” Daughter Card PCI Board System• Multiple network topologies: point to point, loop, broadcast…

•Actual NOAO benchmarks (8/01),• Systran SL100 between two Dell PC’s

•100 Mbytes/s (50 Mpixel/s) sustained Xfer rates for 4K x 4K images

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MONSOON Advanced MONSOON Advanced MixedMixed--Signal & Analog ComponentsSignal & Analog Components

• 1/10 the cost, 1/10 the size, 1/10 the power of previous generation hybrid ADC technologies

• Multiple devices have been prototyped and evaluatedNOAO (1/01, to 9/01)

SDSU-IIRedstar 2 & 3

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Electronics Electronics –– Signal ChainSignal ChainSDSU II Dual Channel Video Board– 2 channels– 1 Mpixel/sec– CDS, 16 bit ADC– 15 W power

Analog Devices 9826– 3 channels (RGB)– 15 Mpixel/sec– CDS, 16 bit ADC– 400 mW power

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System design using COTS fiber and cPCI backplane means development starts nowModular hardware design with well-defined interface means different clock & bias boards or acquisition boards can be developed simultaneouslyFPGA based bus interface gives added flexibility in implementation.Use of low-cost components and tools allows minimal investment to participate in design effort

Break the sequential software development effort

Multiple Engineering Groups Can Multiple Engineering Groups Can Develop in ParallelDevelop in Parallel

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System Design AllowsSystem Design AllowsImmediate Software Development Immediate Software Development

LINUX PCP CI FIBER C AR D

Ethernet Link100M b/s

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Et hernet Link100M b/s


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S IMULATE D DHENO DE 1

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MONSOON Supports Multiple MONSOON Supports Multiple Controllers or DHE Controllers or DHE

The PAN and Supervisor Layers are isolated from the details of controller or DHE used.ICD 6.0 has been written to support at least 3 implementations– 1) MONSOON– 2) LICK Guider– 3) SDSUII

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Detector Head Electronics (DHE) Detector Head Electronics (DHE) DesignDesign

Barry Michael Starr

MONSOON Controller ArchitectureMONSOON Controller Architecture

Clk & BiasBoard

VideoAcquisition

Board

VideoAcquisition

Board

NSe

rial C

fg B

us

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us

To FPACPCI Backplane

SL100

RABBITEMBEDDED

CONTROLLER

PIXELPIPE

LOGIC

Master Control Board

SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

BUSINTERFACE

LOGIC

MONSOON DHE W/O Embedded ProcessorMONSOON DHE W/O Embedded Processor

Clk & BiasBoard

VideoAcquisition

Board

VideoAcquisition

Board

Seria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

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To FPAscPCI Backplane

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LOGIC


SEQUENCERLOGIC

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LOGIC

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WORK

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CLK/SYNC OUT

5

RABBITEMBEDDED

CONTROLLER

ETHERNETFPGA To

Handle ConfigurationAnd Integration Timing

59

MONSOON 3 Board / 3 Bus SystemMONSOON 3 Board / 3 Bus System3 Boards– 1) Master Control Board (MCB)

• Common to all monsoon systems– 2) Clock & Bias Board (C&B)

• Designed to meet FPA needs, 2 or more versions planned (IR & CCD)– 3) Acquisition Board

• Designed to meet FPA needs, 2 or more versions planned (IR & CCD)

3 Buses (40-66MHz )– 1) 64-Bit Pixel Bus

• Synchronous transfer of 64-bit pixel data from Acq board to MCB– 2) Sequencer Bus

• Hi Speed Timing Bus (MCB to Acq & C&B Boards) for all controller timing – 3) Serial Configuration Bus

• JTAG Serial Configuration Bus to configure & read back Acq/C&B boards

MONSOON Controller ArchitectureMONSOON Controller ArchitectureCCD Focal Plane (QUOTA)CCD Focal Plane (QUOTA)

CCDClk & Bias

Board

CCD 16-ChAcquisition

Board

CCD 16-ChAcquisition

Board

Seria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us

To OTAsCPCI Backplane

SL100

RABBITEMBEDDED

CONTROLLER

PIXELPIPE

LOGIC


SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

5

MONSOON Controller ArchitectureMONSOON Controller ArchitectureIR Focal PlaneIR Focal Plane

IRClk & Bias

Board

IR VideoAcquisition

Board

IR VideoAcquisition

Board

Seria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us


SL100

RABBITEMBEDDED

CONTROLLER

PIXELPIPE

LOGIC


SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

5

MONSOON Controller ArchitectureMONSOON Controller ArchitectureHAWAIIHAWAII--2 Analog Focal Plane2 Analog Focal Plane

HAWAII-2Clk & Bias

Board

Seria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us


SL100

RABBITEMBEDDED

CONTROLLER

PIXELPIPE

LOGIC


SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

IR 16-ChAcquisition

Board

IR 16-ChAcquisition

Board

5

MONSOON Controller ArchitectureMONSOON Controller ArchitectureDigital Focal PlaneDigital Focal Plane

Digital FPAInterface

Board

Seria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us

To FPA

CPCI Backplane

SL100

EMBEDDEDCONTROLLER

PIXELPIPE

LOGIC


SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

5

May Not Be Req’d

May Interface Directly to MCB

MONSOON Controller ArchitectureMONSOON Controller ArchitectureGuider Guider

GuiderClk/Bias

&Acq

BoardSeria

l Cfg

Bus

Sequ

ence

Ctl

Bus

Pixe

l Dat

a B

us

To CCDCPCI Backplane

SL100

RABBITEMBEDDED

CONTROLLER

PIXELPIPE

LOGIC


SEQUENCERLOGIC

FIBERINTERFACE

LOGIC

64

64

64

64

ETHERNET

FIBEROPTIC

CLKDISTNET-

WORK

CLK/SYNC IN

CLK/SYNC OUT

5

65

MONSOON Controller PackagingMONSOON Controller Packaging

• 6U Eurocard format• “cPCI” digital backplane• Custom analog backplane

Dewar Vacuum Seal

Focal Plane

66

cPCI Digital BackplanecPCI Digital BackplaneCOTS Product “Buy Today not Build Tomorrow”Avoid Unnecessary Overhead from PCI Bus Protocol with “Simple” 3 Bus Data Path Definition.Use 64-Bit Pixel Bus for > 120 Mpixel/s Xfer rate

Use “Reflected Wave” methodology

Controlled Z, hi-speed environment

67

System Specific Analog BackplaneSystem Specific Analog Backplane

Rigid-flex technology thru the dewar vacuum wallPlace all over voltage, ESD protection & filtering circuitry as close to the focal plane as possible to best protect devices“Potentially” move electronics inside dewar (Clk Drivers/Preamps/ADCs ??)New 3-D solid models give necessary detail for accurate layoutsAlmost all new FPAs and CCDs have flex circuit interconnectsCost same as PCB, not an issue

Inte

rnal

Elec

troni

cs

68

Master Control BoardMaster Control Board

Provides all timing & sequencing to system– Provides MONSOON system synchronization– Employs FPGA (Xilinx Virtex) hardware sequencer

• 300K gate density, embedded RAM, reconfigurable

Provides interface to Systran fiber– Fiber handles all primary cmd/response and pixel data

Provides interface to embedded Ethernet processor– Ethernet used for system configuration and “back-door” reset– Processor used for system config, housekeeping & integration timing – Does not generate waveforms or touch pixel data– Rabbit embedded processor may be removed if desired

69

Master Control BoardMaster Control Board

3 PCBs fabricated2 Boards assembledFPGA development in processTesting underway

Embedded Ethernet Core ProcessorEmbedded Ethernet Core ProcessorRabbit RCM2100:• 10-base T Ethernet & TCP/IP ready

• 20 MHz CPU, 512K RAM, 512K flash

• $279 development system

• <$100 board price

• EDN top 100 products 2000

71

Systran SL100 InterfaceSystran SL100 Interface

Mechanical- simple embedded daughter board Electrical- Front Panel Data Port– Simple “industry standard” 32-bit parallel w/handshaking

72

System SynchronizationSystem Synchronization

Distributed 40 MHz clock and synch signalLVDS signaling, TWSP cable, terminated Programmable “skew compensated” linesSystem “hard synched” to ns timingSynch signal can be used to:– Synch controllers to each other– External source such as time source, chop signal, AO system…

Synch signal is really serial input line– Can be extended to many uses.

73

Clock & Bias Board ModelClock & Bias Board Model

Board may be tailored to FPA & system req’sAll interface to MONSOON bus through FPGA:

• 1) reconfiguration of bus interface signals if needed• 2) PCI compatible signals• 3) room for added functionality & lots of flexibility

All clock voltages & bias voltages have read backMost bias voltages & clock rails set by Serial Cfg Bus– IR board will support high-speed parallel DACs for some nodes

High channel count density on 6U format:– Advances in CMOS dacs allow 100’s of channels on 6U format

74

Possible Clock & Bias BoardPossible Clock & Bias Board

CLK& BIASFPGA

SERIAL CFG BUS

SEQUENCER BUS

QTY 4 EL7457CQUAD DRVR

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

QTY 1 8 CHANNEL12-BIT DACBILEVEL CLOCK CHANNELS

IN GROUPS OF 4

16 CLK

3 CTL

DACDAC

DACDAC

DACDAC

DACDAC

DAC

BIAS CHANNELS

3 CTL

LOCALPATTERN

GENERATOR(IF REQ’D)

DAC INTERFACE

LOGIC

MONSOONBUS

INTERFACELOGIC

QTY 112 CHANNEL12-BIT DAC

16 TTL CLOCK CHANNELS FOR MUX SELECT

16 CLK

ADCADC

ADCADC

ADCADC

ADCADC

ADCADC

ADCADC

ADCADC

ADCADC

75

Acquisition Board ModelAcquisition Board ModelAll interface to MONSOON bus through FPGA provides:

• 1) reconfiguration of bus interface signals if needed• 2) room for added functionality

– (digital averaging, dynamic gain select)

• 3) PCI compatible signals

High channel counts on 6U format– 36 channel IR board in PCB fabrication

Cost & power for 36 1mhz IR channels– 5W – 10W for 36 x 1MHz IR channels ( < 500mW / MHz / ch)– < $5000 component cost (< $200 / MHz / ch)

76

3 Channel AFE

3636--Channel Acquisition CircuitryChannel Acquisition Circuitry

GAIN 16-BITADC 16

X12

CDS PGA

ACQ FPGA

64 PIXEL DATA BUS

DATA INTERFACE

LOGIC

PIXELDATA

PROCESSINGLOGIC

36 VIDEO ACQUISITION CHANNELS

AFE CLOCKING LOGIC

FROM CCDOUTPUTS

GAINGAIN

3 Channel AFE

GAIN 16-BITADC 16

CDS PGAGAINGAIN

AFE CFG

SERIAL CFG BUS

SEQUENCER BUS

AFE CFG INTERFACE LOGIC

77

DHE Backplane DHE Backplane

Gustavo Rahmer

78

MONSOON DHE Backplane BasicsMONSOON DHE Backplane Basics

ICD 7.0 defines the backplane interface for the DHE.Commercial cPCI backplane:– Max 8 slots (1 System slot and 7 Peripheral slots).– For more slots, a special bridge is necessary.– Less than 8 slots (4 and 6) are available.

Compliant to PICMG 2.1 R1.0– for independent clock distribution.

6U form factor with 5 connectors:– 2 digital (P1-P2)– 1 analog power (P3)– 2 analog signals (P4-P5)– Optional: 3U form factor (P1-P2 only)

79

DHE Backplane Basics (cont)DHE Backplane Basics (cont)

1

P1

P2

P3

P4

P5

2

P1

P2

P3

P4

P5

3

P1

P2

P3

P4

P5

4

P1

P2

P3

P4

P5

5

P1

P2

P3

P4

P5

6

P1

P2

P3

P4

P5

7

P1

P2

P3

P4

P5

8

P1

P2

P3

P4

P5

Z A B C D E F

Pin 1

DIGITAL SIGNALS

& POWER

ANALOG POWER

ANALOG SIGNALS

80

DHE Backplane Basics (cont.)DHE Backplane Basics (cont.)

81

DHE Backplane Basics (cont.)DHE Backplane Basics (cont.)

System slot Master Control BoardPeripheral slots Acq / C&B boardsIndividual “Board Select” lines to every peripheral slot allow to perform:– Broadcast– Multicast (group addressing)– Unicast (individual addressing)

Individual clock lines to every peripheral slot:– Each clock line can be individually enabled/disabled.– Controls system EMI.– Lower system power consumption.

82

Sequencer BusSequencer Bus

Time-multiplexed bus for clock pattern distribution as primary use.Sequencer Bus definition:– Seq Bus Mode: 7 bits– Seq Bus Data: 32 bits

Definition allows flexible use of the bus:– System configuration and readback.– Download of patterns for distributed pattern generation.– …

It is used in combination with the “Board Select” lines.

83

0ns 500ns 4.00us 8.00us 8. 10.00u

SYS_CLK

SEL#(CLK)

SEL#(ACQ)

SEQ[31:0]

25 ns

CLK Update

ACQ Update

CLK Update

ACQ Update

CLOCK

BOARD

ACQ

BOARD

0us 1us 2us 3us 4us 5us 6us 7us 8us 9us 10us 1

PATT_CLK

SWA

SWB

S3

S2A

S1A

S2B

S1B

P1

P2

P3

RGA

RGB

CDSCLK1

CDSCLK2

ADCCLK

15 ns

Clocking Sequence ExampleClocking Sequence Example

Clk Bd Update

1

Acq Bd Update

2

Acq Bd Update

Clk Bd Update

3

84

Power Supply ConsiderationsPower Supply Considerations

Digital power (5V / 3.3V) present only in P1-P2 (cPCI standard).Multiple analog voltages defined in P3 for maximum flexibility: ±5V, ±6.5V, ±15V, ±16.5V, ±HV.Individual boards may generate their own voltages locally.

85

• • •

±VA

+HV

±VA1

±VA2

Analog

±VA1

±VA2

±VA1

±VA2

Digital

3.3/5V

J1 J1 J1 J1

J3 J3 J3

BACKPLANE

MSTR CTRLBOARD

CLK/BIASBOARD

ACQ 1 BOARD

ACQ N BOARD• • •

POWER SUPPLIES

General Power SchemeGeneral Power Scheme

86

Grounding ConsiderationsGrounding Considerations

Ground pins on connectors are distributed in a “generous”way:– Digital (P1-P2): 37 pins (cPCI standard)– Analog (P3): >30 pins, plus ground pins in P4-P5.

Analog, digital and chassis ground may be connected at different locations, according to the specific system implementation.

87

General Grounding SchemeGeneral Grounding Scheme

ACPower

MSTR CTRL CLK/BIAS VIDEO 1 VIDEO N

• • •Analog

Digital

• • •

FPA

POWER SUPPLIES

BACKPLANE

Low-Z Conn

(optional)

ENCLOSURE

Digital Ground

Analog Ground

Chassis Ground

Optional Conn.

J3-4-5 P3-4-5 P3-4-5P3-4-5

J1-2 P1-2 P1-2 P1-2 P1-2

Low-Z Conn Low-Z ConnLow-Z Conn

88

Software Requirements Software Requirements Architecture & DesignArchitecture & Design

Nick C. BuchholzNick C. Buchholz

89

MONSOONMONSOON

Not an AcronymNot an Acronym

I give you the Image Acquisition System called ACRONYM

Yclept (I • kelpt´) (Arch) (OE) to call, called

Array Control Readout Organizer NormallY called MONSOON

90

Software Preliminary DesignSoftware Preliminary DesignDesign Philosophy

Primary Design GoalsUnderlying Assumptions

Interface DefinitionsRequirements

Functional DecompositionSystem State DiagramData Flow Diagrams

91

Design PhilosophyDesign Philosophy

Design the best system possible that meets the goals and requirements.– Describe the tasks and functions.– Choose paradigms to match the tasks.– Review the choice in view of the overall design.

Choose tools to match paradigms.Design first then implementDocument as part of the design process.

92

Primary Design GoalsPrimary Design Goals

Detector safe operations

High observing efficiency (low idle times)

Convenient error recovery

Extensible to large focal planes

Well-defined interfaces

Use widely available software technologies

93

Primary Design Goals Primary Design Goals (cont)(cont)

Adaptable for updating older systems

Lends itself to distributed development

Use databases for configuration management

Support remote observing

Support remote debugging & development

Easy boot-up and initialization procedures

94

UnderlyingUnderlying AssumptionsAssumptions

PAN is a PCI Bus system with Giga-Hz class CPU(s).Communication by Ethernet connection(s).Linux operating system.Multi-tiered Security Policy.– Connection location (firewalls).– Connection source (machine name/address).– Knowledgeable system (password security).– user/process name???.– VNC operations issues.

95

Underlying Assumptions Underlying Assumptions (cont)(cont)

Documentation standards observed.Well-known standard languages.Open Source, on-going development project.Multi-Site distributed development.Source code version control (like Remote CVS).

Adopt common design patterns

96

Interface DefinitionsInterface Definitions

Client System to Generic Pixel Server.ICD 4.0 Generic Pixel Server - Communications, Cmd/Response and Data Stream Interface Description.

GPX Restrictions on Science Client access.ICD 4.1 MONSOON Command and Parameter Restriction Lists.

Supervisor Layer to Pixel Acquisition Node.ICD 5.0 Supervisory – Pixel Acquisition Node – Communications, Command/Response Description. (A Command Interface).

PAN to Generic DHE (Detector Controller).ICD 6.0 Generic Detector Head Electronics - Command and Data Stream Interface Description. (A Command Interface).

MONSOON PAN to MONSOON DHE.NICD 6.1 MONSOON Detector Head Electronics - Command and Data Stream Interface Description. (A Hardware and Software Details).

External published interface Internal interfaceInternal interface

97

System RequirementsSystem Requirements

Design must allow.– Distributed development.– Features added without rebuilding system.– Pixel data processing chain re-configurable.

Testing and verification considered from start.Components must include a simulation capability.Connection Security of Prime importance.

Protect the Detector.Protect the Detector.

98

System Requirements System Requirements (cont)(cont)

Start-up & initialization without intervention.– Detector safe start-up.

– Performs self tests as appropriate.

– Finishes in ready_for_connection state.Error detection & handling.

– “Easy” errors return to current configuration.

– “Hard” errors return to default configuration.

– “Unrecoverable” errors will require human intervention.

99


Must include system operations logging.– Error detection and recovery logging.– Command sequence playback.

Support remote diagnosis, debug & operation.– Command stream based on “connections”.– Multiple connections allowed.– Connection security enforced.– On-Telescope connection priority observed.– Prime connection handles aSyncMessage responses.– Need remote power and reset control connection.– Engineering Console can “steal” Prime connection.– Engineering level command password protected.

100


Connection mechanism should be “universal”.– Sockets Baselined for connections.– Support available on “all” platforms.– Connection takes place to “named” pixel server.– Name - IP address translation by DNS etc.

Mosaic Focal Plane Handling.– Aim, mosaics to be viewed as single “focal plane”.– System should conceal details of exact FP layout.– User may elect to deal with individual pieces.

101


Configuration based on database concepts.– Keeps record of current configuration for each exposure.– Configuration info stored in FITS header.– Exposure FITS file keyed to unique ID.– Configuration displayed in status display.– System performance characteristics part of database.Configuration multi-tiered.

– Exposure configuration database available to users.– Detector configuration database available to engineering.Observer can create “Menu Selection” Modes.Password protection of default configurations.

102

Detector RequirementsDetector Requirements

Detector configuration by named “modes”.Modes include complete detector configuration.Modes should include definitions for:

– Bias and clock voltage levels.– Detector readout speed and method.– Data processing method .– Detector waveform timing.Selected Parameters may be modified.Selectable Integration time.

103

Exposure Control RequirementsExposure Control Requirements

Exposure types –– Photon Capture –Object - Internal shutter open.– Dark – Internal shutter closed.– Bias – Zero integration time exposure.– Reference – single IR FPA readout.– Separated – individual IR frames.

Exposure configuration by named “Modes”.Modes include complete exposure configuration.Exposure Modes include a default Detector Mode.Selected Parameters modified to create new “Mode.”

104

MONSOON Context DiagramMONSOON Context DiagramMonsoon System Context Diagram

Science Client System

Local DHSInterface

Fits Imageon Disk

Local DHSInterface

ICD 4.0 GPX Interface

ICD 4 .1 M ONSOON Restrict ions

Df1.4Pixel Data

S tream

(Level 0)

3.0DHE

System

ICD 5.0 (TBD)

ICD 6.0 Generic DHEICD 6.1 MONSOON DHE

1.0Supervisor

Layer

MONSOONPixel Server


Df1.5Status DataCo nnection

(Instrum ent Control System)(Observation Control System)

Engineering Client System

Df1.2Respo nse String

Conn ection

Df1.1Comm an d S tring

Con nection

Df1.3Asynchronou s

Status Conn ection

(Engineering Lab Console)

2.0PAN

System

Df1.4Pixel Data

S tream

TBDTBD

External Entity or Process

Interface Definition Label

1 .0InternalProcessDf 1.1

Data Flow Label

Data Flow 2.1MONSOO N

ExternalProcess

105

Supervisor Layer Supervisor Layer FunctionsFunctions

Network and client connection control.Network connection security.Connection error detection and recovery.Client communications interface.Command distribution to PANs.Response gathering from PANs.Data transfer control (organizing the transfer).Self start-up and initialization.

106

Pixel Acquisition Node Pixel Acquisition Node FunctionsFunctions

Command verification.Command/Parameter setting security.Parameter name/address translation.Parameter range checking.Diagnosis and debug support.Self-test support.Self Start-up and Initialization.Operations and Error logging.

107

Pixel Acquisition Node Functions Pixel Acquisition Node Functions (cont)(cont)

Mid-level exposure control (multiple identical images).

Configuration Security/Control.

Status Tracking.

DHE Interface and control.

Pixel Data Capture.

Data Capture Error Recovery.

108

Pixel Acquisition Node Pixel Acquisition Node FunctionsFunctions (cont)(cont)

Self Start-up and Initialization.

Image data Pre-processing.– Fowler Sampling.– Coadding.– De-scrambling.

Intermediate image storage (FITS image on Disk).

Communications Error Recovery.

Command Error Recovery.

109

Detector Head Electronics Detector Head Electronics FunctionsFunctions

Low –Level hardware control.– Voltage DAC setting.– AFE setup.– Shutter control.

Timing pattern configuration & downloading.

Integration timing (if Master node).

Housekeeping & Status reporting for detector.

110

Detector Head Electronics Detector Head Electronics FunctionsFunctions (cont)(cont)

Detector Protection.– Bias Power control.– Hardware test facilities.

Error Recovery.– Power glitches.– Power outages.– Electronic component failures.

111

System State DiagramSystem State Diagram

Initialization

SetExposure

ParametersArm orTrigger

ExposureCapturePixel Data

ProcessCaptured

Data

ErrorRecovery

Receive ExposureTrigger

System ErrorDetected

Complete Pixel Data Capture

Complete ConfigurationRequest exposure




Unable to recover from Error

MONSOON Top-Level System State Diagram

State State TransitionReason forTransition

AcceptConnections

Complete SystemInial ization

Pass Datato DHS

RequestConnection

Complete PixelData Processing

Connection Acceted[fork Command Processor]

Error RecoveryComplete

Reset

Complete PixelData Achiving

112

Supervisory Layer DFDSupervisory Layer DFD Level 0Level 0

Monsoon Supervisory Layer Data Flow Diagram

Fits Imageon Disk

Local DHSInterface

(Level 0)

ICD 5.0 (TBD)

1.0Supervisor

Level

2.0Pixel

AcqusitionNode

2.0Pixel

AcqusitionNode

2.0Pixel

AcqusitionNode

Df1.4Pixel Data Stream (ICD 4.1)

Df2.1MONSOONCommandMessages

Df2.2CommandResponseMessages Df2.3

AsynchronousStatus Messages

[ Optional Additional Pixel Acquisition Nodes ]


Df1.5Status Data Stream

Science Client System(OCS, ICS)

Engineering Console Client

Df1.3Asynchronous

Status Connect ion

Df1 .2Response String

ConnectionDf1.1Command String

ConnectionDf1.5

Engineering Data Connection

113

Pixel Acquisition Node DFD Pixel Acquisition Node DFD Level 0Level 0

Monsoon PIxel Acquisition Node Data Flow Diagram

Science Client System(OCS, ICS)

Fits Imageon Disk

Local DHSInterface

(Level 0)

ICD 5.0 (TBD)

1.0Supervisory

Process

2.0Pixel

AcqusitionNode


Df2.2CommandResponseMessages

Df2.3Asynchronous

Status Messages

3.0Detector Head

Electronics

Df3.1DHE

CommandMessages

Df3.2CommandResponseMessages Df3.3

AsynchronousStatus

Messages

Df3.4Pixel Data

Blocks


Df1.5Status Data

Stream


Df1.3Asynchronous

Status MessagesDf1.2

CommandResponseMessages

Df1.4MONSOONConnect ionRequests

Df2.4MONSOONConnectionRequests


Df2.2CommandResponseMessages

Df2.3Asynchronous

Status Messages


Df1.6Engineering DataConnection (FITS)

Df1.4Pixel Data

Stream (ICD 4.1)


114

Detector Head Electronics DFD Detector Head Electronics DFD Level 0Level 0

3.0Detector Head

Electronics(DH E)

PixelAcquisition

N ode

DiagnosticCommandConsoleD f3. 1

D HEC o mm an dM es s a ge s

D f3 .3A s yn chr onous

Sta tusM e s sa ge s

D f3 .5D iagn os tic

C om ma nds & R es pon se s

M onsoon DHE Data Flow Diagram (Level 0)

Df3 .4P ixe l D a ta

B loc k s

D f3 .2C omm a ndR e s pons eM e ss a ge s

115

MONSOON MONSOON Technical AppendixTechnical AppendixInterface RequirementsInterface RequirementsFlowFlow--downdown

Barry Michael Starr

116

RIO (SBRC) ORION 2k x 2k RIO (SBRC) ORION 2k x 2k (InSb/HgCdTe)(InSb/HgCdTe)

Readout Channels: 64 Channels ReadNoise: 20e-Gain (uV/e-): 2Pixel Rate/Output 1.5 us per outputFull Well (1% Linearity) 300,000e-Dynamic Range: > 16-bit Image Size 2k x 2k = 4M pixelsReadout Time 100mS (ORION projected limit, 10Hz Frame Rate)

Data Rate 4M pix/100mS = 40M pix/S (10 Hz Rate)Systran SL100 supports 50Mpix/S (10 Hz Rate)

Clock & Bias Requirements8 Clocks (-2V to –7V Range)18 Biases/Clocked Biases (0 to –8V Range)

117

NEWFIRM 4k x 4k IR ImagerNEWFIRM 4k x 4k IR Imager

Plate 1

NEWFIRM FPA CandidatesNEWFIRM FPA Candidates

Rockwell HAWAII-2 HgCdTe 4k x 4k implementation– Non-Buttable LCC package exists– 4-side Buttable package under development– Pre Assembled 4k x 4k module under discussion

Rockwell “Digital FPA” HgCdTe 4k x 4k implementation

– Under discussion, interface and packaging TBD

•RIO (SBRC) Orion (InSb/HgCdTe) 4k x 4k implementation–2-Side buttable 2k x 2k package exists–Pre-assembled 4k x 4k module under discussion

119

NEWFIRM ImplementationNEWFIRM ImplementationRockwell HAWAIIRockwell HAWAII--2 (12 (1--2.5um)2.5um)

Readout Channels: 4 x 32 (36) = 128 (144) Channels ReadNoise: > 10e- (Typically 13-20e-)Gain (uV/e-): 3-6Pixel Rate/Output 4 us per outputFull Well 100,000e-Dynamic Range: 16-bit Image Size 4 x 2048x2048 = 16M pixelsReadout Time ~ 500mS (~ 2Hz Frame Rate)Data Rate 16M pix/500mS = 32Mpix/S

< 50M pix/S (SL100 rate)Clock & Bias Requirements

13 x 4 = 52 Clocks (CMOS Inputs, 0-5V Range)5 x 4 = 20 Biases (0 to 5V Range)

120

NEWFIRM ImplementationNEWFIRM ImplementationRIO ORION RIO ORION (1(1--2.5um)2.5um)

Readout Channels: 4 x 64 = 256 Channels ReadNoise: 20e-

Gain (uV/e-): 2Pixel Rate/Output 1.5 us per outputFull Well (1% Linearity) 300,000e-

Dynamic Range: > 16-bit Image Size 4 x 2k x 2k = 16M pixelsReadout Time 100mS (ORION projected limit, 10Hz Frame Rate)

2.5S (based on 2.5um background per R.Probst)Data Rate 16M pix/100mS = 160M pix/S (10 Hz Rate)

Systran SL240 supports 120Mpix/S (7 Hz Rate)Clock & Bias Requirements

8 x 4 = 32 Clocks (-2V to –7V Range)18 x 4 = 72 Biases/Clocked Biases (0 to –8V Range)

OBSERVATORY CONTROL ROOM

CASSEGRAIN CAGE

DEWAR MOUNTED

NOAO MONSOONDETECTOR

DATA ACQUISITION COMPUTER


CONTROLLERDEWAR

CRYOGENIC OPTICAL BENCH

IR AUXILIARY CONTROL ELECTRONICS

FRONT PANEL

1Gb/s (50 Mpix/s) FIBER LINK

+5V+/-16.5V

+ 24V

VIDEO

MASTERCONTROL

BOARD

CPC

I BA

CK

PLA

NE

FOCAL PLANE ASSYFILTERMECHANISM

BENCHTEMP CTL

GETTER HTR

FPA TEMP CTL

FPA

VACGAUGE

FPA

FPA FPA128 (RSC)256 (RIO)

CLK & BIAS

16 CH IR_ACQ BOARD

CLK/BIAS BOARD

SUMMIT ETHERNET BACKBONE

COLD2HEAD

HP LINEARISOLATEDDC POWER +/-16.5V

+5VRS-232PCI BUS

SYSTRAN SL100 PCI

RABBITModule

EthernetModule

EthernetModule

SYSTRANSL100 CMC

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

16 CH IR_ACQ BOARD

ETHERNET(OPTIONAL)

ETHERNET

CONTROLLERDC POWER

DC POWER

ETHERNET

COLD1HEAD

ISOLATEDRS-232

NEWFIRM NEWFIRM Analog FPA System DiagramAnalog FPA System Diagram

OBSERVATORY CONTROL ROOM

CASSEGRAIN CAGE

DEWAR MOUNTED


DATA ACQUISITION COMPUTER


CONTROLLERDEWAR

CRYOGENIC OPTICAL BENCH

IR AUXILIARY CONTROL ELECTRONICS

FRONT PANEL

1Gb/s (50 Mpix/s) FIBER LINK

+5V

+ 24V

DIGITALVIDEO

MASTERCONTROLBOARD

CPC

I BA

CK

PLA

NE

FOCAL PLANE ASSYFILTERMECHANISM

BENCHTEMP CTL

GETTER HTR FPA TEMP CTL

FPA

VACGAUGE

FPA

FPA FPA?(RSC)

POWER

SUMMIT ETHERNET BACKBONE

COLD2HEAD

HP LINEARISOLATEDDC POWER

+5VRS-232PCI BUS

SYSTRAN SL100 PCI

RABBITModule

EthernetModule

EthernetModule

SYSTRANSL100 CMC

DIGITAL FPA INTERFACE BOARD

ETHERNET(OPTIONAL)

ETHERNET

CONTROLLERDC POWER

DC POWER

ETHERNET

COLD1HEAD

ISOLATEDRS-232

NEWFIRM NEWFIRM Digital FPA System DiagramDigital FPA System Diagram

123

MONSOON for NEWFIRMMONSOON for NEWFIRM


DETECTOR DATA ACQUISITION NODE 1



S UMMIT ETHERNET BACKBONE

LINUX P CPCI FIBER CARD

HAWAII II2K x 2K

10Mb/sEthernet

HAWAII II2K x 2K

HAWAII II2K x 2K

HAWAII II2K x 2K

124

QUOTAQUOTA--Quad Orthogonal Transfer Array Quad Orthogonal Transfer Array

A new paradigm in large imagers

OTCCD pixelstructure

Basic OTCCD cellOTA:

8x8 array of OTCCDs

125

QUOTAQUOTA--DetectorDetector Details OverviewDetails Overview

Each CCD cell of a 4Kx4K OTAIndependent 512x512 CCD– Individual or collective

addressing– 1 arcmin field of view

Dead cells excised, yield >50%– Bad columns confined to cells

Cells with bright stars for guiding8 output channels per OTA – Fast readout (8 amps, 2 sec)

Disadvantage -- 0.1 mm gaps, but gaps and dead cells are dithered out anyway

5cm

12 um pixels

126

QUOTA (8k x 8k)QUOTA (8k x 8k) for WIYNfor WIYNPackage & Demonstration CameraPackage & Demonstration Camera

4-side buttable package w/ multilayer ceramic substrate

Flexprint to hermetic or through wallCryocooled barsFour OTAs = QUOTA(8K x 8K = 15 x 15 arcmin)

127

QUOTA DetectorQUOTA Detector Details Details ––Orthogonal TransferOrthogonal Transfer

Orthogonal Transfer– remove image motion– high speed (few usec)

Normal guiding (0.73”) OT tracking (0.50”)

128

QUOTA Electronics QUOTA Electronics ––Computer CommunicationsComputer Communications

Four OTA served by an Interface Unit and Gbit fiber– Decodes

computer commands

– Synchronizes readout

– Formats data for computer transmission

64 Mpixel = 128 Mb

QUAD OTA Interface Unit (QOIU)

FIBERINTERFACE

FPGA

32 DAT A

FIBE RCTL

32 DAT A

8 CHACQ UNIT

CELL

FIBER INTERFACE

LOGICPIXELDATAMUX

LOGIC

8

OTACLK&BIAS

UNITCELL40

8 CHACQ UNIT

CELL8

OTACLK&BIAS

UNITCELL40

8 CHACQ UNIT

CELL8

OTACLK&BIAS

UNITCELL40

8 CHACQ UNIT

CELL8

OTACLK&BIAS

UNITCELL40

32 DAT A

32 DAT A

32 DAT A

32 DAT A

32 DAT A

32 DAT A

32 DAT A

CLKS/C TL

CLKS/C TL

CLKS/C TL

CLKS/C TL

CLKS/C TL

CLKS/C TL

CLKS/C TL

CLKS/C TL

EMBEDDEDMICRO

SYSTRANFIBERXVCR

(DAUGHTERCARD)

10 Mb/SET HE RNET

CLK DISTRIBUTION

NETWORK

USED FOR CONFIGAND DIAGNOSTICSOF QOIUS

USED T O SYNC HOTHER QOIUS

COMMANDDATAMUX

LOGIC

USED FOR PIXELDATA ANDC OMMAND DAT ATO DATA AC Q PC

32 DAT A

HIGH

-SPEED BA

CK

PLANE 1Gb/ S

FIBE ROPTICI/O

LVDSC LKS

129

QUOTA Software TasksQUOTA Software Tasks

Observation shift and guide loop

130

OTA Interface RequirementsOTA Interface Requirements

OTA Image Size: 4k x 4k = 16M pix# OTCCDs/OTA: 64 (512 x 512 / OTCCD)

Readout Channels: 8 Channels System ReadNoise: 5e-CCD Output Gain : 15-20 uV/e-Pixel Rate/Output: 1usFull Well (1% Linearity): 100,000e-Science Readout Time: 2sData Rate Science 8M pix/s

131

OTA Clock & Bias RequirementsOTA Clock & Bias Requirements

10 CCD Clocks5 Serial Clocks ( s1-s3, sw + rg) @ 1.0MHz Nom.

5 Parallel Clocks (p1-p4, dg) @ 200KHz Max

16 Digital Clocks8 row select lines (rs1-rs8)8 column select lines (cs1-cs8)

22 Biases5 parallel standby lines

(p1-p4 stdby,dg stdby)17 video output lines

(vdd, otg * 8), vrd)

132

OTA Clock & Bias Unit Cell (OCBC)OTA Clock & Bias Unit Cell (OCBC)CMD/SEQ

FPGA

CTL

32 DATA IN

QTY 4 EL7457CQUAD DRVR

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

x2

x2

x2

DAC

DAC

QTY 1 12 CHANNEL12-BIT DAC

16 BILEVEL CLOCK CHANNELS IN GROUPS OF 4

16 CLK

3 CTL

DACDAC

DACDAC

DACDAC

DACDAC

DAC

24 BIAS CHANNELS

3 CTL

PATTERNGENERATOR

DAC INTERFACE

LOGIC

BUSINTERFACE

LOGIC

CMDLUT

ACQ CLK

QTY 112 CHANNEL12-BIT DAC

TO ACQ FPGA

FPGA LINK

ACQ FPGACOM

16 TTL CLOCK CHANNELS FOR MUX SELECT

16 CLK

TO OTAINPUTS

133

System ReadNoise (e-): < 2.3e- (10% Contribution Total System Noise)

System ReadNoise (uV): < 34uV (@15uV/e- Min CCD Output Gain)

Channel Bandwidth: > 20Mhz ( 1us/pix, .01% settled)Input Ref Noise Density < 7.5nV/(Hz)^0.5

Dynamic Range: 16-bit (100ke-/2.3e- ~ 50k:1)Max Input Voltage Range: 2 V (100ke- * 20uV/e-)

Signal Input Swing, Not DC Offset

Note: These stay constant for QUOTA and ODI

OTA Output Interface FlowOTA Output Interface Flow--downdown

134

OTA Acquisition Unit Cell (OAC)OTA Acquisition Unit Cell (OAC)

GAIN

16-BITADC 16

X 8

CDS PGA

GAIN

16-BITADC 16

CDS PGA

ACQ FPGA

32 DATA

CTL

FROM CMD/SEQ FPGA

BUS INTERFACE

LOGIC

PIXELDATA

PROCESSINGLOGIC

FPGACOM

8 VIDEO ACQUISITION CHANNELS

ACQ CLK FPGA LINK

ACQ INTERFACE

LOGIC

FROM OTAOUTPUTS

135

QUOTA Interface RequirementsQUOTA Interface RequirementsQUOTA Image Size: 8k x 8k

# OTAs/QUOTA: 4# OTCCDs/OTA: 64 # OTCCDs/QUOTA: 256

Readout Channels: 32 Channels (8 x 4) *Clocks 40 CCD Clocks (10 x 4) *

64 Digital Clocks (16 x 4) *Biases 88 Biases (22 x 4) *

* Note: Number of Lines May be Reduced w/Common Signal Methods

Science Data Rate 64 Mpix/2s = 32 Mpix/s

4”

136

WIYN One Degree ImagerWIYN One Degree ImagerInstrumentation goal for WIYN64 OTAs = ODI

(32K x 32K = 1 x 1 deg)

QUOTA does the R&D, different funding for

large cryostat, additional devices, filters, shutter, etc.

Deployment in 2005

16”

137

ODI Interface RequirementsODI Interface Requirements

ODI Image Size: 32k x 32k # OTAs/ODI: 64 # OTCCDs/OTA: 64 # OTCCDs/ODI: 4096

Readout Channels: 512 Channels (8 x 64) Clocks 640 CCD Clocks (10 x 64) *

1024 Digital Clocks (16 x 64) *Biases 1408 Biases (22 x 64) ** Note: Number of lines may be reduced w/common signal methods

Science Data Rate 1Gpix/2s = 512Mpix/s

16”

138

Implementing the Decadal SurveyImplementing the Decadal SurveyLarge Synoptic Survey Telescope (LSST)Large Synoptic Survey Telescope (LSST)

6-8m equivalent aperture3 degree Field of View (FOV)Curved Focal Plane1400 1k x 1k CCDs (or ???)“National Virtual Observatory” (NVO)

139

Focal Plane System ConceptsFocal Plane System Concepts

System Level Approach to DesignExamine :• Performance• Cost (Component&System)• System Complexity • Power Consumption • Reliability • Risk

Picture Courtesy of DMT Website: http://dmtelescope.org/.

140

Key System IssuesKey System IssuesIntegrated acquisition/interface electronics – (system interface complexity)

Power consumption/dissipation issues/requirementsShutter-less operationColor separation (filters?)Cost / Availability / ReliabilityFocal plane operating temperature requirementsFocal plane metrology issues• Low “f/number” optical systems (fast beams)• Form factor (curved focal surface)• Pixel scale (spatial sampling, dynamic range)• Mosaic issues (4 side buttable, isothermal stability)

141

LSST Focal Plane DefinitionLSST Focal Plane DefinitionFocal Plane Diameter:• 55cm (3 deg FOV, f/1.25)

Image Plate Scale:• 51 microns/arcsec

Pixel Sampling:• < 0.2 arcsec/pixel

Focal Plane Curvature• 10 m radius of curv.• Sagittal Depth 2.6mm

Spectral Range:• 0.3 to 1um


142

LSST Focal Plane DefinitionLSST Focal Plane Definition

Focal Plane Format :• Circular mosaic of

1400 1k x 1k DevicesImage Size ~ 1.4 Gpixels/image~ Eq 38k x 38k Mosaic

Pixel Size = 10 – 12.5 um pixelsReadout Rate < 3 seconds• 200 kHz readout rate for

1kx1k detector (1 amp each)


143

Data Acquisition RequirementsData Acquisition Requirements

20s “Typ” exposure time3 s readout timeAvg Efficiency = 20/23 = 0.871.4 G pix/exp/3s readout time= 478 Mpix/s peak pixel rate= 956 Mbytes/s peak data rate

This can be handled with • 10 x 1Gb/s SL100 fibers, or • 4 x 2.4Gb/s SL100 fibersNOAO Monsoon

Scalable Image Acquisition System






(50Mpixel/s)

SYNC


SYNC


N NODES


CCDor

FPA



CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

SYNC SYNCN NODES

CCDor

FPA



CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

PIXEL ACQUISITION NODE 1


SYNC SYNCN NODES

SUPERVISOR NODELINUX PC

CCDor

FPA



CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

CCDor

FPA

PIXEL ACQUISITION NODE 2 PIXEL ACQUISITION NODE 3



144

MONSOON MONSOON Technical AppendixTechnical AppendixSoftware RequirementsSoftware Requirements& Design Detail& Design Detail

Nick Buchholz

145

Detector Requirements Detector Requirements (cont)(cont)

Pixel Readout types.– Single pixel read.– Multiple sample filtering.– Binning.– Charge shifting.

146

Detector Requirements Detector Requirements (cont)(cont)

Frame Readout types.– Single frame reads.

• Normal operation.• Orthogonal transfer imaging (charge shifting).• Others ???

– Single integration, multiple sampling reads.• Fowler Sampling.• Sample-up-the-Ramp.• Others ???

– Multiple integration, multiple sampling reads.• Coadding.• Others ???

147

Exposure Control Requirements Exposure Control Requirements (cont)(cont)

Focus Sequence support.Geometric Sequence support.– Micro-stepping, Dithering.– Mosaicing, Drift Scanning.– Chopping, Nodding, Nod and Shuffle.

Time sequence support.– Speckle Mode.– Fixed Cadence Imaging.– External Time Stamping.

148

Exposure Control Requirements Exposure Control Requirements (cont)(cont)

Exposure Control.– Start Exposure, Arm Exposure.– Pause, Resume.– Stop.– Abort.

149

DHE DFD DHE DFD 3.0 Level 1 DHE Flows3.0 Level 1 DHE Flows

Pixe lAcquisition Node

Diagnostic CommandConsole

Detector C onfiguration&

C ontrol Hardw are

Monsoon DHE Data Flow Diagram (Level 1) - DHE Controller

DS 3.1aPixel Data

(in LINUX Memory)

3.1MONSOON

Sy sTra nDrive r

3.3FiberReply

Process

3.2Fiber

InterruptProcess

3.4DHE

ControlLoop

3.5DH E

CommandRoutines

3.6D HE

HardwareRoutines

Df3.1 aMO NSO O NComm andM essages

Df3 .1bM ONS O ONComm andMessages

Df3.2 aMO NSO O N

Resp oseMessag es

Df3. 3aAsynchronous

S tatus Messag es

Df3 .2bM ONS O ON

ResposeMessages

Df3.4 a,bP ixel Data

Blocks

Df3 .3bAsynchronou s

S tatu s Messag es

Df3 .17P ixel Data

Df3.10Asynchronous

S tatus Messag es

Df3.5Diagnos tic Com mand s

and Respon ses

Df3. 7Monsoon Com -

m and Messages (Msg InQ ueu e)

Df3 .8Invalid

Messag eResp onse

Df3 .9Comm andResponseM essage

Df3.1 1Com man d

Rou tineCall

D f3 .12Com mand

St atus Return

Df3. 13ReadoutDetec tor

Df3.1 4Hard wareRout ine

call

Df3 .15Hardware

St atusRetu rn

Df3.1 8Hard ware Int erac tions

Df3.1 6Asynchronous

S tatus Messages

150

DHE DFD 3.1 MONSOON Systran DriverDHE DFD 3.1 MONSOON Systran Driver

PixelAcq uisition

Node

DS 3.1aPixel Data

(in LINUX Memory)

DS 3.1aPixel Data

(in L INUX M em ory)

DS 3.1aPixel Data

(in L INUX M em ory)

DS 3.1aPixel Data

(in LINUX Memory)

3.1.2SysTranReceive

Message

3.2Fiber

InteruptProcess

3.1.1SysTran

SendMessage

3.3FiberReply

Process

SysTran Fiber System Hardware

Df3 .1a.iMO NSO O NComm andMessages

Df3 .1bM ONS O ONComm andMessages

Df3.3 a.iA synch ron ous

Status Messages

Df3 .2bMONS O ON

ResposeMessages

Df3.4a,bPixel Data

B locks

Df3.3 bAsynchronous

S tatus Messages

Df3.1a.iiMO NS OO NComm andMessages Df3.2 a.ii

MO NSO O NResp ose

M essages

Df3 .3a.i iAsyn chronou s

S tatu s Messag es

Df3.4 a,bP ixel Data

Blocks

Df3.2 a.iMO NSO O N

ResposeMessag es

MONSOON DHE Data Flow Diagram (Level 2) - MONSOON SysTran Driver

151

DHE DFD DHE DFD 3.2, 3.3 Fiber Interrupt and Reply Functions3.2, 3.3 Fiber Interrupt and Reply Functions

3.4D HE

ControlLoop

SysTran Fiber System Hardware

DS 3.3.2DHE

Async MessageQueue

MONSOON DHE Data Flow Diagram (Level 2) - Fiber Interrupt and Reply Process

3.1MONSOON

SysTranDriver

3.6DHE

HardwareRoutines

3.2Fiber

InteruptProcess

3.3FiberReply

Process

DS 3.2DHE

M ESSAGE BY TEQUEUE

DS 3.2.1DHE

Reply Queue

Df3.1bMO NSO O NCom man dMessag es

Df3 .2.1MO NS OO NComm andMessages

Df3.2bMO NSO O NRespon seMessag es

Df3.4bP ixel Data

B locksDf3 .3bA syn ch ron ou s

S tatusMessag es

Df3.3 .1MONS O ONResposnseMessages

Df3.8In valid Messag e

Response Df3 .9Com mand Resp onseM essage

Df3 .10A syn ch ronou s

S tatus Messag e

Df3.1 7Pixel Data

Df3 .3.2A synchron ous

St atus Messages

Df3 .7M ONS O ON

Com man d Messag es(msgIn Qu eue)

Df3.1 6A synchron ous

Statu s Message

152

DHE DFD 3.4 DHE DFD 3.4 DHE Control LoopDHE Control Loop

MONSOON DHE Data Flow Diagram (Level 2) - DHE Control Loop

3.2Fiber

InterruptProcess

3.3FiberR eply

Process

3.6DH E

HardwareRoutines

3.5DHE

CommandRoutines

3.4.1Message

GatherLoop

3.4.2Message

VerificationRoutine 3.4.3

C ommandRoutine

Selection

Df3 .7.1MO NSO O N

Comm and Messages(m sg InQ ueu e)

DS 3.4.1Command

DescriptionTable

Df3.11Comm and

Routine Calls

Df3.9Comm and Respon seMessag e

DiagnosticCommand Conso le

Df3.8.1Inval id M ess age

Response (tim eout)

Df3. 8.2Inval id Message

Resp onse (format)

Df3.1 0A s ynchron ous

Status Message

Df3. 13ReadoutDetect or

Df3.1 2Com man d

S tatus Return

Df3. 4.2Messag e

St ruc tu re Checks

Df3.4.4Comm and

S truct ure Checks

Df3 .4.1Comm and M essage

Block

Df3.4 .3Com man d Messag e

Block

Df3.7.2Interru ptControl

Df3.4.5Diagn ostic Com man ds

an d Resp onses

153

DHE DFD 3.5 DHE DFD 3.5 DHE Command RoutinesDHE Command Routines

MONSOON DHE Data Flow Diagram (Level 2) - 3.5 DHE Command Routines

3.4DHE

CommandLoop

3.6DHE

Hardw areRoutines

3.4.3Command

RoutineSelection

3.5.1ReadValue

R outine

DS 3.4.1ParameterDescrip tion

Tab le

Df3.1 1Com man d

Routine Calls

Df3 .12Comm and

Statu s Ret urn

readValuew riteValueloadWaveFormreadDetectorresetDetCntr lrabortReadoutdetPwrCntr lshutterCntrlbiasPw rCntrlasyncResponsereadValueArrayw riteValueArraytestD atalinktestC lockDriverstestD CBiasSuptestA /DConvtestD /AConvtestD I/OCircuitasyncStatusMsgstartExppauseExpabortExpresumeExpstopExp

3.5.24stopExpRoutine

Df3.5 .1Com mandParameter

Checks

Df3 .5.1Comm andP aram eter

Ch ecks

Command Routine Calls

Df3.15Hardware

Rou tin e Calls Df3.15Hardware

Statu s Retu rn

Df3. 15Hardware

S tatu s Retu rn

Df3.15Hardware

Rout ine Cal ls

154

DHE DFD 3.6 DHE DFD 3.6 DHE Hardware RoutinesDHE Hardware Routines

MONSOON DHE Data Flow Diagram (Level 2) - 3.6 DHE HardwareRoutines

3.5CommandRoutines

3.4.3Command

RoutineSelection

3.4.3Command

RoutineSelection

3.6.1setM emory

Routine

DS 3.6.1Hardw are

DescriptionTab le

3.6.xxreadAFEState

Routine

Df 3.18 H ardware Manipulations

Df3.5 .1HardwareParameter

Checks

Df3.1 6Hard ware

S tatus Retu rn

Df3. 15Hardware

Routine Cal ls

seMemorysetAFEconfigsetVariablesetHKA2DconfigsetVoltageDACsetFPGARegistersetMemLocdisableIntinitESconfigDetHdw rreadAFEconfigreadVariablereadHKA2DconfigreadHKA2DValreadVoltageD ACreadFPGARegisterreadMemLocdoExpSequence....readAFEState

Hard ware Rou tine Calls

Df3 .5.1HardwareP aram eter

Ch ecks

3.3FiberReply

Process

3.4DH E

C ommandLoop

Df3.1 7Pixel Data

MonsoonDetector Head Electronics

H ardware Components

Df3.16AS ync S tatus

Messag es

Df3 .13Readou tDetec tor

155

PAN DFD 2.0 PAN DFD 2.0 Level 1 PAN FlowsLevel 1 PAN Flows

Monsoon PIxel Acquisition Node Data Flow Diagram

Client System(OCS, ICS, Engineer)

Fits Imageon D isk

Local DHSInterface

(Lev el 1 )

2.1Com m andInterpreter

3.0Detector Head

E lectronics

These tw o external entities to the PAN sho uld present the sam e set of co m mands and m essages

En gin eer in gCon sole


1.0Sup erviso ry

Process

2.2Comm andRespon se

Hand ler

2.4DetectorCo ntrolS ystem

Df2 .2Comm andR esp ons eM ess ages

2.5Image Data

Pre-Processor

Df1. 5S tatu s Data

Stream

Df1.6E ngineer ing D ataC onn ect ion (F ITS )

D f1 .4P ixel D ata

St ream (IC D 4 .1)

D f3. 4Pixel Dat a

B loc ks

D f2.1. 6Com m andRes pons eM ess ages

D f2. 1.4M O N SO O NC om m an d

R outin e Calls

D f2.1. 7M O NS OO NComm and

R out ine Cal ls

D f2. 4.1Com man dRes pon seM es sag es

D f2.5 .1C om m andR es pons eM es sages

D f1.5S tatu s D ata

S tream

Df3.2C om m an dR es pon seM es sag es

2.6Connection

Hand ler

ICD 5.0 Is TBD b ut s ince it represents the inter face to a single PAN/DHE p air

it sho uld b e identica l to ICD 4.0 .

D f2.4Con nec tionReques ts

DS 2 .02Connectio n

T ables

Df2.0 .1C onn ection

R ecords

D f2.0 .1C on nect ion

Records

Df2 .0.1Connec tion

R ec ords

D f3.1D HE

Com m an dM es sag es

D f2. 6.1Con nec tionRespon seM es sag e

D f1. 7En gin eerin gC om m andsand Statu s

D f2. 1M O NSO O NC om m andM ess ages

2.3Asynchro nus

Respo nseHand ler

D f2 .3As ync hronous

S tatus M es sag es

D S 2.01 Configuratio n

DatabaseDf2 .x.0C onfig D B

A cc ess

D f2.x. 0C on fig D B

Ac ces s D f2.x. 0Con fig D B

Ac ces s

D f2 .x.0C onfig D B

A cc ess

D f3. 3As ync hronous

Statu sMess ages

156

PAN DFD 2.1 Command InterpreterPAN DFD 2.1 Command Interpreter

Monsoon PAN Data Flow Diagram

Client System(OCS, ICS, Engineer)

(Level 2) 2.1 Command Interpreter

2.1.1Command

Gather

These tw o external entities to the P AN should present the same set of commands and m essages

Eng in eerin gCon sole

1.0Supervisory

Process

2.2CommandResponse

Handler

2.4DetectorControlSystem

2.5Image Data

Pre-Processor

ICD 5.0 Is TBD but since it represents the interface to a single PAN/DHE pair

it should be identical to ICD 4.0.

DS 2.1Connection

Tables

Df2 .4Connec tion

Record s

Df2.1MO NSO O NCom man dMessag es

Df1.7Eng ineerin gComm andsand Statu s

2.1.3Command

Checker

2.1.4Config

DatabaseMaintainer

Df2.1 .6aCom mandRespon seMessag es

Df2.1 .4MONS O ONCom mand

Rou tine Cal ls

Df2.1 .6bCom man dRespon seMessag es

Df2 .1. 7MO NS OO NComm and

Routine Cal ls

DS 2.01 Configuration

D atabase

Df2.1 .3MONS O ONCom mandMessages

2.1.2Command

Queue

Df2.1 .1M ONS O ONComm andMessages

Df2.1 .2MO NS O ONCom mandMessag es

Df2.1 .5Database

Access

DS 2.2Command

Queue

Df2.1 .8Q ueu eA ccess

157

MONSOON MONSOON Technical AppendixTechnical AppendixMiscellaneousMiscellaneous

Barry Michael Starr

158

FPDPFPDPIndustry Standard TechnologiesIndustry Standard Technologies

159

Selected Characteristics for Orion InSb ArraySelected Characteristics for Orion InSb ArrayPixels

2048X2048 (goal: > 99.5% operable). 25 µm pitch with > 98% optical fill factor.

Architecture

Two (adjacent side) close buttable to make 4KX4K mosaic.64 outputs: read out in stripes of 32 columns each.

Reference Channels

First (1) and last (2048) columns are reference columns. Additional references on each output for each row.

Frame Rate

1.5 ? sec settling time (pixel addressing to 0.1% signal). Frame rate ~ 10 frames per second.

Reset Options

Global (reset all pixels at once). Ripple (reset by row pairs).

Full Well

150,000 electrons at 0.5 V bias.

Wavelength Response

0.6-5.5 µm (> 90% average QE for 0.9-5 µm). Quarter wave AR coating at 1.7 µm.

Noise

< 25 electrons rms with double correlated sampling. < 10 electrons rms with extended Fowler Sampling.

Dark Current

< 0.2 electrons/sec.

160

Pixel Reset MethodsPixel Reset Methods

• Pixel_Reset: Each pixel is independently addressed and individually reset.

• Ripple_Reset: Each row (or row pair) of pixels is independently addressed and reset at the same time.

• Global_Reset: All the pixels are reset at the same time.

ALADDIN and Orion provide Ripple and Global reset options

161

Representative Readout MethodsRepresentative Readout MethodsFast Sampling– signal sample unit is a single sample, referenced to electrical ground– high speed at the expense of increased system noise.

Correlated Double Sampling– signal sample unit is a pair of reads at the start and end of the integration– slower speed with improved noise rejection

Fowler Sampling– signal sample is a group of n reads at the start and end of the integration– slower speed with up to 3 times improvement in read noise

Continuous Sampling Up the Ramp– continuous sampling at fixed time intervals throughout integration– linear regression on samples to determine slope

noao monsoon image acquisition system · 2006-12-08 · solutions to a large class of image...

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