modeling of sige material for ultra-scaled cmos 2 device … · 2008. 12. 4. · ge fraction alloy...
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2010 MSD Annual Review
Modeling of SiGe material for ultra-scaled CMOS device applications
A. Paul, S. R. Mehrotra, Z. Jiang, M. Luisier and G. Klimeck Purdue University and NCN
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Why SiGe material ? Electronic Structure : VCA method Transport in Core/Shell SiGe/Si – TB VCA
Random Alloy Treatment (RAT) SiGe bond length benchmarking Bulk SiGe bandedges using supercell
Alloy Scattering Alloy Scattering Potentials from RAT Transport in Alloy: Green’s Function
Comparison of Transmission Transmission to terminal characteristics Conclusion and Future Work