Optical Link Budget

3Bryan Chavez, Patrick Cleary, & Kevin Parker

Duke University

Pratt School of Engineering

Department of Electrical Engineering

Last Modified: March 25, 2005

Table of Contents

I. Abstract

II. Introduction

III. Identification and Selection of PartsIV. Optical Link BudgetV. Design and LayoutVI. Testing and PerformanceVII. Financial BudgetVIII. Bill of MaterialsIX. Conclusion & Future WorkI. Abstract

Gigabit Ethernet is a powerful and widely-used method for networking. It allows for a large number of users to interface at a high-speed on the network at the same time, all without interfering with each other. This particular project focuses on the design and construction of an optical transceiver module, which represents the Physical Media Dependent layer of a Gigabit Ethernet. To complete this project, background research will be conducted to determine the specifications needed to be compliant with official IEEE standards. Next, the different optical and electrical components for the construction of the transceiver will be researched and ordered based on performance and cost issues. At the same time, soldering and circuit design skills will be practiced and honed to perfection. Finally, a board layout will be designed, and after the fabrication of the board, the transceiver will be constructed and tested. After the completion of a working transceiver, the results will be analyzed and compared to known transceivers being sold by established companies.

II. Introduction

a. Background InformationEthernet is a local area network that allows for the transmittal of information over fiber optic cables. At its foundation, Ethernet works because of a single cable that connects to each and every machine that is part of the network. Each machine can therefore share information with any other machine on the network and is not affected by the addition or subtraction of other machines to or from the network. This ability makes large systems such as a university network possible, because numerous computers from many different locations can all access the network without interfering with each other.

The first Ethernet was created by Bob Metcalfe in 1973 at Xerox Corporations Palo Alto Research Center. Metcalfe developed this invention while attempting to connect a computer to a printer. This original Ethernet was constructed using a coaxial cable and could only transmit information at a rate of 3 Mbps. In 1980, three companiesXerox, Intel, and Digital Equipment Corporationall joined forces to create the 10-Mbps Ethernet Version 1.0 (also known as the DIX standard), and the speed and importance of Ethernet began to increase exponentially. Soon after, the IEEE stepped forward and developed an official standard for network technologies. Because it was commissioned in February of 1980, this standard is now called 802.3 standard, with the 3 referring to the specific subcommittee of the 802 group that created the standard for a network that was similar to the DIX Ethernet,. Improvements continued to be made on the original implementation of Ethernet, and the speed at which it could transmit data increased greatly. In 1998, IEEE developed the Gigabit Ethernet, which could operate at 1 Gbps and is widely used today. In addition to the speed improvements in modern Ethernet, the range over which networks can now extend is staggering. In the early Ethernets developed in the 1970s, the entire network was usually limited to a single building because of restraints in the length of the cables. In comparison, a modern Gigabit Ethernet using multimode fiber has a range of 550 meters, while one using single-mode fiber has a range of 5000 meters.

The way in which Ethernet systems handle transmissions is also very interesting. This process is referred to as CSMA/CD, an acronym which stands for carrier-sense multiple access with collision detection. The phrase multiple access describes the fact that many devices are connected to a given Ethernet network and that each of them is aware of all transmissions sent by any other device on the network. Since there is only one mediumtypically a fiber-optic cableavailable for all of these devices to use, Ethernet must contain the ability to prevent one devices transmission being interfered by other transmissions. The solution, known as carrier-sense, involves a protocol in which each device checks the networks medium to ensure that no other device is transmitting information. If there is a current transmission, then the device will wait until it is finished before beginning its own transmission. At times, two or more devices might attempt to begin a transmission at the exact same instant. When this happens, each device recognizes this fact based on the fact that its own transmission returns with interference from the other transmission, a process known as collision detection. When a collision is detected, each transmitting device halts its transmission and then waits a random amount of time before attempting to transmit again. The amount of waiting time must be random so that the two devices do not continue to produce collisions as they attempt to transmit over and over again.

The above description, however, illustrates a very basic Ethernet network, and numerous modifications have been necessary to allow the system to be useful with a large number of users, such as a college campus. The process of segmentation is one method that allows many devices to be connected to the same network without interfering with each other too often. In segmentation, a single Ethernet medium is split into multiple segments, so that multiple transmissions can be made at the same time. To enable all of the devices on the same network to continue to interact with each other, bridges exist to connect the different segments together. These bridges transmit and receive information just like other devices on the network, and they follow all of the rules of collision detection and carrier-sense. However, the only information that a bridge transmits is the echo of a transmission from an adjacent segment.b. Project Overview

A Gigabit Ethernet contains many layers of abstraction, but the only layer that will be constructed in this project and addressed in this paper is the Physical Media Dependent (PMD) Layer of the Physical Layer. Specifically, the scope of this project involves the design and creation of an optical transceiver module that is IEEE 802.3z standard compliant for an optical Gigabit Ethernet. The optical transceiver module can be broken into two components: the transmitter (Tx) and receiver (Rx). In the transmitter, a digital signal is input to the Maxim 3287 chip, which is called the laser driver. The laser driver converts the digital logic to a current which must be large enough to drive an optical transmission device called a VCSEL. The VCSEL transmits an optical signal to a corresponding optical receiver device which is called a ROSA. These two optical devices are connected by a fiber-optic cable which also attenuates the signal. The ROSA actually contains two devices: an optical component called a photodiode (PD), which converts the optical signal from the Tx portion of the transceiver to an electrical signal, and an electrical component called a trans-impedance amplifier (TIA), which converts the electrical signal from the PD to a differential voltage. The differential output from the ROSA is then sent to another amplifier, which is called the limiting amplifier and is implemented using the Maxim 3264 chip. This limiting amplifier transforms the differential output from the ROSA to a digital signalidentical to the one input to the laser driver chipwhich becomes the output of the transmitter.

To accomplish this task, a number of preliminary steps have been taken to ensure that each group is properly prepared for the construction and implementation of the transceiver. Firstly, a number of presentations were covered by the instructors over the first half of the semester, serving as introductions to the various optical concepts important to the project. At the same time, the group both organized itself into a management structure to appropriately divide the work of the project and also projected the time-table of the different phases of the project so that a guide could exist over the course of the semester. Next, the transceiver link was planned both electrically and optically and was incorporated into the optical link budget to ensure that electrical and optical signals within the transceiver circuit are within the constraints of the circuit devices. In order to practice soldering and to gain more familiarity with the physical components of the project, a test transmitter board was constructed and evaluated using only electrical components. With the knowledge gained from the presentations and from the hands-on work, the transceiver link was then planned. This process included the research and ordering of the proper parts, the design of the transmitter and receiver circuits, and the layout of the circuits and optical devices on a PCB board.

After this necessary and helpful preparation, the group will be ready to construct and test the entire optical transceiver module. The remaining portion of the semester will be utilized to accomplish this task. The group was provided with a $350 budget for the completion of the project. The funds in this budget are for the components to be used in the transceiver and for the fabrication of the PCB board, as well as any shipping costs that may be incurred in the process.

c. Optical Background

The two optical devices that will be incorporated in this project are the Vertical Cavity Surface Emitting Laser (VCSEL) and the photo-detector or photodiode (PD), which is included in the Receiver Optical Sub-Assembly (ROSA).

A VCSEL is made up of a double heterostructure compound semiconductor that is forward biased. Carriers generated by the forward bias are injected into the active region of the semiconductor, producing light at varying wavelengths. Mirrors set at different distances from the cavity of the VCSEL reflect the light into the cavity, combining all of the light into one wavelength that can be output as a circular symmetric laser through a fiber-optic cable. Lasers are utilized in Ethernet applications rather than LEDs for a number of reasons. When lasers are powered with an input current greater than a threshold current, they experience an exponential increase in optical power output, rather than the linear relationship between input current and output power seen in LEDs. In addition, lasers are much more efficient in transmitting light to a fiber because of its divergence angle of 6, compared to the 90 divergence angle of LEDs.

Photodiodes are typically made up of a P-i-N compound semiconductor. The semiconductor is doped as a double heterostructure and is operated in reverse bias. The entering light from a fiber-optic cable passes through the i portion of the semiconductor, which is the smallest region and serves as the absorbing area of the photodiode. An electric field caused by the reverse bias then forces the free carriers to the output of the photodiode, thereby creating a current. In order to ensure that a photodiode will produce the desired performance, the device is designed so that a high efficiency, or responsivity, and a low capacitance exist.

d. Organizational Management

As suggested by the instructors, the major tasks of the project were divided so that one member of the group assumed the primary responsibility for ensuring that a particular component of the course was accomplished. In addition, another member of the group was assigned to each task in a secondary role, both to assist the lead team member and to assume responsibility in case of emergency. In no way, however, was this structure meant to burden one team member with the entire responsibility of a particular task, and it is hoped that each team member will be able to participate in each phase of the project. The assignment of roles is specified below in the following table.

TaskTask LeaderPrimary Support

Coordination and BudgetPatKevin

Optical Link Design and BudgetKevinBryan

Board Construction / SolderingBryanPat

Part Research / OrderingPatKevin

TestingKevinBryan

Design / LayoutBryanPat

WebsiteKevin-

e. Time Management

To ensure that the group does not fall behind schedule in the creation of the Gigabit Ethernet, a GANTT chart was created to project the timeline of the different tasks that must be accomplished throughout the semester. This timeline was based primarily off the final GANTT charts from groups in previous semesters of this project. To construct the initial GANTT chart, the process was conducted end-to-beginning. Based on the deadline and the amount of time for previous groups to build and troubleshoot their transceivers, it was determined that the first board fabrication should be ordered in mid-March. Because this date coincided with Spring Break, the week before spring break was designated the ordering deadline for the PCB board. This decision should leave enough time at the end of the semester to complete the project, even with unexpected problems. The tasks to be completed before the first board fabrication were then projected accordingly, so that an approximately equal amount of work would be accomplished each week. The current GANTT chart is shown below.

III. Identification and Selection of Parts

The initial venture into the VCSEL and photodiode search provided a myriad of results, some encouraging and others not. The most challenging aspect of the VCSEL search was sifting through options which appeared to be a perfect match for the purposes of a Gigabit Ethernet, but were instead slightly different from the desired part. Photodiodes, however, proved to be much more difficult to find, and the use of a ROSA as a replacement was eventually decided upon.

Several manufacturers were eliminated early in the process of determining the best VCSEL for this particular project. Luxnet Corporations VG1A-7000 and Kyosemis KLD085VC were removed from consideration because of the potential difficulties that might occur when ordering from overseas companies, especially ones which were unreliable when responding to questions. Oepics LV1001-TO appeared to be promising because of its performance and because of the companys location in the United States, but was only available at speeds of 10 Gb/s, which would be inefficient and potentially problematic in terms of noise for a Gigabit Ethernet. One of the best manufacturers identified was Roithner Lasertechnik, whose TTR-D1 VCSEL had excellent performance. This company was decided against, however, because of price and overseas shipping concerns. Finally, Advanced Optical Components was chosen as the best source of VCSELs. Its 1.25 Gb/s VCSELs four corners analysis did not meet the current requirements of the optical link budget, but its 2.5 Gb/s VCSEL (HFE419x-541) produced a four corners analysis that was adequate. In addition, the VCSELs excellent price ($14.50 per part) and the companys location in the United States made this particular VCSEL the logical choice. After ordering from Advanced Optical Components, a company that had been late in responding to emails, Emcore, offered to send twenty free samples of their LC-TOSA. While it would have been ideal to learn about this before the ordering deadline, the free VCSELs were very much appreciated and will hopefully be incorporated into the second run through the board.

Photodiodes were much more difficult to find, and after analyzing the different possibilities, it was determined as a class to focus on ROSAs instead of photodiodes. Because Advanced Optical Components had already been chosen as a VCSEL provider, it made sense to investigate their ROSA, as well. It was quickly determined that the companys HFD3180-103 ROSA was the best option because of its price ($10.00 per part), its availability, and the convenience of ordering all optical parts from one company.

The passive components were considerably easier to identify and obtain. The majority of the partsincluding the ferrite inductors, two types of potentiometers, four types of resistors, the capacitors, and the power jackswere ordered from Digi-Key. SMA connectors were ordered from Jameco, and the PCB boards were fabricated by Express PCB.

Two mistakes were made during the ordering process. The SMA connectors were originally ordered from Newark InOne, but the parts turned out to be QMA instead of SMA. Because of difficulties in getting the pieces exchanged for the correct parts, it was decided to suffer a small restocking fee and reorder from a different company. Also, the original power jacks ordered from Digi-Key turned out to be the wrong part number and were not able to be mounted to a PCB board. Because of the relatively low cost of this part, it would have been an unnecessary amount of trouble to return them, so the correct parts were simply ordered.

When creating the PCB board, the layout was designed to work for the Advanced Optical Components VCSEL, which requires a common cathode arrangement. Ideally, the second board will be designed for a common anode, which would allow for the use of the Emcore VCSEL. For this particular board fabrication, both a conservative and an aggressive layout were implemented, as discussed in the layout section of this paper. Taking this information into account, enough passive components were ordered so that four different circuits could be created, with additional pieces in reserve in case of accidents or problems.

IV. Optical Link Budgeta. Four Corners Analyses

In order to develop an optical link budget to be able to verify our choice of parts for the transmitter it is first necessary to perform a four corners analysis for the two different VCSELs used in this project. The primary part used is the Advanced Optical Components HFE 419x-541, operating at 850nm, LC connectorized, common cathode, 2.5 Gb/s operation, and attenuated. Using the minimum and maximum values from the data sheet the following analysis can be performed:Ith (mA) (mW/mA)Itot(MAX) (mA)Itot(MIN) (mA)Ibias (mA)Imod (mA)

0.50.0425.50003.647314.573621.8528

2.50.0427.50005.647316.573621.8528

0.50.166.75001.28684.01845.4632

2.50.168.75003.28686.01845.4632

Figure 1: Four Corners Analysis for AOC VCSELThe most important thing to conclude from this analysis is that these values are within the operation parameters of the Maxim IC 3287 Laser Driver by being less then 30 mA.

The secondary part being used is the Emcore TO-46 VCSEL. Like the AOC VCSEL, the Emcore VCSEL operates at 850 nm, is LC connectorized, and despite being designed for 2.5 Gb/s operation, it will function at lower speeds. Unlike the common cathode configuration of the AOC VCSEL however, the Emcore VCSEL is in the common anode configuration. This is not relevant in theory to our product, however, in practice, it will require a different board layout than the AOC VCSEL. Ith (mA) (mW/mA)Itot(MAX) (mA)Itot(MIN) (mA)Ibias (mA)Imod (mA)

0.50.25.50001.12953.31474.3706

2.50.27.50003.12955.31474.3706

0.50.43.00000.81471.90742.1853

2.50.45.00002.81473.90742.1853

Figure 2: Four Corners Analysis for Emcore VCSELLike the AOC VCSEL the Emcore VCSEL is also within the operation limits set by the laser driver. b. Link BudgetOnce VCSEL components have been chosen it is then necessary to draft the optical link budget. There are however a series of assumptions that need to be made in order to draft this budget: Eye safe limit Pmax = 1 mWIn order to have a transmitter that will not cause inadvertent eye damage it is necessary that the maximum output power at the VCSEL not exceed 1 mW.

From the 802.3 standard extinction ratio = 9dBFrom the 802.3 standard the extinction ratio is 9 dB. This extinction ratio is used to calculate the value for Pmin. Thus we see that Pmin = Pmax *10^(-9/10)

Pmin = .12589 mW Maximum Link Power Budget Loss at Rx from 802.3 Standard = 7.5 dBFinally, from the 802.3 standard the maximum loss in the fiber between the transmitter and receiver is 7.5 dB. This loss is used to calculate the range of power at the receiver.AOC VCSEL &HFD3180-108 ROSA

Ith (mA)1.8

DC Bias of laser (mA)10.29

Slope Efficiency (mW/mA)0.125

Modulation Current of Tx (mA)29.1369

Range of Power Output (mW)0.12589 - 1.0

Range of Power at Rx (mW) 7.5 dB Loss.02239 - .17783

Voltage Output Range from ROSA (mV)55.98 444.58

Voltage Input Range for Maxim 3264 (mV)5 - 1200

c. ROSA Parameters

While the requirements for the VCSELs are relatively stringent, by using a ROSA instead of a photodetector and TIA the only parameter that one needs to be concerned with is the signal gain in Volts out from the ROSA relative to Watts in from the fiber optic. The ROSA being used, HFD3180-108 from Advanced Optical Components has an average gain of 2500 V/W with a minimum gain of approximately 1500 V/W and a maximum gain of approximately 3500 V/W. Using the average gain from the ROSA and the range of power at the receiver from the optical link budget it is then possible to calculate the range of voltage output from the ROSA to be 55.98-444.58 mV which is within the operating range of the input for the Maxim 3264 Limiting Amplifier. V. Design and Layout

a. Design Tools

The main CAD programs used for the project were obtained via online from www.expresspcb.com. They were downloaded free of charge as a package that included two design tools: ExpressSCH 4.2.2 and ExpressPCB 4.2.2. The ExpressSCH 4.2.2 software is a simple and effective way of creating design schematics using pre-packaged parts from built-in libraries along with easily-created customized components. The user interface is very similar to click-and-drag drawing programs such as Windows Paint, making managing and editing the schematics relatively easy. On the other hand, the ExpressPCB 4.2.2 software is used primarily for designing the printed circuit boards (PCB). Although its design view with the components not explicitly shown looks more complicated, the program itself has a very similar interface as ExpressSCH. It even includes a feature that links the schematic compiled from ExpressSCH to the PCB design. This feature highlights specific pins that need to be connected together providing a helpful guide for converting the schematic design into a PCB format.

Both software tools are easy to use and include comprehensive help files that make learning to use them simple. More importantly, the ordering of PCBs is built straight into ExpressPCB 4.22 making the design process from start to finish more efficient. This feature includes calculating the overall cost, estimating how long it will take for the boards to be fabricated, as well as checking the design for basic mistakes before finalizing the order.

b. Schematic Design

Transmitter

The general structure of the transmitter (Tx) schematic was based primarily on the test Tx board as well as the results from the work of previous groups. The major components include the AOC/Emcore VCSEL, the MAXIM 3287 Laser driver chip, and passives (resistors, capacitors, inductors, & potentiometers). As seen on the final Tx schematic shown in Figure 3, the design incorporates a number of key features that can improve the overall performance of the integrated circuit (IC). For example, capacitors C1 & C2 with the inductor L1 function as a filter designed to minimize the high-frequency noise from the power supply. Similarly, capacitors C3, C6, and C7 act as decoupling capacitors which reduce the magnetic induction between the traces by absorbing high frequency signals. They create a low impedance path between the IC pins drawing the current and the local ground contact, forming a return path for the current to the power supply. This prevents voltage spikes from occurring in the supply traces and helps reduce noise and impedance problems. Since the Tx and Rx circuits will be sharing a power supply which can potentially create a lot of noise, supply decoupling cannot simply be ignored. Both the filter and decoupling capacitors help alleviate the coupling of the highly-sensitive signals to noise making them vital to accurate overall performance.

The other passives help maintain the differential nature of our circuit as well as help control and maintain the operation of the transmitter. Resistor R1 acts as a terminating resistor between the differential inputs which prevents reflections by matching the design impedance. Resistor R2 helps match the differential outputs of the laser driver chip. Potentiometers R3 and R4 are used to manipulate the operation of the VCSEL, scaling the output and controlling the output power of the VCSEL respectively. R5 & R6 are placed in series of these potentiometers as limiting resistors to protect the chip and the VCSEL from high currents in case the potentiometers are set down to an unsafe level. Capacitors C8 and C9 are coupling capacitors which helps maintain a steady AC current across the signal traces. Inductors L3, L2, and L4 act like high-frequency resistors (they have small inductances at high frequencies). Thus, they help absorb high frequency noise from the power supply lines.

Figure 3: Tx Schematic.

Receiver

The receiver (Rx) schematic was also largely based on the work of previous groups. One main difference, however, is the implementation of a ROSA instead of the photodiode (PD) and transimpedance amplifier (TIA) combination. This was done to bypass the compatibility issues and design considerations of using the PD and the TIA. As seen in Figure 4, the design is a lot simpler with only two major components: the AOC common cathode ROSA and the MAXIM 3264 limiting amplifier chip(LA). The rest are passives with similar purposes as those used in the transmitter shown above. Like the transmitter, the Rx design also includes a filter (C4, L1, and C5) and decoupling capacitors (C3, C6, and C7). As discussed before, these components were included to help alleviate the coupling of highly-sensitive signals to noise. The design also includes coupling capacitors (C1, C2, C8, and C9) to maintain a steady AC signal between the ROSA and the LA as well as from the LA to the differential outputs.

Figure 4: Rx Schematic.

c. PCB Layout

Design Considerations

After the Tx and Rx schematics were approved and completed, they were converted into a PCB design using ExpressPCB 4.2.2. The designs are required to take into consideration specific design rules mentioned in the tutorial as well as in class. Firstly, as stated in the tutorial for the software, lines should be as short and as direct as possible and should avoid sharp, 90 turns. Instead, signal traces should be limited to horizontal, vertical or 45 angles which help reduce the risk of reflections. Secondly, since there are highly-sensitive signal lines on the board, care must be taken into avoiding transmission lines as well as reducing noise coupling. Making the traces act like wires instead of transmission lines can be achieved by minimizing their length. Since the end goal is to have the transmitter able to send a signal at a rate of 1 gigabit per second, the signal must be at least a 500 MHz square waveform. The steep transitions of this waveform from low-to-high and high-to-low require that the lower and upper harmonics be included. Ideally our signal will include up to the fifth harmonic which typically exhibits about 15% eye closure--a very tolerable level. In order to achieve this, the lines must not exceed 4 mm or else they will act like transmission lines causing reflections that lead to higher eye closure percentage and poorer performance. Noise coupling, on the other hand can be avoided by adding decoupling components on appropriate places on the board and by creating differential inputs/outputs. Lastly, the spacing on the mini-board needs to be very efficient since the project is under a budget limit. This involves making the components compact to fit as many Tx and Rx designs on a single board since board fabrication is costly both in time and money. Having multiple designs on one board will help backup against poor assembly as well as allow multiple design concepts to be tested.

Conservative Design

Following all the design rules and taking in all the considerations mentioned above, the completed conservative design is shown in Figure 5. As can be seen, the components are all relatively close to each other and all angled traces follow a 45 angle to avoid reflections. Moreover, the highly-sensitive lines such as the outputs of the ROSA have been decreased to a width as close to the ideal 4mm length. This helps avoid the trace from becoming a transmission line and helps maintain the signal into the LA. The ROSA is also at the furthest distance from any of the noisy sources such as: the power supply lines, the output of the LA, the VCSEL, and the laser driver. This should help avoid any crosstalk or interference between the transmitter and the receiver. Furthermore, the Tx and Rx ground planes are separated inductively to help further reduce the high-frequency interference from going through the boards. The layout also exhibits as much symmetry as allowed given the dimensions of the parts and the space allotted on the mini-board to maintain the differential inputs and outputs for both the Tx and the Rx. This is most evident on the outputs of the laser driver where the VCSEL is parallel to resistor R2 (to match the loads) as well as on the inputs and outputs of the LA chip. Maintaining symmetry helps the circuits effectively maintain their differential operation which helps bypass differences in ground levels as well as minimizes noise errors between and on the two lines. The effectiveness of all these design concepts cannot be fully determined until the boards are assembled and tested.

Figure 5: TxRx Conservative PCB design.

Aggressive Design

The main difference between the aggressive design seen in Figure 6 and the conservative design, is the distance between the VCSEL and the ROSA. In order to meet the specification for a Duplex SC connector, they were moved in to a distance of 13.5 mm apart. This would make them compliant with using the duplex cable that would most likely be used during the boards real-world application. Unfortunately, this creates issues of crosstalk between the transmitter and the receiver. The close proximity with each other will most likely result in the ROSA picking up interference from the VCSEL or the high-frequency signals from the laser driver, making the input signal into the LA very inaccurate. Furthermore, moving the ROSA makes the trace between the inputs to the LA longer than is recommended for avoiding transmission lines and makes it difficult to maintain the symmetry needed for differential inputs. If it is too long and asymmetric it will create reflections and distortions, further degrading the signal going into the LA inputs.

Other differences in the design include connecting the ground planes through a trace at the bottom of the board instead of being inductively-connected and removing the potentiometer from between the ROSA and the VCSEL and moving it up closer to the laser driver chip. These changes could have adverse effects on the performance. Connecting the two ground planes may cause high-frequency noise to cross over and interfere with circuit operation. Moving the pot could decrease any shielding it could have provided when it was between the ROSA and the VCSEL, thus leading to poorer performance. Alternatively, these changes may have no effect and might even improve the performance. No conclusions can be drawn until the new layout is assembled and tested.

All of these variations help attribute to the designs aggressiveness and to testing and trying new design concepts in hopes of finding an improvement to the overall design. Breaking the conventional design rules increases the risk of poor performance but can also produce an innovation untapped by the safer more conservative designs.

Figure 6: TxRx Aggressive PCB design.

VI. Testing and Performancea. Test Transmitter AlphaThe first board that was constructed was the purely electrical Test Tx Board. Because two of these boards were constructed the initial board was titled Test Tx . There were numerous problems encountered in both the construction and testing of this board. Initially only one set of inputs were installed on the board due to an error from trying to follow a previous groups work. Using this setup the inputs and outputs to the board were electrically connected and thus while there appeared to appropriate performance on the board this was clearly not the case. Once this issue was corrected and all four SMA connectors were installed on the board there were still further problems. During the next testing phase the inputs and outputs to the board were reversed so that the chip was being attempted to be driven in reverse with the output from the pattern generator sent into the outputs of the board and the inputs to the oscilloscope sent to the inputs to the board.

During the third trial of Tx Board A this issue was addressed and the board was properly connected as shown in the following pictures:

Figure 7: Proper Test Setup for Tx Board A

Figure 8: Inputs and Outputs Properly Connected for Tx Board A

Still, the board did not function properly, with no attenuation and using the PRBS7 pattern from the signal generator the eye was very sloppy and altering the value of the potentiometer had little to no effect on the board output.

Figure 9: Poor Output from Tx Board AFurther investigation of this board with the probe and scope revealed a problem in the differential inputs to the laser driver IC. Namely, while a signal was measured at the second input to the chip, no input was observed at the first input.

Figure 10: Data(+) InputFigure 11: Data(-) Input

As a result of this testing the decision was made to attempt a second fabrication of the Test Tx Board in order to try and create a working and functioning test board. b. Test Transmitter Beta

The second attempt at constructing a working electrical transmitter was titled Test Tx B. Attempting to learn from all of the failures in Test Tx A, Test Tx B was constructed completely using the more advanced soldering equipment in the lab and was fully assembled in one fabrication attempt.

Figure 12: Top of Test Tx BFigure 13: Bottom of Test Tx B

While this board was tested in the exact same manner as the final tests were run on Test Tx A, Test Tx B yielded dramatically different results, namely, results that were to be expected from an electrical test board of this nature as shown in the following table:0 dB

PRBS7 Pattern

BER (no signal)AC Coupling

10 dB

PRBS7 Pattern

BER < 10^-9(3 minute interval)AC Coupling

70 dB

PRBS7 Pattern

BER < 10^-9(3 minute interval)AC Coupling

Figure 14: Eye Set for Test Tx BIn addition to achieving an eye for all levels of electrical attenuation greater than 0 dB and less than or equal to 70 dB the output was also scaled by changing the value of the potentiometer.

70 dB

PRBS7 Pattern

AC Coupling

70 dB

PRBS7 Pattern

AC Coupling

Pot value adjusted

to scale down output

With the completion of these tests Tx Board B was declared a resounding success. The eye diagrams were very well defined, the potentiometer scaled the output, the BER was very low, and attenuation had minimal effects until extreme values.

c. Board Fab 1 Alpha

Having successfully tested a purely electrical board the next phase in the project was to attempt to implement a functioning optical board using our board design and specified components from our optical link budget. The first attempt at creating a fully functional optical board was Board Fab 1A. Board Fab 1A was assembled without known incident. However, when the board was powered using the 5V power supply the ferrite bead in the power filter for the transmitter circuit failed catastrophically. After removing and replacing the ferrite bead and again having the component fail catastrophically again further investigation of the board was warranted. Initial testing was done on an unplugged and unsoldered board to determine if there might be some unrecognized short in the design of the board. No such design flaw was found. Investigation with a digital multimeter of Board Fab 1A however revealed a short that was causing a 5 volt drop across the failing ferrite bead. While the exact location of this short could not be determined it did explain the behavior being observed. Rather then continue to try and hunt down the odd failure a second board was constructed.d. Board Fab 1 Beta

Board Fab 1B seemed to be identical to Board Fab 1A. However, Board Fab 1B is, at the time of publication, partially functioning, while there was no functionality due to catastrophic failure in Board Fab 1A. Initial testing was done using the 3.3 V power supply to try and lessen the likelihood of catastrophic failure such as that observed with Board Fab 1A and the 5 V power supply.

Figure 15: Testing Board Fab 1BOn the transmitter circuit for Board Fab 1B a signal was detected at both outputs of the chip. Furthermore, at the input to the VCSEL a signal was not only modulated but also had a DC offset of approximately 3.3 V. However no lasing was detected from the VCSEL using either the built in optical receiver of the pattern generator or using a digital camera known to detect IR. The two signals found with the probe are shown below:Output of

Limiting Amplifier

Using Probe

Input to VCSEL

Using Probe

Figure 16: Tx Signals for Initial Testing of Board Fab 1BWhile the transmitter is not yet fully functional in Board Fab 1B it is certainly a vast improvement over the catastrophic failure experienced with Board Fab 1A. Further testing by systematically altering the values of the potentiometers in order to increase the current to the VCSEL as well as switching back to the 5 V power supply will hopefully improve the performance of the transmitter circuit. Like the transmitter, the receiver in Board Fab 1B is, at publication, partially functioning. The ROSA is giving an ideal output that is going into the limiting amplifier. At this point, however, the limiting amplifier is not properly amplifying that signal to the outputs of the board. Using the optical output from the pattern generator the following signal is observed at the output of the ROSA using the probe.

Figure 17: ROSA Output for Initial Testing of Board Fab 1B

During testing the limiting amplifier did heat up immensely on a few occasions. While it is possible that the limiting amplifier was damaged during testing further testing is needed to properly diagnose the cause of failure in the receiver of Board Fab 1B. Furthermore, after continued inspection it was observed that the first instillation of the limiting amplifier was inverted. VII. Financial Budget

The budget for completing a working Gigabit Ethernet board was allocated to be three hundred fifty dollars per group. This amount of money should include the costs of all of the electrical and optical components required for the circuit, the fabrication of the PCB board, and any shipping costs that might be incurred in the process. Since cost is such an integral part of this project, this factor was an important reason for the choice of VCSEL and ROSA supplier. The prices for these two optical devices were significantly less expensive than typical costs reported by groups in previous years, which was beneficial when generating the financial budget. In addition, because of Emcores offer to send free VCSELs, there will be enough parts in reserve to dispel the need for an unanticipated and last-minute VCSEL order.

It was decided that two separate PCB board fabrications could be made within the constraints of the budget as a result of the relatively low cost of the optical components. Therefore, a great deal of flexibility exists for future work. If the construction of the first board is unsuccessful, the second fabrication can focus on the improvement of weaknesses in the initial design. If, on the other hand, the first board works perfectly, the second fabrication can be designed around the Emcore VCSELwhich is common anode rather than common cathode, and therefore requires a slightly different circuitand would focus on any performance differences between the two different VCSELs.

The current financial budget is included in the following table.

ItemSupplierPart #QtyUnit Price Total Amount

Ferrite Chip InductorDigikey490-1034-1-ND30 $ 0.12 $ 3.60

Power JackDigikeyCP-002APJCT-ND5 $ 0.81 $ 4.05

POT 1.0kOhmDigikey3296W-102-ND5 $ 2.50 $ 12.50

POT 25kOhmDigikey3296W-253-ND5 $ 2.50 $ 12.50

Resistor 115 OhmDigikey311-115CCT-ND10 $ 0.08 $ 0.80

Resistor 100 OhmDigikey311-100CCT-ND10 $ 0.08 $ 0.80

Resistor 24 OhmDigikeyRR12Q24DCT-ND10 $ 0.15 $ 1.51

Resistor 10 OhmDigikeyRR12Q10DCT-ND10 $ 0.15 $ 1.51

Capacitor 10000 pFDigikeyPCC103BNCT-ND100 $ 0.04 $ 3.66

SMAsJameco901-143-6RFX10 $ 4.20 $ 42.00

2.5 Gbps ROSAAOCHFD3180-1034 $ 10.00 $ 40.00

2.5 Gbps VCSELAOCHFE419x-5414 $ 14.50 $ 58.00

PCB Board FabExpress PCB2 $ 59.00 $ 118.00

Shipping / MiscellaneousVarious $ 25.94

Total $ 324.87

VIII. Bill of MaterialsProductVendorItem NumberQtyLarge Qty Price ($)Total Amount ($)

POT 1.0K OHM Digikey3296W-102-ND11.0921.092

POT 25.0K OHMDigikey3296W-253-ND11.0921.092

RES 115 OHMDigikey311-115CCT-ND20.016820.03364

RES 100 OHMDigikey311-100CCT-ND20.016820.03364

RES 24 OHMDigikeyRR12Q24DCT-ND10.029580.02958

RES 10 OHMDigikeyRR12Q10DCT-ND10.029580.02958

CAP 10000 PFDigikeyPCC103BNCT-ND180.018880.33984

CONN PWR JACKDigikeyCP-002APJ-ND10.403380.40338

Ferrite Bead InductorDigikey490-1034-1-ND50.0640.32

VCSELAOCHFE419x-54117.257.25

ROSAAOCHFD3180-10315.005.00

Laser Driver ChipMaximMAX328714.004.00

Limiting Amplifier ChipMaximMAX326414.004.00

PCB BoardExpress PCB4 Layer Board15.71955.7195

Total $ 29.34

IX. Conclusion and Future Work

Midways through the semester, a great deal of the assigned tasks have been completed, but there is still more to accomplish. The practice board was successfully constructed, tested, and diagnosed for problems, and invaluable experienced was gained in the process. The components for the transceiver were researched and ordered, and despite some difficulties and problems in the ordering process, all of the correct parts were eventually obtained. In addition, the optical link budget was calculated to ensure that the different components could operate successfully, and this information was then utilized to create a design schematic and layout for the transmitter and receiver circuits.

In the remaining portion of the semester, the group will be primarily focused on completing the working transceiver module. As a first step, the known problem with the receiver circuit chip will be corrected and tested. For the transmitter side of the board, the group will attempt to identify the fundamental problem that is preventing the VCSEL from being driven. Once a working transceiver is obtained, a decision will have to be made. Since there is enough money in the budget for a second board fabrication, a different circuit could be designed to enable testing using the Emcore VCSEL, or the existing layout could be modified to achieve more efficient design goals. Either way, the underlying goal will be to complete two working transceiver boards and compare the differences in their performances and costs in the hopes of producing a comparable product that is competitive with existing devices on the market. Pidgeon, Nick. How Ethernet Works, [Online Document]. Howstuffworks Online. [cited March 24, 2005]. Available HTTP: HYPERLINK "http://computer.howstuffworks.com/ethernet.htm/" http://computer.howstuffworks.com/ethernet.htm/

IEEE. IEEE 802.3z Standard, [Online Document]. IEEE. 2002 [cited March 24, 2005]. Available HTTP: HYPERLINK "http://standards.ieee.org/getieee802/download/802.3-2002.pdf" http://standards.ieee.org/getieee802/download/802.3-2002.pdf

Cisco Systems. Ethernet Technologies, [Online Document]. Cisco Systems, Inc. July 1, 2002 [cited March 24, 2005]. AvailableHTTP: HYPERLINK "http://www.cisco.com/univercd/cc/td/doc/cisintwk/ito_doc/ethernet.htm/" http://www.cisco.com/univercd/cc/td/doc/cisintwk/ito_doc/ethernet.htm/

Pidgeon, Nick. How Ethernet Works, [Online Document]. Howstuffworks Online. [cited March 24, 2005]. Available HTTP: HYPERLINK "http://computer.howstuffworks.com/ethernet.htm/" http://computer.howstuffworks.com/ethernet.htm/

HYPERLINK "http://www.techfest.com/networking/lan/ethernet1.htm" http://www.techfest.com/networking/lan/ethernet1.htm and HYPERLINK "http://www.iec.org/online/tutorials/opt_ethernet/topic02.html" http://www.iec.org/online/tutorials/opt_ethernet/topic02.html

Background Information from notes, see Blackboard for more information

Further background Information from notes, see Blackboard for more information

Background Information from notes, see Blackboard for more information

Datasheet at: http://www.advancedopticalcomponents.com/product/datacom.php

Datasheet at: http://www.emcore.com/assets/fiber/TO462.5Gbps.pdf

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