3(b). A specific testing code is written, letting the micro-SD

card keep radiating �10-dBm On-Off Keying (OOK) modulated

random data at a centre frequency of 2.48 GHz with a band-

width of 160 kHz.

During the measurement, the mobile phone is placed on a

turn table automatically driven by a computer. Another 2.4-GHz

patch antenna is placed 12 cm away from the micro-SD card,

serving as the receiving antenna. The received average power in

E and H plane are recorded at every 5� with the rotation of the

turn table, and the radiation pattern is shown in Figure 4. The

maximum received power is �59 dBm, which is much higher

than the averaged sensitivity of ordinary RF receivers ranging

from �90 to �100 dBm. The half power beam width is about

90� in the H plane and 60� in the E plane, respectively, which

also perfectly fits the MP usage.

To make sure the micro-SD card works in the full distance

range, the receiving power versus the distance r between the

receiving antenna and the micro-SD card is also measured, and

the result is shown in Figure 5. Notice that in this measurement,

the angle is fixed at the 0� in H plane. We see that with the dis-

tance r varying from 5 to 20 cm, the received power keeps

higher than �70 dBm. As aforementioned, to ensure the work-

ing distance to be limited in specific range, the transmitting

power of CC2500 can be tuned by its built-in power control

mechanism.

5. CONCLUSIONS

In short, exampled by a physical realization of an MP subsys-

tem, we proposed a design and testing approach for the imple-

mentation of micro-sized differential antennas for 2.4-GHz FFC

MP applications. A micro-sized 3 � 11 mm2-sized differential

antenna driven by a commercial 2.4-GHz transceiver is properly

designed and test, and successfully packaged into a 15 � 11

mm2-sized micro-SD card. The experimental measurements of

the SD card show that the micro-sized antenna works and fits

well with the MP application requirement. This work provides a

valuable reference for the RF subsystem design of an FFC MP

system.

ACKNOWLEDGMENTS

This work is sponsored by China Potevio Co. Ltd, and in part by

NSFC (Nos. 61071063 and 60701007), 863 Project (No.

2009AA01Z227) and NCET-07-0750.

REFERENCES

1. S. Karnouskos, Mobile payment: A journey through existing proce-

dures and standardization initiatives, IEEE Commun Surveys Tuts

6 (2004), 44–46.

2. D. Zhou, R.A. Abd-Alhameed, and P.S. Excell, Wideband balanced

folded dipole antenna for mobile handsets, 2nd European Confer-

ence on Antennas and Propagation, 2007, pp.1–5.

3. S. Cheng, P. Hallbjorner, A. Rydberg, D. Vanotterdijk, and P. van

Engen, T-matched dipole antenna integrated in electrically small

body-worn wireless sensor node, Microwaves Antennas Propag 5

(2009), 774–781.

4. X.Z. Qing, C.K. Goh, and Z.N. Chen, Impedance characterization

of RFID tag antennas and application in tag co-design, IEEE Trans

Microwave Theory Tech 5 (2009), 1268–1274.

5. R. Bourtoutian, C. Delaveaud, and S. Toutain, Differential shorted

dipole antenna for European UWB applications, 2nd European

Conference on Antennas and Propagation, 2007, pp.11–16.

6. K.D. Palmer and M.W.V. Rooyen, Simple broadband measure-

ments of balanced loads using a network analyzer, Instrum Meas 2

(2006), 266–272.

VC 2011 Wiley Periodicals, Inc.

CHIP DESIGN OF AN UWB AND HIGHGAIN ON-CHIP TRANSFORMERRECEIVER FRONT-END

Jhin-Fang Huang,1 Pei-Jiuan Shie,1 and Ron-Yi Liu21 Department of Electronic Engineering, National Taiwan Universityof Science and Technology, 43, Kee-lung Rd. Sec. 4, Taipei10672, Taiwan; Corresponding author: jfhuang@mail.ntust.edu.tw2Chung-Hwa Tele-communication Lab, Taiwan

Received 9 September 2010

ABSTRACT: An ultra-wideband receiver front-end operating in 3.1–8.0GHz frequency range is presented. The proposed front-end consists of

on-chip transformer low-noise amplifier, passive balun, double-balancedmixer, and is fabricated in a TSMC 0.18 lm CMOS process with 1.8 Vsupply voltage. Measured results show that maximum conversion gain of

30.32 dB, noise figure less than 5.9 dB, input return loss (S11) smallerthan �15.3 dB, input-referred third-order intercept point of �21.4 dBm,1 dB compression point (P1 dB) of �30 dBm over the whole frequency

range of interest are achieved. In addition, isolations of LO to RF andLO to IF are less than �57 dB and �27.8 dB, respectively, chip area

including pads is only 0.985 mm2 and power dissipation is 36.88 mW.The realized front-end achieves the smallest chip area and the bestmerit of figure compared with previously reported front-ends. VC 2011

Wiley Periodicals, Inc. Microwave Opt Technol Lett 53:1422–1427,

2011; View this article online at wileyonlinelibrary.com. DOI 10.1002/

mop.25956

Key words: front-end; UWB; ultra-wideband; LNA; low-noiseamplifier; double-balanced mixer

1. INTRODUCTION

In an ultra-wideband (UWB) communication receiver system,

less chip area for low cost is a key design goal for the front-

end. Recently, several UWB receiver front-ends have been

reported [1–9]. The UWB distributed RF front-end [2], which is

suitable for IF transceiver architectures, achieves wideband con-

version gain (CG), and good linearity. Nevertheless, it suffers

several disadvantages including large chip area and process vari-

eties. In the literature [7], the inductorless RF front-end achieved

less chip area and low noise figure (NF). However, its CG is not

good enough. Using the direct conversion architecture, the

receiver front-end chip integrates a single-ended output

Figure 5 The power distribution at different distance between the con-

troller antenna and the micro SD card

1422 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 DOI 10.1002/mop

wideband low-noise amplifier (LNA) and single-ended input

mixer [3–6]. They need no extra balun, but they suffer large

chip area, and higher power consumption.

The proposed LNA in this receiver front-end utilizes the

inverting stage with transformer feedback and a cascode circuit

with shunt peaking to lift the gain and achieve a wideband input

integrated matching to the antenna impedance as well as provide

a high and flat power gain.

Following the LNA, a CMOS Gilbert-cell double-balanced

circuit is used to mix down the wideband signal. According to

Friss equation [3], the MOS device size of the first stage can

reduce NF. Hence, to achieve impedance matching, noise reduc-

tion, and low-power dissipation at the same time, we select

appropriate device sizes by simulator ADS to optimize the per-

formance. The output load of the Gilbert-cell mixer composes

of cascode PMOS devices and mid-taped differential load resis-

tor, which uses a common mode feedback structure, takes the

advantage of excellent current reuse, and provides a well-defined

common mode voltage.

2. RECEIVER FRONT-END ARCHITECTURE

The dashed block, in Figure 1, is the proposed receiver front-

end integrating a wideband LNA, passive balun and Gilbert

mixer. The direct conversion is adopted to achieve low cost

design.

3. CIRCUIT DESIGN

3.1. LNA Design and Its Noise AnalysisThe LNA adopts a single-ended output configuration. The dou-

ble-balanced mixer uses a differential input configuration.

Clearly, the single-ended LNA needs differential output to ena-

ble a double-balanced input mixer. A passive balun is then

designed to meet this requirement.

Figure 2 shows the proposed on-chip transformer LNA which

consists of inverting technique with the splitting-load inductive

peaking technique for achieving high gain, low NF, and wide-

band input matching. The first stage of LNA is embedded with

a symmetric planar transformer for circuit feedback. The trans-

former layout is embedded in the gates of both MN and MP and

provides feedbacks to the drains of both MN and MP as shown

in Figure 2. The layout of the 1.2:1 transformer consists of pri-

mary and secondary windings as shown in Figure 3(a). The

diameters of outer and inner rings of the transformer are equal

to 120 lm and 60 lm and the metal width and spacing of the

transformer are 6 lm and 2 lm, respectively. The chip area of

transformer is 120 � 154 lm2. Figure 3(b) shows the model of

on-chip transformer. The feedback resistor, Rf, in Figure 2 is

properly adjusted to get better values of gain, NF, and input

impedance.

According to Friis equation [3], total NF is dominated by the

noise of the LNA first stage if its gain is high enough. From the

small signal noise equivalent circuit of the LNA first stage

shown in Figure 4 and the input- referred equivalent resistor RF

¼ Rf/(1 � AV), the total noise is the summation of all noise

components and is dominated by two voltage sources: Vn;Rsand

Vn;RFand two current sources: ing ¼

ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi4kTcgm

pand i2nd, where c

¼ 2/3 is the noise coefficient. The output NF of the LNA first

stage is defined as:

NF ¼ signal� to� noise power at input

signal� to� noise power at output

Si=Ni

So=No

¼ i2out;total

i2out;Rs

: (1)

From Kirchhoff law and the principle of superposition, the

output NF is, therefore, equal to the summation of the noise

sources: i2out;Rs, i2out;RF

, and i2out;indg,

Or NF ¼ 1þ i2out;RF

i2out;Rs

þ i2out;indg

i2out;Rs

; (2)

Figure 1 Block diagram of the direct conversion front-end

Figure 2 The proposed LNA circuit with a coupling output balun

Figure 3 Monolithic transformer: (a) physical layout and (b)

schematic

Figure 4 Small signal equivalent circuit of the LNA first stage shown

in Figure 2 for noise analysis

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 1423

where i2out;Rsand i2out;RF

are the output noises corresponding to Rs

and RF, respectively. In addition, i2out;indg is the summation of i2ndand the output noise from i2ng where i2nd and i2ng are the MOS

drain and gate noises, respectively.

After some mathematical procedures, the output NF of the

LNA first stage is expressed as:

NF ¼ 1þ Rs

RF

þ cgd0Rs

d x2C2gs

5cg2d0� 2jcj

ffiffiffiffiffid5c

sx2 Cgsqgd0v

(

þ ½1� x2LPCgsnð1� kÞ�2ð 1Rsþ 1

RFÞ2 þ x2q2

ðvÞ2) (3)

where gd0 is the drain-source conductance at zero VDS and

RF ¼ Rf

1�Av, nS

nP¼ VS

VP¼ IP

IS¼

ffiffiffiffiLSLP

q� 1, c ¼ i

�nd�ingffiffiffiffiffiffiffiffiffiffii2

nd�i2

ng

p ,

v ¼ gmp þ gmn � x2 gmp LPCgsn ð1� kÞ, Cgs ¼ Cgsp þ Cgsn, as

well as q ¼ Cgsp½1� x2 LPCgsn ð1� kÞ� þ Cgsn.

The detailed derivation procedures are given in Appendix.

Both of the numerical calculation NF of (3) and the post-

simulation NF are shown in Figure 5. They are in pretty good

agreement. The calculated NF from (3) is better than the postsi-

mulation NF as it omits the parasitic capacitances between

NMOS and PMOS transistor terminals. Obviously, a higher Rf

yields a better NF. A larger Rf can efficiently suppress the am-

plifier noise.

3.2. BalunIn RF integrated circuits, passive balun converts the LNA sin-

gle-ended output to the mixer differential input shown in Figure

6. The balun is a trifilar coil. The negative end of secondary

winding and the positive end of third one are connected together

as a common ground. That can eliminate the unbalance due to

potential difference, improve the phase error and obtain a differ-

ential output. The designed balun with outer diameter of 174

lm, inner diameter of 80 lm, metal width of 5 lm, and spacing

of 2 lm found in [2] has the merits of compact size, symmetri-

cal physical layout for balance amplitude and small phase error.

Its chip area is only 270 � 174 lm2.

3.3. MixerFigure 7 shows the proposed double-balanced Gilbert-cell mixer

which comprises input transconductance stage, switch, output

load, and output buffer. The current bleeding transistors, M1 and

M2, are used to reduce the required local oscillator (LO) over-

drive to completely switch the quad devices.

The LO signal input stages, M3, M4, M5, and M6 effectively

lift CG and enhance linearity. This also improves the voltage

headroom for the quad switches. The balun outputs are coupled

to the mixer input transistor gates of M7 and M8, whose source

terminals are directly connected to ground to produce lower

third-order nonlinearity than connected to a current source.

4. EXPERIMENTAL RESULTS AND DISCUSSION

The proposed receiver front-end is fabricated in TSMC 0.18-lmCMOS process. The simulation results are carried out with sim-

ulators of ADS and Spectre RF. In addition, performances of

circuits are also simulated after layout and parasitic extraction

by ADS and Momentum RF. The die micrograph is shown in

Figure 8 Chip micrograph of the proposed receiver front-end

Figure 5 NF versus feedback resistor Rf

Figure 6 A passive coupling balun: (a) physical layout; (b) schematic

Figure 7 The proposed Gilbert-cell mixer circuit

1424 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 DOI 10.1002/mop

Figure 8 and the chip area including pads only occupies 1.098

� 0.897 ¼ 0.985 mm2.

Figure 9 shows the circuit return loss in which the input and

output return losses are less than �15.3 dB and �13.3 dB,

respectively, over the entire frequency of 3.1–8 GHz. Figure 10

shows that the CG is greater than 26.53 dB and the DSB NF is

less than 5.7 dB, respectively, at IF frequency band from 0.01 to

0.264 GHz. Figure 11 shows both of CG and output power ver-

sus input power at the input signal frequency of 5.1 GHz. Note

that lower input power has higher CG. Figure 12 indicates the

measured 1 dB compression point (P1 dB). The measured input

Figure 9 Return loss versus frequency

Figure 10 CG and DSB NF at IF frequency range

Figure 11 CG and output power versus input power at input fre-

quency of 5.1 GHz

Figure 12 Measurement of P1 dB at input frequency of 5.1 GHz.

[Color figure can be viewed in the online issue, which is available at

wileyonlinelibrary.com]

Figure 13 Isolations of LO to RF and LO to IF

Figure 14 Comparison of CG versus FOM

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 1425

P1 dB is �30 dBm. Figure 13 shows both simulation and mea-

surement of circuit isolations. The isolation of LO to RF is less

than �57 dB and the isolation of LO to IF is less than �27.8

dB, respectively, over the whole frequency of interest.

The performance of the proposed receiver front-end is sum-

marized with in-band merit of figure (FOM) as follows [8]:

FOMreceiver ¼ Gainmax;dB � BW3dB;GHz

NFmin;dB � PDCðmWÞ � Aðmm2Þ: (4)

Figure 14 shows the comparison of CG versus FOM to other

recently published papers. It clearly shows that our results yield

the highest CG and best FOM comparing with other literatures.

The performance comparison of the proposed on-chip trans-

former UWB receiver front-end is summarized in Table 1. Obvi-

ously, our design obtains the best FOM with the lowest chip

area, the highest CG and the best input return loss (S11) as

attaining comparable performances in NF and linearity.

5. CONCLUSIONS

An UWB receiver front-end operating in 3.1–8.0 GHz frequency

range has been successfully implemented in a standard 0.18 lmCMOS process. This front-end uses a passive on-chip balun to

convert the single-ended output to differential input of mixer. In

addition, this front-end adopting on-chip transformer LNA with

splitting-load inductive peaking technique and feedback method

achieves highest CG, best FOM and input matching, smaller

chip area and comparable consuming power compared with

recently published front-end papers. Table 1 shows the compari-

son among several receiver front ends.

ACKNOWLEDGMENTS

The authors thank the staff of the CIC for the chip fabrication and

technical supports.

APPENDIX: DERIVATION OF LNA NOISE FIGURE

In this design, the noise in the first stage of LNA dominates the

NF value and only this stage is discussed thereby. From the

noise small signal equivalent circuit of the first stage of LNA

shown in Figure 4 and the input-referred equivalent resistor RF

¼ Rf/(1 � AV), the total noise comes from all of the frequency

components of the LNA noise. The noise of the LNA first stage

by two voltage sources: Vn;Rsand Vn;RF

and one current source,

ing ¼ffiffiffiffiffiffiffiffiffiffiffiffiffiffiffi4kTcgm

p, where c ¼ 2/3 is the noise coefficient. The out-

put noise per unit bandwidth is, therefore, equal to the summa-

tion of each noise. From Kirchhoff law and the principle of

superposition, i2out;Rs, i2out;RF

, and i2out;indg can be expressed as:

TABLE 1 Previously Published Receiver Front-End Paper Comparison

Reference Vdd (V) S11 (dB) CGmax (dB) BW (GHz) Pdc (mW) DSB NF (dB) Area (mm2) Process (lm) FOM

[1] 1.5 <�0 26.4 3.1–10.6 48 4.8–7.7 2.4 CMOS 0.13 0.358

[3] 1.5 <�10 22.3 3.1–10.6 46.5 5.7–9.6 1 CMOS 0.13 0.631

[4] 1.5 <�5 23.3 3.1–10.6 42 5.2–9.1 2.4 CMOS 0.13 0.333

[5] 1.5 <�10 21.5 3.1–8 31.89 4.3–6.2 1.16 TSMC 0.18 0.662

[6]a 1.5 <�8.27 23.5 3–5 21a 4.2 1.8 CMOS 0.13 0.296

This work 1.8 <�15.3 30.32 3.1–8 36.88 4.8–5.9 0.985 TSMC 0.18 0.855

a Without output buffers.

iout;Rs¼ 4jTDf ðgmn þ Gmp � x2 LPCgsngmpð1� kÞÞ2

Rs ð1� x2 LPCgsnð1� kÞÞ2 1Rsþ 1

RF

� �2

þx2ðCgspð1� x2 LPCgsnð1� kÞÞ þ CgsnÞ2� � (A1)

iout;RF¼ 4jTDf ðgmn þ Gmp � x2 LPCgsngmpð1� kÞÞ2

RF ð1� x2 LPCgsnð1� kÞÞ2 1Rsþ 1

RF

� �2

þx2ðCgspð1� x2 LPCgsnð1� kÞÞ þ CgsnÞ2� � (A2)

i2out;indg ¼ 4 j T Df cgd0 1� 2jcjffiffiffiffiffid5c

sx2 Cgs½Cgs � x2 LPCgspCgsnð1� kÞ�½gmp þ gmn � x2 gmpLPCgsnð1� kÞ�

gd0ð1� x2 LPCgsnð1� kÞÞ2 1Rsþ 1

RF

� �þ x2ðCgspð1� x2 LPCgsnð1� kÞÞ þ CgsnÞ2

8<:

þd x2 C2gs

5c g2d0

½gmp þ gmn � x2 gmp LPCgsnð1� kÞ�2

ð1� x2 LPCgsnð1� kÞÞ2 1Rsþ 1

RF

� �þ x2ðCgspð1� x2 LPCgsnð1� kÞÞ þ CgsnÞ2

9=; ðA3Þ

Substituting (A1)–(A3) into (1), yields the following noise factor:

NF ¼ 1þ Rs

RF

þ c gd0Rs

d x2 C2gs

5 c g2d0� 2jcj

ffiffiffiffiffid5c

sx2Cgsqgd0v

þð1� x2 LPCgsnð1� kÞÞ2 1

Rsþ 1

RF

� �2

þx2 q2

ðvÞ2

8><>:

9>=>; (A4)

1426 MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 DOI 10.1002/mop

REFERENCES

1. Multi-band OFDM physical layer proposal, In: IEEE, 802.15-03/

268r5, New York, NY, November, 2003.

2. G.G. Rabjohn, Monolithic microwave transformers, M.Eng. Thesis,

Carleton University, Ottawa, Canada, 1991.

3. T.-P. Liu and E. Westerwick, 5-GHz CMOS radio transceiver

front-end chipset, IEEE J Solid-State Circ 35 (2000).

4. B. Shi and M.Y.W. Chia, A CMOS receiver front-end for 3.1-10.6

GHz ultra-wideband radio, In: Proceedings of the 3rd European

Radar Conference, September, 2006.

5. B. Shi and M.Y.W. Chia, A 3-10-GHz 0.13-lm CMOS receiver

front-end for MB-OFDM ultra-wideband systems, In: IEEE, 2007.

6. R. Harjani and L. Cai, Inductorless design of wireless CMOS

front-ends, In: IEEE, New York, NY, 2007.

7. B. Shi and M.Y.W. Chia, An ultra-wideband CMOS receiver front-

end, In: Proceedings of the 3rd European Radar Conference, 2007.

8. M.-C. Hsu, RF CMOS front-end chip design for ultra-wideband

applications, Master Thesis, Department of Electronic Engineering,

National Taiwan University of Science and Technology, Taipei,

Taiwan, 2008.

9. Y.-A Shim, J. Lee, S.K. Han, and S.G. Lee, Low noise RF front-

end receiver for 3-5 GHz UWB, In: ICACT, February, 2008.

VC 2011 Wiley Periodicals, Inc.

NOVEL BAND-NOTCHED ULTRA-WIDEBAND ELLIPTICAL MONOPOLEANTENNA WITH DUAL RADIATINGELEMENTS

Bo-Ming Jeng and Ching-Hsing Luo

Department of Electrical Engineering, National Cheng KungUniversity, Tainan 701, Taiwan; Corresponding author:robin@ee.ncku.edu.tw

Received 16 August 2010

ABSTRACT: A novel ultra-wideband design of planar ellipticalmonopole antenna with dual radiating elements is presented. Theproposed antenna consists of two elliptical radiating elements and a

ground plane. The antenna has a super-wideband from 2.8 to 15 GHzfor voltage standing wave ratio less than 2, except the notched band at

4.8–5.9 GHz for filtering the wireless local area network signal. Basedon the contribution of the shorting position d to the notch bandwidth, a

particular notch-band range can be designed by adjusting the size of theminor elliptical radiating element. The radiation pattern of the proposedantenna in the yz-plane is omni-directional. VC 2011 Wiley Periodicals,

Inc. Microwave Opt Technol Lett 53:1427–1430, 2011; View this article

online at wileyonlinelibrary.com. DOI 10.1002/mop.26023

Key words: ultra-wideband antenna; band-notched; monopole antenna;

dual radiating elements

1. INTRODUCTION

Ultra-wideband (UWB, 3.1–10.6 GHz) antennas have attracted

attention for their use in high-speed wireless communication

systems in recent years. Several researches of UWB antennas

with various shapes have been presented [1, 2]. However, wire-

less local area network (WLAN) systems suffer from interfer-

ence form UWB signals, and so UWB antennas must not use a

frequency band that overlaps the WLAN operating band (5.15–

5.825 GHz). Many UWB antenna designs with a band-stop char-

acteristic have been presented. They include one that uses an

inverted U-shape slot in the patch [3], and one that is obtained by

cutting a pie-shaped slot in a circular patch [4]. This letter

presents a novel design of an antenna with a UWB operating

bandwidth and a band-notched frequency band at 5 GHz. This

proposed UWB planar monopole antenna is nonresponsive in the

frequency band. Frequency band-notched is easily achieved by

adjusting the size of the minor elliptical radiating element; de-

structive interference can take place, causing the antenna to be

nonresponsive at that frequency. Details of the proposed antenna,

and results obtained using a constructed prototype are presented.

2. ANTENNA DESIGN AND EXPERIMENTAL RESULTS

Figure 1 shows the geometry of the proposed antenna. The

major elliptical radiating element is etched on a 0.8 mm-thick

FR4 microwave substrate with a relative permittivity of 4.4. A

50X microstrip-fed line is printed on the same side. The back-

side of the substrate has a minor elliptical radiating element and

a ground plane. The area of the ground on the backside is 10.9

� 30 mm2; it has a concave slot with dimensions 5 � 0.75

Figure 1 Geometry of the proposed antenna

DOI 10.1002/mop MICROWAVE AND OPTICAL TECHNOLOGY LETTERS / Vol. 53, No. 6, June 2011 1427