logic design - chapter 7: sequential circuit analysis and design
DESCRIPTION
- CLASSIFICATION OF COUNTERS. - RIPPLE COUNTERS (ASYNCHRONOUS COUNTERS). - 3-bit Asynchronous Binary counter. - COUNT SEQUENCE . - DOWN COUNTERS. - DESIGN OF DIVIDE – BY – N COUNTERS. - BCD RIPPLE (DECADE) COUNTER. - SYNCHRONOUS COUNTERS. - SYNCHRONOUS BINARY DOWN-COUNTER. - UP/DOWN SYNCHRONOUS COUNTERS.TRANSCRIPT
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Chapter 7
Sequential Circuit Analysis and Design
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Characteristic ( Function ) tables of the four types of flip-flops
design
analysis
(Q(t),Q (t+1)) S-R
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excitation table of SR flip – flop
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excitation tables of all types of flip-flops
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BASIC DEFINITIONS OF SEQUENTIAL CIRCUITS Sequential circuit
Any digital circuit with memory due to feedback, particularly a circuit with latches or flip-flops is a sequential circuit
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Moore Circuits In a Moore circuit, the outputs are function of the
present state only, i.e.; function of flip-flops outputs
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Mealy Circuits In a Mealy circuit, the output is a function of both
the present state and the external inputs
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Counters A counter is a sequential circuit that goes
through a prespecified sequence of states upon the application of input pulses
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State Diagram The sequence of states of a sequential circuit,
along with the external input and the output of the circuit, can be represented graphically using a state diagram
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ANALYSIS OF A SEQUENTIAL CIRCUIT
get the flip-flops input functions: RA =B’ x , SA = BX’ , RB = AX’ , SB = A’ x , also get the output function)s( : Y = A’ x
BB
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ANALYSIS OF A SEQUENTIAL CIRCUIT
:
RA =B’ x , SA = BX’ , RB = AX’ , SB = A’ x , Y=A’x Make the state table of the circuit as follows
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ANALYSIS OF A SEQUENTIAL CIRCUIT Draw the state diagram for the circuit
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Analysis of synchronous counters Starting at QC QB QA = 000, what sequence does
the synchronous circuit of three D flip-flops shown in figure)53( step through ?
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Step1: FF input (excitation) functions DA = Q’A DB = QC QA + QB Q’A + QB Q’C = QA Q’C + Q’A QC +
Q’A QB + QB Q’C DC = QB )QA QC ( = QA Q’C QB + Q’A QC QB
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STEP2: State table DA = Q’A DB = QC QA + QB Q’A + QB Q’C DC = QA Q’C QB + Q’A QC QB
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The resulting sequence of states
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STEP 3: State diagram
Self starting
Self correcting
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DESIGN OF SEQUENTIAL CIRCUITS Design a clocked sequential circuit with
the given state diagram. Use JK flip-flops.
0
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Excitation table 0
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Karnaugh map
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Logic diagram
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Design with unused states Design a sequential circuit to satisfy the state
diagram shown in figure)57(. Use SR flip-flops. Treat the unused states as do not care conditions.
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Excitation table :
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Karnaugh map
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Karnaugh map
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Logic diagram
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Effect Of The Unused States Analyze the sequential circuit obtained and
determine the effect of the unused states The unused states are : 000 , 110 , 111. We can
solve this problem like any analysis problem Flip-flops input functions
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Draw the state table of the unused states
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State diagram
The circuit is self- starting and self-correcting.
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Design of counters Design a counter with the following binary
sequence and repeat ( 0,1,2, 4,5,6 ). Use J K flip flops.
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Excitation table :
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JA=B KA = B
JB = C JC = B‘
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Effect of the two unused states :
State table
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State diagram of the counter