01/13/2012LG, XS, MS

Test Results from the VHDCI connectors and commercial SCSI cable for the PXL data path

The original data path testing for the PXL RDO system was performed with custom high quality cable for the MTB to RDO board connection utilizing SAMTEC TOLC and SOLC high density connectors (http://www.samtec.com/ProductInformation/TechnicalSpecifications/Overview.aspx?series=TOLC). This testing was optimized to allow us to test multiple lengths of the fine 42 AWG wire used to connect the MTB boards to the ladders. A full report including the original test setup and results may be found here http://rnc.lbl.gov/hft/hardware/docs/LVDS/LVDS_test_report_1.pdf . As the design of the PXL RDO system has matured and we have been optimizing the existing prototyped design for production and other concerns, we have connector/cable choices that we would like to integrate into the design. Specifically, we would like to use the cables and connectors used in the VHDCI SCSI standards (connector example http://www.molex.com/webdocs/datasheets/pdf/en-us/0743370011_IO_CONNECTORS.pdf). In block diagram form, the existing design, validated in the LVDS data path testing is shown in Figure 1

Figure 1 PXL RDO design block diagram as prototyped. We have updated the cables and connectors used between the MTB and the RDO board. This area is circled in red.

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The new design primarily focuses on using the VHDCI connector standard and adding a bulkhead feed-through in-line with the cables. We also test the feasibility of using standard VHDCI SCSI-5 differential cabling for the MTB to RDO board cabling. These VHDCI connectors and cables have many attractive features that make their use highly desirable in the PXL system including high density, rugged card edge mounting and the availability of low cost commercial cabling in custom lengths.

New test systemTo perform this testing with the new V-6 based RDO motherboard, we have fabricated PCBs to allow for the testing in the system shown in Figure 2.

Figure 2 Testing block diagram. We have tested the above system. Note that a bulkhead feedthrough is included in this arrangement. The length of the cable between the ladder mockup and the feedthrough is 2 meters. The cable length connection between the feedthrough and the V-6 based motherboard was tested with multiple length cables

We have fabricated a PCB that will mock up a feed-through connection with 2 female VHDCI connectors. The mock ladder board shown consists of ten LVDS 1-4 fan-out chips to emulate sensor outputs and buffers for all signals to and from the mock ladder. The only difference between the two mock ladders is the interface connector. This arrangement also allows us to test the data paths on the new V-6 based motherboard simultaneously. As it is desired to be able to move the RDO crate further from the feedthrough to allow more options in placement of the RDO crate, we have tested different lengths of cable between the feedthrough and the motherboard.

In the initial design of the motherboard, we were planning on using Phase-1 based sensors in the prototype detector so reading out 40 LVDS data paths at 160 MHz from the ladder was a requirement. As we have decided to use Ultimate sensors in the prototype detector, the requirement is now for 20 LVDS data paths (2 per sensor). The capability of reading out 40 LVDS data paths remains part of the V-6 based motherboard design, but we have performed the VHDCI BER testing using only one of the VHDCI inputs to the motherboard per ladder.

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The schematics for the new testing boards may be found at http://rnc.lbl.gov/hft/hardware/docs/LVDS/VHDCI_test_schematics.pdf

TestingIn this testing, we are interested in assessing the cable/connector and cable length for the data path between the RDO boards and MTB with LVDS pseudo-random data. The data path between the MTB and the ladders was characterized by the previous testing and is not a part of this effort. It is assumed that BER performance in this set of tests in a direct comparison between the proposed new cables and the existing and tested cable design (3M type 3644 with SAMTEC connectors) is sufficient to validate a cable/connector configuration for the MTB to RDO board connection. We have performed the testing in a similar manner to what was done in the original LVDS data path test by generating 3 pseudo-random data paths to the mock ladder board. The mock ladder board contains 10 LVDS 1-4 fan-out chips that return a total of 40 copies of the 3 pseudo-random data streams, of which we use 20 located on the first VHDCI connector. The results are shown below:

Testing hardware:

Figure 3 V-6 based motherboard with VHDCI connection to mock ladder

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Figure 4 Bulkhead feedthrough PCB

Figure 5 Mock ladder consisting of 1 → 4 LVDS fanouts and drivers.

We tested commercially available VHDCI SCSI cables from cablestogo.com .

ResultsThe data testing was performed with long runs from December 9, 2011 and January 3, 2012. The iodelay setting was performed manually by finding the range of iodelay settings for which the data gave no errors and setting the tested iodelay setting to the middle of the iodelay valid window. The iodelay step was 75 ps. The results of these runs are shown in the table below.

Cable lengthLadder →feedthrough

Cable lengthFeedthrough → V-6 MB

Clock speed

Bits transferred errors

2 m 6 m 160 MHz 1.04 × 10^15 0

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2 m 8 m 160 MHz 5.74 × 10^14 02 m 8 m 160 MHz 1.88 × 10^15 02 m 8 m 160 MHz 3.04 × 10^15 02 m 8 m 200 MHz 1.65 × 10^15 0

In addition to the BER testing, we used a heat gun to measure the temperature elevation in the driver chips (FIN1108) and LVDS 1→4 fan out chips (SN65LVDS104) needed before errors were observed. The steady-state operating temperature during the test of the PCBs and chips was 30.0 C. All tests were performed at an operating frequency of 200 MHz and a cable length of 2 m + 8 m

Chip Temp (C) at error onset ΔTSN65LVDS104 55.0 25FIN1108 60.0 30

We will be running our iodelay settings when the system is operating at it’s steady state operating temperature. This suggests the thermal overhead before we should get thermally induced errors should be as listed in the table above.

Based on this testing we believe that the current system can support the use of commercial VHDCI cabling that meets the SCSI specifications for lengths of up to 8 m from the patch panel to the RDO crates with an adequate safety margin.

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