km3x 256 based three-phase power meter hardware design ... · introduction km3x_256 based...

© 2015 Freescale Semiconductor, Inc. All rights reserved.

KM3x_256 Based Three-Phase Power Meter

Hardware Design Reference Manual

1 Introduction

The Freescale three-phase power meter reference design

is designed according to the China State Grid

Corporation standard Q/GDW354-2012 Functional

Specification for Smart Electricity Meters and standard

Q/GDW 356-2012 Type Specification for Smart

Polyphase Electricity Meters.

The reference design aims to reduce the time to market

for power meter customers and partners, and tailor the

design to the user’s unique needs in their powering

system.

Freescale Semiconductor, Inc. Document Number: DRM164

Design Reference Manual Rev. 1 , 09/2015

Contents

1 Introduction 1 2 Demo board content 4 3 Demo board hardware features 5 4 Three-phase power meter demo board 6

4.1. System power ....................................................... 6 4.2 Clock ................................................................... 7 4.3 Debug interface .......................................................... 7 4.4. Voltage sampling and frequency measuring ........... 8 4.5. Current sampling .................................................. 9 4.6. External memory ................................................ 10 4.7. Tamper protection ............................................... 11 4.8. Pulse output ........................................................ 13 4.9. RS485 interface .................................................. 13 4.10. LCD display and backlight .................................. 14 4.11. Jumper table ....................................................... 15

5. Summary 16 6. References 16 7. Revision history 16

Introduction

KM3x_256 Based Three-Phase Power Meter Hardware Design Reference Manual, Rev. 1, 09/2015

2 Freescale Semiconductor, Inc.

The three-phase power meter reference design uses the Freescale ARM®Cortex

®-M0+ core 144-PIN

LQFP KM34Z256 SoC to realize all the metering and application functions.

Figure 1. KM34Z256 block diagram

Introduction


Freescale Semiconductor, Inc. 3

The hardware design consists of the power board and the main board. The following figure shows the

system diagram:

Figure 2. System block diagram

Demo board content



2 Demo board content

The following figure shows the demo board:

Figure 3. Power meter demo

Demo board hardware features



The following figure shows the hardware connection method:

Figure 4. Power meter demo without casing

3 Demo board hardware features

The Freescale three-phase power meter includes the following hardware features:

• An ARM Cortex-M0+ core MKM34Z256VLQ7, a 144 LQFP, 75 MHz, 256 KB flash memory,

and a 32 KB SRAM.

• 3 x 220/380 V voltage inputs generate two isolated 5 V DC outputs; one is for the system while

the other one is for 485 communications.

• Current sampling: a 0.05 % accuracy CT, a 25 ppm shunt, and a 24-bit SD ADC.

• Voltage sampling: a 25 ppm resistor divider, and a 16-bit SAR ADC.

Three-phase power meter demo board



• A KM34 internal ACMP module for zero cross point detection.

• 5 ppm accuracy RTC is achieved using an external 0.5 ˚C resolution temperature sensor, an

external 32.768 kHz crystal and an internal RTC module.

• One isolated RS485 output in half-duplex mode, with an ISL3152EIBZ.

• An infrared circuit with an AT205B as a transmitter and a TSOP4838 as receiver.

• An external 512 KB I2C EEPROM 24LC512 and 64 MB SPI flash MX25L6406EM2I-12G

provide the memory extension.

• 3 x isolated electrical pulse output, 3 x light pulse output for meter calibration/indication/test.

• Tamper protection: A tamper input pin detects box opening and an I2C based magnetic sensor

detects activity.

• Display: JIYA eight 32-segment LCD display modules with backlight control.

4 Three-phase power meter demo board

4.1. System power

The demo board is powered by 220 V AC. The power board transfers the grid AC voltage into two

isolated linear 5 V DC outputs. One 5 V DC output for powering the MCU system while the other one is

for isolated RS485 communication.

In power line off mode, the system has a 6 V lithium battery as backup power. One 3.6 V battery powers

the RTC, this battery must not be changed in the meter’s lifespan.

As the MCU system has a 3.3 V DC input, it needs an LDO to transfer the 5 V input to 3.3 V output in

the system. The LDO must have low quiescent current and low noise.

The following 2 figures illustrate the DC/DC and battery supply circuit.

The KM3x based metering system uses an internal ADC voltage reference; however to achieve higher

accuracy the meter must have an external high accuracy voltage reference. See Figure 6.

CURRENT MEASURING

GND

TP2

SYSTEM GND INPUT PAD

SYSTEM 5V VOLTAGE INPUT PAD

GND

C100.01uF

GND

+C1220uF10V

D1

BAT760

A C

GND

U1

SPX3819M5-L-3-3

EN3

VIN1

GND2

BYP4

VOUT5

GNDGND

GND

3V3_POWER

GND GND

J3

HDR 1X2 TH

12

GND

BT2

12

6V BATTERY 3V3D_MCU

3V3A_MCU

D4

1N4001

A CD3

1N4001

A C

GND

LDO Power Supply

GND

C210UF

C1110UF

C510UF

C610UF

C710UF

C810UF

C40.1 UF

C90.1 UF

C30.1 UF

C120.1 UF

F1

TRF06-035V06-TF

1 2

L1 10uH1 2

TP1

L2 10uH1 2

J1

HDR_1X1

1GND

6V BAT

+5V_MCU

Figure 5. DC power supply




ADR3412ARJZ-R2

U2

GN

D_F

OR

CE

1

GN

D_S

EN

SE

2

ENABLE3

VIN

4

VOUT_SENSE5

VOUT_FORCE6

C181uF

C150.1 UF

C160.1 UF

3V3A_MCUVREF

J4

HDR 1X2 TH

12

C130.1 UF

C141uF

External VREF Supply

1V2

GND GND GND

GND

Figure 6. External VREF supply option

4.2 Clock

The KM34 system has an external Citizen +/-20 ppm 32.768 kHz crystal. RTC clock generation is also

performed by the crystal, that requires a high consistency of performance level.

GND GND

RTC Crystal

C6918pFDNP

C6818pFDNP

GND

XTAL32K {3} EXTAL32K{3}

Y1

32.768kHz

12

TP28

Figure 7. Oscillator circuit

4.3 Debug interface

The KM34 system uses a SWD debug port, J-Link and Multilink tools can be used for code developing

and debugging.




The software uses the IAR tool chain (version 7.3 or higher), which can be configured to use the

selective hardware debugger.

SW2

EVQ-PE105K

1 2

3V3D_KM

3V3D_KM

R1144.7K

C780.1 UF

R115820

C710.1 UF

J6

HDR 2X5

1 23 4

657 89 10

SWD Debug

GNDGND

GND

/RESET{3}

SWD_CLK{3}SWD_DIO{3}

Figure 8. KM debug port

4.4. Voltage sampling and frequency measuring

The power line voltage sampling is done by a 16-bit SAR ADC. 220 V AC is transformed to

approximately 0.17 V AC by a resistor divider. The circuit adds a 0.6 V DC offset to this AC signal then

sends it to the SAR ADC for sampling.

The 0.6 V DC offset is generated by the KM34 internal 1.2 V VREF output and external amplifier

divider circuit by default.

There is an option to use an external 1.2 V VREF for the system. This requires a software switch

configuration.




The following figure shows the voltage sampling circuit:

R471K

DNP

GND

R241K

R381K

R11220K

DNPR14

220K

DNP

R26220K

DNPR29

220K

DNP

R40220K

DNPR44

220K

DNP

VBIAS

R20100K

DNP

VBIAS

VBIAS

R12100K

DNPR15

100K

DNP

R16

100K

DNP

R30

100K

DNP

R31

100K

DNPR35

100K

DNP

R27

100K

DNP

R41

100K

DNP

R48

100K

DNP

R46

100K

DNP

R45

100K

DNP

GNDGND

GND

D6

BAV99LT1

1

3

2

C430.01uF

TP7

DNP

R13

47.0

3V3A_KMTP5

DNP

TP6

DNP

PH_A_Before_Divider

TP4

DNP

GND

PH_A_After_Divider

Voltage Sampling

ADC0_SE0{3}

GNDGND GND

D7

BAV99LT1

1

3

2

C470.01uF

TP15

DNP

R28

47.0

TP11

DNP

3V3A_KM

TP14

DNP

TP10

DNP

PH_B_Before_Divider

PH_B_After_Divider

GND

ADC0_SE1{3}

GND GNDGND

D8

BAV99LT1

1

3

2

TP20

DNPC510.01uF

R42

47.0

3V3A_KMTP17

DNP

TP21

DNP

PH_C_Before_Divider

TP16

DNP

GND

PH_C_After_Divider

ADC0_SE2{3}

R101K

R171K

DNP

GND

R321KDNP

GND

Figure 9. Voltage sampling circuit

4.5. Current sampling

Current sampling is performed by an AFE 24-bit ΣΔ ADC module. The load current passes through the

primary side of the CT (with 5/100 A current, 0.05% accuracy, and 2500 ratio). The secondary side

current flows through the 3.9 R shunt resistor to generate a differential voltage to the ΣΔ ADC.

For some pads the voltage sampling function is multiplexed with the ACMP input, which means the

frequency can be monitored by an ACMP module while the ADC module is sampling the voltage. The

ACMP module has two inputs, the first input is the AC voltage after resistor divider and adding the

offset. The second input is the ACMP input that is 0.6 V offset.




The following figure illustrates the current sampling circuit:

IA_IN-

IA_IN+

INPUT C CURRENT +

INPUT C CURRENT -

INPUT A CURRENT -

INPUT B CURRENT +

INPUT B CURRENT -

INPUT A CURRENT +

IB_IN-

IB_IN+

IC_IN+

IC_IN-

Current Sampling

R822

C490.047UF

C480.047UF

C460.047UF

C450.047UF

C440.047UF

C420.047UF

TP3DNP

TP8DNP

TP9DNP

TP12DNP

TP13DNP

TP18DNP

R94.7

R184.7

R224.7

R234.7

R344.7

R364.7

R434.7

R494.7

R1922

R2122

R2522

R3322

R3722

INPUT N CURRENT -

INPUT N CURRENT + IN_IN+

IN_IN-

C520.047UF

C500.047UF

TP19DNP

TP22DNP

R3922

R5022

J5

HDR_1X1

DNP

1

GND GND

GND GND

GND GND

GND GND

AFE_SDADP0{3}

AFE_SDADM0{3}

AFE_SDADM1{3}

AFE_SDADP1{3}

AFE_SDADM2{3}

AFE_SDADP2{3}

AFE_SDADM3{3}

AFE_SDADP3{3}

GND

Figure 10. Current sampling circuit

4.6. External memory

The system uses a 512 KB EEPROM (as shown in Figure 12) which is based on an I2C port and 64 MB

SPI flash memory (as shown in Figure 11) for memory extension.

The choice of memory type and memory size are application-dependent. This memory is reserved for

customer application usage. Only low-level read/write logic is implemented in the software.




R12010.0K

R12410.0K

R12310.0K

R15910.0K

DNP

3V3D_KM

SPI1_PCS0 {3}

SPI1_SCK{3}

SPI1_MISO {3}

SPI1_MOSI{3}

GND GND

R1521K

R1531K

R1541KR1551K

3V3D_KM

64Mb SPI Flash

C820.1 UF

C811uF

U9

MX25L6406EM2I-12G

CS1

SO/SIO12

WP3

GND4

SI/SIO05

HOLD7

SCLK6

VCC8

3V3D_KM

Figure 11. External SPI based flash

U10

24LC512

A01

A12

A23

SCL6

SDA5

VCC8

VSS4

WP7

3V3D_KM

C900.1 UF

512Kb EEPROM

C871uF

I2C Slave Address 0x00

I2C1_SCL {3,5}

GND GND

I2C1_SDA{3,5}

Figure 12. External I2C based EEPROM

4.7. Tamper protection

Tamper protection has three features. The tamper detection pin monitors whether the casing is open. The

magnetic sensor detects activity.

In voltage missing mode the system enters into low-power mode, periodically sampling the current to

prevent tampering.




The following figure shows the tamper detection circuit:

R116

10.0K

R113

10.0K

C700.1 UF

C720.1 UF

3V3D_KM

SW1

D2F-01FL

13

2

Tamper Detection

GNDGND

GND

TAMPER0 {3}

Figure 13. Tamper input circuit

PTB4{3}

C770.1 UF

C760.1 UF

C750.1 UF

C740.1 UF

I2C Slave Address 0x0E

C731uF

U8

MAG3110

CAP_A1

VD

D2

NC3

CAP_R4

GN

D1

5

SDA6SCL7V

DD

IO8

INT19

GN

D2

10

3V3D_KM

Maganetic Field Tamper Detection

GND GND GND GND GND GND

I2C1_SCL{3,5}I2C1_SDA{3,5}

Figure 14. Magnetic Sensor




4.8. Pulse output

The power meter has an isolated electrical output and a light pulse output for accuracy testing and

calibration, RTC testing and calibration and status indication.

Pulse Output

Q1BC817-40LT1G2

3

1

D9

LED REDA

C

Q2BC817-40LT1G2

3

1

D10

LED RED

AC

D11

MV5353

AC

Q3BC817-40LT1G2

3

1

kWh_LED

PTB2 {3}

kVArh_LED MFUNC_LED

PTB3 {3} PTC3 {3}

C540.1 UF

C550.1 UF

R54 330 R55 330 R56 330

R76 10.0K R78 10.0K R79 10.0K

C530.1 UF

GND GND

GNDGND

3V3D_KM

GND

GND

3V3D_KM 3V3D_KM

R100470

R104470

R108470

R1090

R1050

U5

PS2501-1

1

2 3

4

U6

PS2501-1

1

2 3

4

U7

PS2501-1

1

2 3

4

R1010

C600.1 UF

DNPDGND

C640.1 UF

DNP

C670.1 UF

DNP

TP23

DNP

TP25

DNP

TP24

DNP

TP26

DNPTP27

DNP

C560.1 UF C58

0.1 UF

WAR+_KL

C590.1 UF

C620.1 UF

VAR+_KL

C630.1 UF

C660.1 UF

MFUN+_KL

3V3D_KM

C650.1 UF

WAR-_KL

3V3D_KM

VAR-_KL

R83

47.0K

3V3D_KM

OUTPUT PORT 19

MFUN-_KL

OUTPUT PORT 22

OUTPUT PORT 20

OUTPUT PORT 21

OUTPUT PORT 23

R87

47.0K

GND

GND

R84

47.0K

GND

PTD3 {3}

PTD2 {3}

PTF0 {3}

C5710UF

Figure 15. Pulse output circui

4.9. RS485 interface

The power meter system has one isolated RS485 port. This port is in half-duplex mode and has multiple

purposes, for instance meter calibration and for billing purposes.




C1061uF

DGNDR1371.0K

R1401.0K

R1451.0K

R1380

R1430

R1460

TVS4

DNP

12

C1070.1 UF

DNP

C1021uF

R139330

R142330

R144330

TVS5

SA12CA

12

RS485 Communication

D

R

U14

ISL3152EIBZ

VCC8

DI4

RE2

RO1

GND5

B/Z7

DE3

A/Y6

GND_RS485

RS485_5V

R141120DNP

t

RT2

30 OHM

TP39

DNP

OUTPUT PORT 27 A2

TP37

DNP

OUTPUT PORT 28 B2

3V3D_KM

C104100PF

C110100PF

U15

PS2501-1

1

2 3

4

U12

PS2501-1

1

23

4

U16

PS2501-1

1

2 3

4

3V3D_KMRS485_5V

GND_RS485

RS485_5V

3V3D_KM

GND_RS485

RS485_5VC1050.1 UF

GND

GND

GNDGND

+ C98100uF

C970.1 UF

RS485_5V

GND_RS485

TP33

DNP

TP34

DNPRS485 GND INPUT PAD

RS485 5V INPUT PAD

PTE0 {3}

UART0_TX {3}

UART0_RX {3}

GND

Figure 16. Isolated RS485 circuit

4.10. LCD display and backlight

The power meter system has the Chinese standard eight 32-segment LCD modules which display all of

the metering information.

The LCD module has two 15 mA diodes as backlights. The system can switch these on or off according

to the application.




LCD_P5{3}LCD_P3{3}

LCD_P7{3}LCD_P52{3}

LCD_P9{3}

LCD_P13{3}LCD_P11{3}

LCD_P15{3}



LCD_P58{3}


LCD_P25{3}


LCD_P50{3}LCD_P50_R

LCD_P27_RLCD_P31_R

LCD_P23_RLCD_P25_R

LCD_P58_RLCD_P44_R

LCD_P21_RLCD_P56_R

LCD_P17_RLCD_P19_R

LCD_P13_RLCD_P15_R

LCD_P9_RLCD_P11_R

LCD_P52_RLCD_P7_R

LCD_P3_RLCD_P5_R

LCD_P2_R

Segment LCD & Backlight

C11210UF

C114 100PFLCD_P29_R

C115 100PFLCD_P28_R

C116 100PFLCD_P26_R

C117 100PFLCD_P24_R

C118 100PF

LCD_P59_R

LCD_P45_R

C120 100PF

C119 100PF

LCD_P57_R

C121 100PFLCD_P22_R

C122 100PFLCD_P55_R

C123 100PFLCD_P54_R

GND

C124 100PF

C125 100PFLCD_P18_R

LCD_P20_R

C126 100PF

LCD_P14_R

LCD_P16_R

C127 100PF

LCD_P10_R

LCD_P12_R

C129 100PF

C128 100PF

LCD_P8_R

C131 100PF

C130 100PF

LCD_P53_R

C132 100PF

LCD_P4_R

LCD_P6_R

C133 100PF

GND

TVS3

LXES15AAA1-117DNP

12

Q4BC817-40LT1G23

1PTB1 {3}

R106

4.7K

R10368

Control current=(5-3)V/68R=30mA

R1020

D12

C02W9652NG-P14.5A1

K1A2

K2

GND

R107

47.0K

GND

C134 100PFLCD_P2_R

C135 100PF

LCD_P5_R

LCD_P3_R

C137 100PF

C136 100PF

LCD_P52_R

C138 100PF

LCD_P11_R

LCD_P9_R

LCD_P7_R

C140 100PF

C139 100PF

C141 100PF

LCD_P15_R

LCD_P13_R

C142 100PF

C143 100PFLCD_P17_R

GND

C144 100PF

LCD_P21_R

LCD_P19_R

C146 100PF

C145 100PF

LCD_P58_R

LCD_P56_R

C147 100PF

LCD_P23_R

LCD_P44_R

C149 100PF

C148 100PF

LCD_P25_R

C150 100PFLCD_P27_R

C151 100PF

LCD_P50_R

LCD_P31_R

C153 100PF

C152 100PF

GND

LCD_P29_R

R59 10.0KR57 10.0K

R62 10.0KR52 10.0K

R66 10.0KR64 10.0K

R68 10.0KR70 10.0KR72 10.0KR74 10.0KR80 10.0KR81 10.0K

R90 10.0KR88 10.0KR85 10.0K

TP44

R92 10.0K

BACKLIGHT 5V VOLTAGE INPUT PAD

R98 10.0KR96 10.0KR94 10.0K

R51 10.0K

TP45

R58 10.0KR60 10.0KR61 10.0KR63 10.0K

R67 10.0KR65 10.0K

R71 10.0KR69 10.0K

R73 10.0KR75 10.0KR77 10.0KR82 10.0K

R89 10.0KR86 10.0K

R93 10.0KR91 10.0K

R99 10.0KR97 10.0K

R53 10.0K

R95 10.0K

GND

DS1

JY09397F

SEG11

SEG22

SEG33

SEG44

SEG55

SEG66

SEG77

SEG88

SEG99

SEG1010

SEG1111

SEG1212

SEG1313

SEG1414

SEG1515

SEG1616

SEG1717

SEG1818

SEG1919

SEG2020

COM840

COM739

COM638

COM537

COM436

COM335

COM234

COM133

SEG3232

SEG3131

SEG3030

SEG2929

SEG2828

SEG2727

SEG2626

SEG2525

SEG2424

SEG2323

SEG2222

SEG2121

LCD_P29 {3}

LCD_P2{3}

LCD_P26 {3}LCD_P28 {3}

LCD_P24 {3}

LCD_P59 {3}LCD_P45 {3}

LCD_P57 {3}

LCD_P22 {3}

+5V_BL

LCD_P55 {3}

LCD_P54 {3}

LCD_P20 {3}

LCD_P18 {3}

LCD_P16 {3}

LCD_P14 {3}

LCD_P12 {3}

LCD_P10 {3}

LCD_P8 {3}

LCD_P6 {3}LCD_P53 {3}

LCD_P4 {3}

LCD_P24_RLCD_P26_RLCD_P28_R

LCD_P22_RLCD_P57_RLCD_P59_RLCD_P45_R




Figure 17. LCD display

4.11. Jumper table

Table 1. System jumper table option

Jumper Option Setting Description

J3 System 3.3V power supply 1-2 System power supply on

J4 External VREF power supply off Internal VREF is used by default

Revision history



5. Summary

This document describes the hardware design features of the three-phase power meter demo boards. For

technical details about the board design and solution implementation see the Kinetis M Series MCUs

documentation section of freescale.com.

6. References

1. Kinetis Series MCUs Taxonomy Page

(http://www.freescale.com/webapp/sps/site/taxonomy.jsp?code=KINETIS_M_SERIES&cof=0&a

m=0)

2. Kinetis Series MCUs Product Summary Page (http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KM3x)

7. Revision history Table 2. Revision history

Revision number Date Substantial changes

Rev.0 06/2015 Initial release

Rev.1 09/2015 Modifications to Figure 7, Figure 11, Figure 17, and Table 1

http://www.freescale.com/webapp/sps/site/taxonomy.jsp?code=KINETIS_M_SERIES&cof=0&am=0



http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=KM3x

Document Number: DRM164

Rev. 1 09/2015

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