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Instrumentation-on-chipBasic considerations

Giorgio FerrariDipartimento di elettronica, informazione e bioingegneria

Politecnico di Milano

Milano, November 24 2016

Electrical characterisation of nanoscale samples & biochemical interfaces: methods and electronic instrumentation

Instrumentation-on-chip - G. Ferrari2

OUTLOOK of the LESSON

Motivations for instrumentation based on CMOS integrated circuits Examples How to reduce 1/f noise How to design high value resistances

2


Standard experimental setup

CcableCampCDUT

+

Vbias

Nano/micro sample

Heavy (kg)Bulky (dm3)

Expensive (k€)Multchannel capability is limited

no portability

Long cables

e.m. interference Large capacitancecoax.cable: 80pF/m

Higher noise


Improving the Signal-to-Noise Ratio

100 1k 10k 100k 1M1f

10f

100f

1p

Cur

ren

t no

ise

[A/s

qrt

(Hz)

]

Frequency [Hz]

222ampcableDUTn CCCe

CDUT

+Vbias

CMOS preamplifier

3


e.m. interferences

+

Vbias

Nano/micro sample

Power supply:• 50Hz• 50kHz-10MHz

Other experiments

Loop antenna

Ideal solution:• shielding without increasing the capacitance• shorter cables


Reducing the e.m. interferences

+

Vbias

Nano/micro sample

Power supply:• 50Hz• 50kHz-10MHz

Other experiments

Loop antenna

• Faraday cage to shield the smallest signals• Shielded cables for the amplified signals

4


Instrument-on-a-chip

• Portable systems: weight: g, size: mm, power: mWor wearable:

C RAC

sample

Instrument on a chip

IntegratorDouble Lock-In amp.& ADC

Poten-tiostat

amp. + processing (analog and/or digital)

Google glass



C RAC

sample



Poten-tiostat


• Portable systems: weight: g, size: mm, power: mWor implantable

Fully implantable wireless neural recording microsystem (not drawn to scale).

X. Zou et al. IEEE Trans. Circuits Syst. I Regul. Pap., pp. 2584–2596, 2013.

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• Portable systems: weight: g, size: mm, power: mW

… wearable…

… implantable…

C RAC

sample



Poten-tiostat


• Multichannel capability


Multichannel microsystems

Processing unit

Limited by the number of physical connections ( 64 )

Intan, RHA2000

CMOS chip

• Multi-parameters meas.• Speed-up an experiment

• Multi-point sensing of a complex system

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Multichannel microsystems E.H.M. Heijne,”How Chips Pave the Road to the Higgs Particle and the Attoworld Beyond”, ISSCC 2014

Large Hadron Collider at CERN


Multichannel microsystems E.H.M. Heijne,”How Chips Pave the Road to the Higgs Particle and the Attoworld Beyond”, ISSCC 2014

The ATLAS experiment has 5x104 of these ICs installed!!!

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Multichannel microsystems E.H.M. Heijne,”How Chips Pave the Road to the Higgs Particle and the AttoworldBeyond”, ISSCC 2014


A step further…

Better: in a single chip

8


A step further…

• Light: CMOS imager• Force: MEMS• Capacitance: touch screen• Magnetic field: compass• …Biosensor ?


CMOS biochip

CaptureProbe

Target Molecule

CMOS Chip Design(Analog/Mixed‐Mode IC Design)

Post‐CMOSProcessing

(MEMS “Lite”)

2+1 major components in a CMOS biochip

Hassibi, SiNano 2012

Graham et al., Sensors p.4943, 2011

Aluminium

oxide corrosion (Cl−) biocompatibility?

9


CMOS biochip

CaptureProbe

Target Molecule

CMOS Chip Design(Analog/Mixed‐Mode IC Design)

Post‐CMOSProcessing

(MEMS “Lite”)

Bio‐functionalization

(Surface Chemistry/Spotting Procedures)

2+1 major components in a CMOS biochip

Hassibi, SiNano 2012

U. Frey, MEMS 2007


High-density MicroElectrode Array

CMOS chip as active substrate for neural recording and stimulation

M. Ballini, J. Muller, P. Livi, Yihui Chen, U. Frey, A. Stettler, A. Shadmani, V. Viswam, I. Lloyd Jones, D. Jackel, M. Radivojevic, M. K. Lewandowska, Wei Gong, M. Fiscella, D. J. Bakkum, F. Heer, and A. Hierlemann, “A 1024-Channel CMOS Microelectrode Array With 26,400 Electrodes for Recording and Stimulation of Electrogenic Cells In Vitro,” IEEE J. Solid-State Circuits, vol. 49, no. 11, pp. 2705–2719, 2014.

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High-density MicroElectrode ArrayM. Ballini, J. Muller, P. Livi, Yihui Chen, U. Frey, A. Stettler, A. Shadmani, V. Viswam, I. Lloyd Jones, D. Jackel, M. Radivojevic, M. K. Lewandowska, Wei Gong, M. Fiscella, D. J. Bakkum, F. Heer, and A. Hierlemann, “A 1024-Channel CMOS Microelectrode Array With 26,400 Electrodes for Recording and Stimulation of Electrogenic Cells In Vitro,” IEEE J. Solid-State Circuits, vol. 49, no. 11, pp. 2705–2719, 2014.



11,011 electrodes,126 recording and stimulation channels, for extracellular bidirectional communication with neurons !26’400 platinum

electrodes!

1024 readout channel (voltage)

ADC

Voltage or current stimulation

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Chip: 7.6 x 10.1 mm2; sensing area: 2 x 4 mm2; power dissipation: 75mW

9.3 x 5.4 m2



A. Hierlemann, Tech. Dig. - Int. Electron Devices Meet. IEDM, 2016

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CMOS nanocapacitor arraysC. Laborde, F. Pittino, H. A. Verhoeven, S. G. Lemay, L. Selmi, M. A. Jongsma, and F. P. Widdershoven, “Real-time imaging of microparticles and living cells with CMOS nanocapacitor arrays.,” Nat. Nanotechnol., vol. 10, no. 9, pp. 791–5, 2015.

Dielectric properties at high-frequency (50MHz)


CMOS nanocapacitor arrays

256 x 256 gold electrodes!90 nm radius, thickness 25nm,

0.6 m x 0.9 m grid

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• Charge-based measurement• Up to 50MHz• Equivalent capacitance • Nonselected electrodes are CE



The particles are shielded by the double-layer capacitance at “low” frequency (only particles in direct contact with the electr.)

Microparticle (4.4 m radius) sedimentation

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The particles are shielded by the double-layer capacitance at “low” frequency (only particles in direct contact with the electr.)

Microparticle (4.4 m radius) sedimentationDouble layer



Dielectric (≈ 2.6) and conductive particles (2.5 m radius)

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Single chip Airborne PM Detector

CMOS Particulate Matter detector:

• Scaled lithography for microelectrodes on chip

• Integrated electronics with ZeptoFarad resolution

• Compactness

• Low cost / mass production

CMOS ASIC

2mmP. Ciccarella, et al., IEEE ISSCC 2016.P. Ciccarella, et al., IEEE JSSC 2016

Next lesson


OUTLOOK of the LESSON

Motivations for instrumentation based on CMOS integrated circuits Examples How to reduce 1/f noise How to design high value resistances

16


Challenges of CMOS integration

• Active devices limited to MOSFET

high 1/f noise

• Capacitors value ~ <100pF (1fF/m2 )

• Resistors value ~ <1M (1k/ high value module)

• 4kT/1M noise of 4pA on BW=1kHz,126pA on BW=1MHz

• RC time constants ~ < 100s, low-pass filters?

A bag of tricks to overcome these limitations!


1/f noise

Amplifiers have offset and 1/f noise

frequency

Noise power spectral density 1/f

1/f is part of an electronic system (out of equilibrium condition)How to reduce the high 1/f noise of MOS transistors:

• Increase the area of transistor• pMOS better than nMOS• Dynamic reduction techniques

17


Chopping principle

LPFVn Vout

Vin

Offset1/f noise

Vch

Signal is modulated, amplified and then demodulatedOutput is continuously available

-1

+1


Square wave modulation

Square wave is easily generated (digital oscillator)…… and multiplication is easily implemented

(4 switches)

m

m

m

ms(t)

m(t)

out(t)

-1

+1Vin(t)

Vout(t)

18



m

m

m

ms(t)

m(t)

out(t)

-1

+1Vin(t) Vout(t)=Vin(t)


(4 switches)



m

m

m

ms(t)

m(t)

out(t)

-1

+1Vin(t) Vout(t)=-Vin(t)


(4 switches)

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Chopper in the frequency domain

1/f completely removed!

fch> 1/f corner freq.

K. M

akin

wa,

Dyn

amic

Offs

et-C

ance

llatio

n

Tech

niqu

es, S

mar

t Sen

sor

Sys

tem

s ‘0

2

BWLPF< fch

BWamp> fch


Chopper technique

+ Amplifiers with sub-microvolt offset

+ Eliminates 1/f noise

- Reduction of the bandwidth (LPF required)

- Increases current noise (charge injection of the input switches)

C.C. Enz, G.C.Temes, “Circuit techniques for reducing the effects of op-amp imperfections: autozeroing, correlated double sampling and chopper stabilization,” Proc. of the IEEE, vol. 84, no. 11, Nov. 1996, p. 1584 -1614

J. Xu, Q. Fan, J. H. Huijsing, C. Van Hoof, R. F. Yazicioglu, and K. A. A. Makinwa, “Measurement and Analysis of Current Noise in Chopper Amplifiers,” IEEE J. Solid-State Circuits, vol. 48, no. 7, pp. 1575–1584, Jul. 2013.

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Challenges of CMOS integration

• Active devices limited to MOSFET

high 1/f noise

• Capacitors value ~ <100pF (1fF/m2 )

• Resistors value ~ <1M (1k/ high value module)

• 4kT/1M noise of 4pA on BW=1kHz,126pA on BW=1MHz

• RC time constants ~ < 100s, low-pass filters?

A bag of tricks to overcome these limitations!


High value resistance

High value resistor = small current with large applied voltage

Equivalent resistance: Vin/Iout = N Rf

Output noise = equivalent to N2Rf (+ cur. div. noise)4

⋅1

Rail-to-rail input voltage

Vin

Rf Iin Current divider0V

0V

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>0V 0V

Current divider

in1

2out I

W

WI

IoutVin

VM

T2

T1

+

-Rf Iin

VSD1=VSD2

L1=L2

2

1f

out

ineq W

WR

I

VR

VSD1

VSD2

W1>>W2 High value resistor set by geometry and Rf

p p

n wellp substrate

S DG

p p

n wellp substrate

S DG

N wellP substrate

0V

Bi-directional !


High value – low noise resistor

IoutVin

VM

T2

T1

+

-Rf Iin

nA driving capability:Rf=300k W1/W2=100

Req=30M, Iout max 30nA

2

1

2

f W

W

R

4kT

Equivalent to a 3G resistor!!!

Rf Output Noise:

T2 Output Noise

In both cases shot noise: 2qIout

Dominant for |Iout|>20pA

Worst case:Iout=10nA Rnoise=5M

F. Gozzini et al., Electronics. Letters 42 (2006) 1069-1070

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Very high value resistor

Vin

+

-

Tb1 Ta1Rin

Ia

Ib

+

-

Tb2 Ta2

+

-

Tb3 Ta3

+

-

Tb4 Ta4

Iout

b1

a1

W

W

La=Lb

Ia= Ib b4

a4

b3

a3

b2

a2

b1

a1

in

inout W

W

W

W

W

W

W

W

R

VI

If Wb/Wa=100 Req=Rin 108 !!


300GΩ equivalent resistor

-1,5 -1,0 -0,5 0,0 0,5 1,0 1,5-6

-4

-2

0

2

4

6

I ou

t [p

A]

Vin [V]

Req = 300G% 5%

-10m -5m 0 5m 10m-40f

-20f

0

20f

Vin [V]

+ Good linearity, rail-to-rail operation, fA capability- Practical limitations: transistor mismatch and OpAmps offset

Avoid on the signal path!

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H(s)

Ci

-

+ Cd

VAC

Rd

-

+

is

VDC

RDC

Active reset network (see M. Sampietro lesson)

1 10 100 1k 10k 100k 1M 10

10M

100MDC

out

ACout

fm

Frequency [Hz]

80Hz – 5MHz

Frequency response

AC outDC out

RDC = 50M

H(s): ≈ 1s (300G)

G. Ferrari, F. Gozzini, A. Molari, M. Sampietro, JSSC 44 (2009) 1609


Summary

• CMOS amplifiers / instruments: • Better SNR

• Multichannel applications

• Active substrate of the experiment

• CMOS limitations:• Materials: aluminum pad post-processing for biodevices

• R,C values, 1/f noise

• … it requires custom design!

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