International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 134

Implementation Of Full Adder Using Mux By

Applying Shannon Expansion Theorem Ms.Shankha Mitra Sunani

Assistant Professor In The Department Of Electronics And Telecommunication Engineering

Government Engineering College Pmec Berhampur

ABSTRACT:

Shannon expansion theorem can be applied in

terms of more than one variable. For designing

any function using MUX we can use Shannon

expansion theorem for any variable function. If

the Shannon expansion is done on one variable,

two variable, three variable then the resulting

expression could be implement using 2:1

mUX,4:1 MUX,8:1 MUX and so on. Depending

upon the select line we choose the variable for

expanding Shannon expansion theorem but in

this paper I will discuss how we design a full

adder using multiplexer (MUX) with the help of

Shannon expansion theorem. Here I have given

more stress on Shannon expansion theorem.how

we will apply shanon expansion theorem for any

function.In this paper I have discussed design of

Full Adder using 2:1 MUX,4:1 MUX and 8:1

MUX with the help of Shannon expansion

theorem.if Shannon expansion function is done

in terms of all n variable then that particular

result is the canonical sum of product(SOP).

Keywords:Shannon Expansion Theorem,Full

Adder,Multiplexer,2:1 MUX,4:1MUX,8:1

MUX.

1.Introduction :

Full adder is a combinational logic circuit that

performs addition of three binary bits and

perform sum and carry as its output.it has three

input (x,y,z)and two output(sum(s),carry(c)).

Truth Table of Full Adder:

Input output

x Y z s c

0 0 0 0 0

0 0 1 1 0

0 1 0 1 0

0 1 1 0 1

1 0 0 1 0

1 0 1 0 1

1 1 0 0 1

1 1 1 1 1

Sum(s)=x y z + x y z + x y z +x y z

Carry(c)=x y z + x y z + x y z +x y z

International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 135

In this paper I want to discuss the design of full

adder using multiplexer with the help of

Shannon expansion theorem. That‟s why first I

will give brief description about Shannon

expansion theorem. Shannon expansion theorem

allows any Boolean function „f‟ can be

expressed in the form:

f(m1,m2,m3,…………mn)= m1

.f(0,m2,...................mn) + m1 .

f(1,m2,……………….mn)

(1)

this expression is for by considering one variable

Shannon expansion theorem by considering two

variable can be expressed in the form :

f(m1,m2,m3,…………mn)= m 1 m

2 f(0,0,m3) + m1

m2f(0,1,m3) +m1m2 f(1,0,m3)+m1m2f(1,1,m3)

(2)

The above expression described in the form of

one variable and two variable Shannon

expansion theorems. One variable function gives

two combinations that is 0 and 1 similarly two

variable gives four combination that is 00, 01,

10 and 11.According to that combination the

Shannon expansion theorem expand.

Here I want to design full adder using

multiplexer with the help of Shannon expansion

theorem. Multiplexer is a combinational logic

circuit that receives information from many

inputs and directs this information to one output.

Selection line is used to select one input at the

output line. In general we can say it has 2n input,

one output and n number of selection line. In 2:1

MUX 2 input,1 output, and 1 selection line ,in

4:1 MUX 4 input,1 output and 2 selection line

and so on .

2.Block diagram ,truth table and expression of 2:1 MUX

I0

Y

I1 22:

(2:1 MUX BLOCK DIAGRAM)

S0

TRUTH TABLE

Selection line(s0) Output(y)

0 I0

1 I1

Y=s I0 + s I1

International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 136

Similarly in 4:1 MUX,let‟s consider 4 input are

I0,I1,I2 and I3,two selection line are S0 and S1 ,one

output y then the expression for 4:1 MUX is

written in the form:

y=s1 s0 I0 + s1 s0 I1 + s1 s0 I2 +s1s0I3 (4)

In 8:1 MUX ,let‟s consider 8 inputs are

I0,I1,I2,I3,I4,I5,I6,I7,three selection line s0,s1,s2 and

one output Y ,then the expression for 8:1 MUX

is written in the form

y= s0 s1 s2 I0+ s0 s1 s2 I1+ s0 s1 s2 I2+ s0 s1 s2 I3+

s0 s1 s2 I4+ s0 s1 s2 I5+ s0 s1 s2 I6+s0 s1S2I7

(5)

in the above I have written the expression

directly because in this paper I will give more

stress on Shannon expansion theorem.Atlast I

will compare the final expression of Shannon

expansion theorem with the above expression.

3.Design full adder using 2:1 mux with

the help of shanon expansion theorem

The output sum expression for full adder

Sum(s)=x y z + x y z + x y z +x y z

We can write the above expression as following

way:

f(x,y,z)= x y z + x y z + x y z +x y z

(6)

For designing the above expression using 2:1

MUX one selection line is required,so we will

write the Shannon expression by considering

one variable .let that variable is „x‟.so we can

write the Shannon expansion synthesizes in the

form of:

f(x,y,z)= x . f(0,y,z) + x.f(1,y,z) (7)

by using equation (6) we can write:

f(0,y,z)=1. y z + 1. y z + 0. y z +0.y.z

= y z + y z (8)

f(1,y,z)=0. y z + 0. y z + 1. y z +1.y.z

= y z + y z (9)

Put equation (8) and (9) in equation (7)

f(x,y,z)= x . ( y z + y z ) + x.( y z + y z)

=x (y X-OR z) + x(y X-NOR z) (10)

equation (10) is look like as a 2:1 MUX

expression, comparing equation (10) with

equation (3) then we will get selection line

s0=x,I0= y z + y z ,I1=y z + y z.

so sum can be design using 2:1 MUX as follows

y

z sum

y (2:1 MUX)

x

International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 137

similarly we can also design carry by using 2:1

MUX,output carry can be expressed as

C(x,y,z)= x y z + x y z + x y z + x y

z,we can write this expression is in the form of

shannon expansion theorem in terms of one

variable function:

f(x,y,z)= x y z + x y z + x y z + x y z

(11)

f(x,y,z)= x . f(0,y,z) + x. f(1,y,z)

(12)

f(0,y,z) and f(1,y,z) will find with the help of

equation (11), so

f(0,y,z)=1.yz + 0. y z + 0. y z + 0. y z

f(0,y,z) =yz (13)

f(1,y,z)=0.yz + 1. y z +1. y z + 1. y z

f(1,y,z)= y z +y z + y z

=y(z + z )+ y z

=y + y z

=y(1 + z )

=y (14)

put equation (13) and (14) in equation (12)

f(x,y,z)= x . (yz) + x. y (15)

equation (15) is in the form of 2:1 MUX ,where

x is the selection line and I0=yz = y AND Z ,and

I1=y

y

z

carry(c) (2:1 MUX)

Y

x

4.DESIGN FULL ADDER USING 4:1 MUX

WITH HELP OF SHANNON EXPANSION

THEOREM

For designing full adder using 4:1 MUX with

the help of Shannon expansion theorem,we can

write the Shannon expansion theorem in terms

of two variable:

Sum(s)=x y z + x y z + x y z +x y z

We can write the above expression as following

way:

f(x,y,z)= x y z + x y z + x y z +x y z

(16)

f(x,y,z)= x y f(0,0,z) + x y f(0,1,z) + x y

f(1,0,z) + x y f(1,1,z) (17)

we will find f(0,0,z), f(0,1,z), f(1,0,z) and

f(1,1,z) by using equation (16)

f(0,0,z)=1.1.z + 1.0. z + 0.1. z +0.0 z

f(0,0,z)=z (18)

f(0,1,z) )= 1.0. z +1.1. z + 0. 0. z +0.1. z

f(0,1,z) )= z (19)

f(1,0,z) = 0.1. z +0.0. z +1.1. z +1.0. z

f(1,0,z) = z (20)

f(1,1,z) = 0.0.z + 0.1.z + 1.0.z +1.1. z

International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 138

f(1,1,z) =z (21) put equation (18),(19),(20) and (21) in equation

(17)

f(x,y,z)= x y z + x y z+ x y z + x y z

(22)

equation (22) is look like as a 4:1 MUX

expression where two selection line are „x‟ and

„y‟,four inputs are I0=z,I1=I2= z ,I3=z

z

z sum

z

z (FULL ADDER SUM USING

X Y 4:1MUX )

Similarly carry can be expressed as C(x,y,z)= x

y z + x y z + x y z + x y z

f(x,y,z)= x y z + x y z + x y z + x y z

(23)

Shannon expansion theorem in terms of two

variable can be expressed as

f(x,y,z)= x y f (0,0,z) + x y f(0,1,z) + x y

f(1,0,z) + x y f(1,1,z) (24)

we will find f(0,0,z), f(0,1,z), f(1,0,z) and

f(1,1,z) by using equation (23)

f(0,0,z) = 1.0.z + 0.1.z + 0.0. z + 0.0.z

f(0,0,z) =0 (25)

f(0,1,z)= 1.1.z + 0.0. z + 0.1.z + 0.1. z

f(0,1,z)=z (26)

f(1,0,z) =0.0. z + 1.1. z + 1.0. z + 1.0. z

f(1,0,z) =z (27)

f(1,1,z)=0.1 z + 1.0. z + 1.1 z + 1.1. z

f(1,1,z)=1 (28)

put equation (25),(26),(27) and (28) in equation

(24)

f(x,y,z)= x y .0 + x y z + x y .z + x y .1

(29)

equation (29) is in the form of 4:1 MUX where x

and y are selection line,the four inputs are

I0=0,I1=I2=z,I3=1

International Conference on Engineering Humanities & Science (ICEHS-2017)

Seventh Sense Research Group www.internationaljournalssrg.org Page 139

0

z carry

z

1 Y ( CARRY USING 2:1 MUX)

x y

CONCLUSION

In this paper I have discussed that full adder can

be design using different multiplexer i.e 2:1

MUX,4:1 MUX with the help of Shannon

expansion theorem. This one will be very

helpful for researcher to easy understanding and

practicing of implementation of any function

through multiplexer in the field of engineering

and technology

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