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SEMATECH Confidential

Accelerating the next technology revolution

Copyright ©2010

SEMATECH, Inc. SEMATECH, and the SEMATECH logo are registered servicemarks of SEMATECH, Inc. International SEMATECH Manufacturing Initiative, ISMI, Advanced Materials Research Center

and AMRC are servicemarks of SEMATECH, Inc. All other servicemarks and trademarks are the property of their respective owners.

iEUVi Mask TWG Update

February 28, 2013, San Jose, CA

Long He


TWG Membership Chair: Long He (US) SEMATECH / Intel

Co-chairs:

Markus Bender (EU) AMTC

Kazuya Ota (JP) Nikon

John Zimmerman, (US) ASML

Pawitter Mangat (US) GF

Membership:

Asia: AGC, Hoya, Canon, Nikon, NuFlare, DNP, Toppan, Samsung, TSMC, UMC, Gudeng, Danichi, Lasertec, Rorze, Toshiba, Shin-Etsu, EIDEC

EU: ASML, AMTC, TNO, Zeiss, HAMATEC, DMS, IMEC

US: KLA-Tencor, Corning, Entegris, GLOBALFUNDRIES, IBM, Intel, CNSC, EUVL, Lam Research, Applied Materials, Plasma-Therm, SEMATECH

2


Mask TWG: Mission & Objective

• Mission:

Ensure EUV mask infrastructure readiness for High Volume Manufacturing (HVM) 2013 - 2016

• Objectives:

– Identify required standards

– Identify potential gaps between industry’s current efforts and projected needs for HVM

– Highlight gaps to member organizations and IEUVI Board for action

– Coordinate industry-wide EUV mask conversion

3


Mask TWG Participation Trend 2009 - 2013

4

Regional representation

of companies Attendance and company representation

Asia-Pacific: 17EU: 7US: 12

• 57 attended the Sunday TWG, representing over 20

companies

0

10

20

30

40

50

60

70

80

Attendees

Companies


Mask TWG Focuses (2/24/13)

5

• EUV Pellicle – Technical discussions

– Brainstorm infrastructure needs

• Technical Updates / Discussions – Defect printability

– HVM mask cleaning

– High NA mask blank requirement

– SMT SHARP and NDC updates

• Blank Defect Mitigation – Fiducial development progress

– Potential gaps for HVM implementation

• ITRS / Standards – 2013 ITRS revision

– Standards updates

SEMATECH Confidential 6

1:00 PM 1:15 PM Introduction Long He (SMT/INTC) 1

1. EUV Pellicle

1:15 PM 1:40 PM EUV Pellicle technical discussion Hye-Keun Oh (Hanyang Univ) 2

1:40 PM 2:05 PM EUV Pellicle technical discussion Shoji Akiyama (Shin-Etsu) 3

2:05 PM 2:20 PM Discussions:

Qual / requal of pellicled-mask -

Inspection method, membrane type, pellicle type / mounting

Built-in pellicle (in-tool)

Required infrastructure changes

All 4

2. Technical Updates / Discussions

2:20 PM 2:40 PM SEMATECH defect printability studies Mason Jang (SMT/SAMSUNG) 5

2:40 PM 2:55 PM Remaining challenges of EUV mask cleaning for HVM Uwe Dietze (SUSS) 6

----- Break ------

3:10 PM 3:25 PM High NA EUV mask blank simulation studies Patrick Kearney (SMT) 7

3:25 PM 3:35 PM SEMATECH High-NA Actinic Reticle Review Project (SHARP) update Iacopo Mochi / Kenneth Goldberg

(LBNL) 8

3:35 PM 3:45 PM SEMATECH Nano Defect Center porgram update Vibhu Jindal (SMT) 9

3. Blank Defect Mitigation

3:45 PM 3:55 PM Fiducial development update Tsutomu Shoki (Hoya) 10

3:55 PM 4:05 PM Fiducial development update Yoshiaki Ikuta (AGC) 11

4:05 PM 4:15 PM e-beam algorism and implementation update Shusuke Yoshitake (Nuflare) 12

4:15 PM 4:30 PM Defectivity mitigation process flow and potential gaps Markus Bender (AMTC) 13

4. Mask ITRS Review and Standards Updates

4:30 PM 4:40 PM Mask ITRS Review Frank Goodwin (SMT) 14

4:40 PM 4:45 PM P37 standard voting results John Zimmerman (ASML) 15

4:45 PM 4:50 PM E152 status update Long He / Handling TF 16

4:50 PM 4:55 PM P48 fiducial mark specification update Long He / Fiducial TF 17

4:55 PM 5:00 PM Conclusion / adjourn Long He 18

IEUVI Mask TWG Agenda. February 24, 2013


EUV Pellicle


Shin-Etsu Pellicle Progress


Hanyang University Pellicle Study


Discussions of Pellicle Implementation Enabling

• Pell’d mask (re-)qualification

? Pellicle and mounting requirements for mask inspect-ability

? Inspection method / tool

? In-tool pellicle (for all masks when placed on stage)

• Pellicle required mask infrastructure changes

? Carrier change

? Others

Conclusion: No action items captured during the meeting since in early phase. But,

there were more recommendations for action than for wait-and-see.

Off-line follow-ups needed.


Technical Topic Discussions


Current Multilayer Design Supports NA Only Upto 0.33

For M=4

ap

od

iza

tio

n

Current ML design can’t

support NA above ~0.33, at

M=4.


A Preliminary Look at General Periodic And Aperiodic Mask Multilayers

• Simulate for three simple ML

modifications

– General periodic-vary N, dSi,dMo

– Chirped-Linear dSi and dMo ramp

– Bistacks-Vary periods and N for

upper coating

• These simple modifications can

improve apodization over current

multilayer if we trade off

reflectivity.

• What apodization can we

tolerate?

Periodic

Chirped

Bistack

M=4

Without changing magnification

(4x) and the chief ray angle (6°),

maximum NA is limited to ~0.42,

just from the light cones.


Roadmap

• Out to NA~0.42

– (0.4*13.5/0.42=13nm)

– Tweak ML design

– Design ML/absorber for illumination.

– Keep M=4 and 6” mask.

• NA=0.42-0.7

– (0.4*13.5/0.7=8nm)

– Increase magnification (~8×).

– Increase mask size (~300mm)

• Beyond that:

– BEUV (6.x nm)

– or EUVDP


Key Decisions Required

• What mask magnification to use? – 8× should get us to NA=0.7.

– Should we ramp M from 4 to 8 or just jump to 8?

• What mask size / format to use?

– Can we live with a smaller wafer field?

– When to change mask size?

– Ramp mask size or just jump to largest mask?

• Do we bother increasing the chief ray angle?

– CRA=6->NA=0.42, CRA=7->NA=0.48.

• How do we limit the number of mask

multilayer/absorber designs the mask suppliers must

support? – Standardize?

– Increase magnification sooner?


Un

-op

tim

ized

SH

AR

P I

mag

es


SMT Printability Update: Experimental

① Substrate Insp.& marking

② AFM analysis

⑥Absorber patterning

⑦ Wafer Exposure

③ ML deposition ④ AFM analysis

⑤ Absorber deposition

⑧ Analysis

*Images courtesy of www.tel.com, www.veeco.com


An Example: CD Error vs. Defect Size

Simul. image

Wafer image

Position : X=0

NA=0.25, sigma=0.8

0 100 200 300 400 500 6000

50

100

150

200

250

300

350

X Mask Distance (nm)

Z M

ask H

eig

ht

(nm

)

EUV Mask Geometry Cutline Through Center of DefectBump

Illumination Defocus

Focus = 0nm


Nano-defects: Need Integrated Approach

Sub 10 nm

Defects

Detection

Characterize

Source Removal

Repair

Prevention

Shape

Composition

size

Shape

Composition

size

Formation

Release

mechanisms

Transport

Adhesion

Lift off

Transport

Removal

Pattern modification

Remove

source

Prevent

deposition

Surface

contribution

Surface

contribution

Light-Matter interactions

e/ion beam-Matter interactions

Surface roughness/flatness

(power Spectral density)

Surface Topography

SEM/EDS/FIB

TOFSIMS

AFM

Auger (AES)

XPS

FTIR

TEM

EUVR

XRR

TXRF

Raman

XRD

Condensation

Contact mechanics

Crack formation

Stress

Temperature

Fluid dynamics Colloidal science

Interface science

Sound-Matter interactions


e/ion beam-Matter

interactions

Nano manipulation

fs lasers


Fluid dynamics

Tool modifications

Technology development

Procedures/guidelines

Material modifications


SMT NDC Drives For Nano-Defects

Solution

Collaborate Provide a common facility for the required

critical expensive infrastructure

Work Proactively Break the problem down and solve

component and material problems before

integration

Drive Solutions Based on fundamental science of the

defect problem

Defect inspection

Silicon

20nm

Component level

accelerated life test

Understand the physics, model the

problem, and make a solution

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

25 Cleaning

63 Cleaning

63 Cleaning

65 Cleaning

Dec 10Sept - Nov,10Q2 - Aug,10

Ad

de

r co

un

t

Q1,10

Tool Component

improvement

Filter

Install

Best Adder

Data

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

25 Cleaning

63 Cleaning

63 Cleaning

65 Cleaning


Ad

de

r co

un

t

Q1,10

Tool Component

improvement

Filter

Install

Best Adder

Data

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

25 Cleaning

63 Cleaning

63 Cleaning

65 Cleaning


Ad

de

r co

un

t

Q1,10

Tool Component

improvement

Filter

Install

Best Adder

Data

-0.1

0.0

0.1

0.2

0.3

0.4

0.5

0.6

0.7

0.8

25 Cleaning

63 Cleaning

63 Cleaning

65 Cleaning


Ad

de

r co

un

t

Q1,10

Tool Component

improvement

Filter

Install

Best Adder

Data

SEMATECH Nanodefect Center


Stress and Cycle Testing Capability

Custom designed test chambers

• In atmosphere

• In vacuum

• Under inert gas plasma

• Under reactive gas plasma

• Under ion beam exposure

Particle Measurement Capabilities

• Particle Counters

• Particle Sizer

• Electrospray Aerosol Generator

• Optical Counter

Substrate Inspection Capability

Lasertec M1350 ~70nm / M7360 ~35nm

• Direct defect detection to 35nm

• Confocal microscope

• Marking capability

• AFM and FIB/SEM/EDS for

>70nm defect analysis

• AES and TEM are capable of

<10nm and are necessary for

smaller <70nm defects

Substrate cleaning

Substrate inspection

Substrate inspection

Blank substrate

mask or wafer

Test chamber

State-of-the-Art Infrastructure >$100M investment in place today at SMT


Mask Blank Defect Mitigation


Mask Standards And ITRS


2013 Mask ITRS Roadmap Revision Discussed

36


EUV Mask Standards Summary

• E152 mask carrier (EUV-pod) standard

– Line-item revision ballot under review with SEMI technical editing

– To submit for Cycle 3 voting (5/1 – 5/31/13)

• P48 mask blank fiducial mark standard

– Revision ballot drafted, with placeholder specifications (TBD by data)

– Technical development on-going

• P37 mask blank standard

– Revision ballot voted during 2012 Standard Cycle 6. Final approval expected this week at SEMI Standard Committee meeting.

• Mostly, to document capping layer conductivity requirement

• P40 mask mounting and T16 data matrix standards

– No action needed: Both mask chucking requirement and 2D bar code format meet needs.

37


E152 Line-Items Ballot Include Eight (8) Items

• Ballot Item One – Add two rear purge areas

• Ballot Item Two – Add two front purge areas

• Ballot Item Three – Maximum mass increased for EUV Carrier components

• Ballot Item Four – The outer pod door closing force, latching torque, KC pin height and OHT flange height need to be clarified

• Ballot Item Five – The RFID location within outer carrier needs to be clarified with new labels on Figures within standard and definition of transponder

• Ballot Item Six – Define eight (8) outer carrier info pad configurations

• Ballot Item Seven – Correct and clarify values x4, y5 and z15

• Ballot Item Eight – Clarify reticle position within inner pod by re-defining x1, y1

38


Ballot Status And Plan

• Line-item ballot draft completed

– Need minor touch up and

– Critical review with SEMI Standard Technical Writer

• Ballot to be submitted for Cycle 3, 2013 (of SEMI Standards)

– Ballot submission date: April 17, 2013

– Voting period: May 1 to 31, 2013

39


Consensus reached for three (3) changes:

1. Where vertically in the film stack to pattern markers

2. Replace small crosses with added requirements for the central areas of large crosses

3. Update current P48 placeholders with proven specifications

P48 Revision And Status

New layout, with a partial marker

at the unbeveled corner.

New Marker

40


Plan

• Fiducial development

- Optimize mark line specifications through contrast and positioning accuracy tests

Completion date: end of Q1, 2013 (overly agressive)

Owner: Fiducial team / stakeholders

• Standard revision

– New ballot drafted with placeholders of requirements

– Submit ballot, once technical specifications become available

Targeted Yellow Ballot submission: July, 2013, but pending on completion of fiducial development

Owner: SEMI Fiducial TF

41


Mask TWG Plans

• Identify EUV mask gaps for HVM

• Coordinate standardization activities

• Coordinate industry fiducial mark development activities:

− Optimize ficucial patterning specification, for contrast and defect locating accuracy.

− Streamline mask blank defect mitigation strategy

• Facilitate industry EUV pellicle discussion − Consolidate industry EUV pellicle assessment

− Identify required infrastructure elements

• Next TWG: Tentatively at next EUVL

Symposium

43

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