A SOFTWARE DEFINED BY RADIO

Mark W. ChamberlainHarris Corporation, RF Communications Division

Rochester, New York

ABSTRACT

Software defined radio (SDR) is a new approach formilitary radio systems. This new radio paradigmsupports multiple channels with simultaneouswaveforms, providing a new level of scalability andflexibility to the user, and allows for rapid technologyinsertion as it becomes available. This paper exploresthe insertion of legacy High Frequency (HF)waveforms to one channel of a software defined radiowith a focus on ManPack Radio (MPR) specific needs.The paper includes both software and hardwareaspects of the complete radio system design. The paperwill investigate hardware technology limits with respectto size, weight, power consumption, cost, and radioperformance. The paper will look at the unique aspectsof the HF communications that directly affect thesoftware defined radio architecture.

INTRODUCTION

The personal computer that is so much part of modem lifetoday is the basis for the software define radio concept.The personal computer (PC) hardware has become such astandard platform that the specific manufacturing vendorhas become less important, since the software has beendesigned to abstract hardware differences. The hardwareis designed to be more generic, while the software hasbecome more flexible and very capable. Any increase incapability as a result of changing requirements is addressedfirst with new software, which can be easily loaded by theuser onto the target system or by purchasing fasterprocessing hardware with more memory resources. Asoftware defined radio is a general hardware computingplatform using software / hardware abstraction to allowsoftware to perform radio processing tasks.

The software defined radio converts analog signals intodigital data to be processed by the various computingresources within the radio platform. Software controls themajor aspects of the radio frequency (RF) hardwarecomponents. Software controls transmit and receivefrequencies, selects the desired bandwidth, performs thetransmit gain control (TGC) and automatic gain control

(AGC) functions, sets and monitors the output power level,provides system fault handling, and provides the man-machine interface. Speech compression and modem signalprocessing is also completely performed in software,usually on separate computing resources. The encryptionsoftware process configures and monitors security with arecent trend toward performing the entire encryptionprocess in software. Networking aspects of the data trafficare either completely or partially implemented in software.Finally, the man-machine interface (NMI) is completelydefined within a software process allowing adaptability tonew capabilities with an emphasis on simplifying radio touser interaction.

Advances in areas such as embedded general purposeprocessor (GPP) and digital signal processor (DSP)technology, digital converter performance, fieldprogrammable gate array (FPGA) density, and object-oriented programming have enabled a shift from hardware-intensive radios to flexible, multiband, multimode softwareradios, in which functionality is provided through softwarerather than hardware. Software radios have the flexibilityto allow incorporation of new functionality into the system.without having to upgrade or replace hardwarecomponents. Multiple software modules allowimplementation of different standards in the same radiosystem, including the capability to have multiple waveformsresident on the same set. Because radio receivers can bereconfigured over-the-air, new capability can be providedto existing fielded radios rapidly.

Figure 1. - Software Defined Radio

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Figure 1 displays a typical software define radioarchitecture for a single channel. The architecture consistsof a red side general purpose processor, a digital signalprocessor, a crypto device, and a FPGA that providesinterconnect and interfaces to standard I/O devicesincluding the (MMI). The red FPGA interconnect permitsall resources to be shared among the processing units. Theblack side is similarly connected to allow the sameresource sharing and access to data. The black side isprincipally concerned with waveform generation and radiocontrol. Waveforms can be either generated by the blackDSP, the FPGA, or a combination of both as defined by thesignal processing requirements.

HF CHANNEL

The high frequency (HF) signal spectrum from 1.6 to 30MHz can provide long range communication. The channelbandwidth is primarily 3 KHz and the band is utilized bymany legacy government and commercial communicationsystems fielded today. The wavelength of the HF bandallows signals to bounce off the ionosphere and back to theground repeatedly as the signal propagates. It is thisprocess that allows the signal to propagate beyond thecurvature of the earth. The limited nature of the bandwidthand the signal bounce property can cause severalchallenges for the software defined radio to overcome.Multiple signal paths arrive at the receiver with differentdistances traveled which results in signal fading, and canresult in the signal being completely canceled at thereceiver. Some signal paths known as ground wave canpropagate without a skywave component. Also, theionosphere moves with time which introduces DopplerSpread on the receive signal that software must overcomein the demodulation process. For some northern latitudes,Doppler Spread can be as much as 50 Hz and delaybetween paths can be as much as 10 ms [1].

Fortunately, several standardized waveforms exist thatallow communication on these difficult channels. For theharshest point-to-point channels, STANAG 4415 [2]supports communication on high fade rate (> 50 Hz) pathsand can resolve return paths of lOOms or more usingorthogonal signaling. When the signal to noise ratio (SNR)conditions allow higher data rates, STANAG 4539 [3] canuse qradrature amplitude modulation (QAM) constellationsto achieve higher bandwidth efficiency. For error-free datatransfers over a variety of channel conditions, STANAG4538 [4] can be selected which automatically adapts

aforementioned standards can run as a softwareapplication on a single digital signal processor as shown inFigure 1.

DIGITAL HF

The concept of processing the HF spectrum digitally hasbeen studied by others [5][6][7]. As the capabilities ofFPGA, DSPs and digital converters improve, the quality ofthese digital techniques can improve performance overanalog techniques. The transmit spectrum of Hf and thedesire for direct conversion requires a digitalto-analogconverter with at least a sample rate of 60 lMz withenough bits to permit the output spectrum to obtain anacceptable SNR at the antenna. The receiver can uselower bandwidth analog-to-digital converters since thetypical UF channel is only 3 kHz. On these narrow bandchannels, band-pass sampling methods can be used duringdemodulation. However, the use of low power, high speedanalog to digital converters (ADC)s combined with FPGAscan allow wideband processing (Nyquest sampling) inmany applications.

DIGITAL HF TRANSMIT

A block diagram for a modern UF transmitter is shown inFigure 2. The modem base-band signal is generated insoftware on the DSP and is sent to the digital to analogconverter VAC), either remaining at base-band or at alow digital intermediate frequency (OF). The low pass filter(LPF) is used to reconstruct the signal to a completelyanalog representation. The following mix, amplification,filtering, and antenna matching are done using analogmethods. The output frequency is generated using asynthesizer locked to the radio's reference clock. Eitherone or two intermediate mixes are used before achievingthe final output frequency.

Output power is controlled using a transmit gain control(TGC) loop typically in software. Output level is adjustedusing a variable gain amplifier that feeds the poweramplifier which is usually designed with fixed gain. Thepower amplifier is followed by a filter bank that reducesthe harmonic distortion generated by the power amplifier.The power delivered to the antenna is monitored using adirectional coupler at the output of the coupler. Bymonitoring the forward and reflected power at the antenna,software can select a final tuning solution.

bandwidth efficiency to channel conditions. Each of the

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the output spectrum result, large FIR filter lengths can beused without impacting power consumption significantly.

Eff synteksizer

Figure 2. - Modem UF Transmitter sin2Trw t

Figure 3 shows a completely digital method of generatingsingle side-band (SSB) based on the Weaver method [8].The output should be passed through a reconstruction filterwith a band edge above 30 M4Hz and could drive the poweramplifier directly. The FPGA would be designed to convertthe base-band sample rate to the final output sample ratewhich would be higher than twice the maximum frequencyof the UF band.

An analytical signal is created by mixing the real input witha signal with frequency set at half the bandwidth. Theoutput is filtered to provide radio filter shaping and isperformed using a linear phase finite impulse response(FIR) filter. The output spectrum is then pre-distorted tocompensate for the effects of the comb integrator filter(CIC). The CIC is a multi-rate filter designed for realizinglarge sample rate changes in digital systems efficiently andis described in P]. The sample rate change shown inFigure 3 is from 9.6 KHz to a final output sample rate of76.8 M4Hz.

The CIC interpolater consists of a number of differentiatorstages, a zero stuffing process, and a number of integratorstages. No multipliers are required to perform the CICprocess which reduces FPGA power and allows highersample rates changes to be implemented. However, bitgrowth occurs in both the differentiators and htegratorswhich cause the bit requirements in the adders to beconsidered during the design process to prevent overflow.

The final output is then mixed up to the final centerfrequency digitally. The sign in the final output mix allowseither upper side-band (USB) or lower side-band (LSB) tobe generated. Also, both the radio shaping filter and theCIC compensation filter are implemented at the lower inputsample rate. Since the lower sample rate is used to shape

Figure 3. - Digital SSB Transmit

DIGITAL HF RECEIVE

A block diagram for a modem UF receiver is shown inFigure 4. The amplifier following the antenna is a low noisevariety that is designed to minimize noise figure. The firstmix is performed with a digitally synthesized signal to thefirst IF and then band-pass filtered and amplified. Thesecond mix uses the second IF frequency and then low-pass filtered before being sampled by the ADC, either atbase-band or at a third IF frequency. Using fixed IFfrequencies allows fixed filter designs which allows filterdesigns to be optimized.

The multi-stage mixing is the common Superheterodynereceiver design. Each stage provides rejection forundesired signals seen at the ADC input which includesadjacent signals. Eliminating adjacent signal allows thedesired signal to "fit" into the ADC signal input rangewithout having a stronger adjacent signal pushing thedesired signal into the noise floor. The ADC output iseither sampled at base-band or at a low digital IFfrequency and low sample rates. Final receivedemodulation filtering can be performed by the FPGA orby the DSP using linear phase FIR filters in software.

Automatic gain control (AGC) is usually implemented insoftware and is designed to maintain the receive signal atoptimal levels throughout the receive signal path. Theoptimal setpoint for each gain device results in a low noisefigure for the system and maximum SNR seen at the ADCfor a specific input signal level. HF systems have the addedAGC complexity due to large peak-to-average OFDMlegacy waveforms and high order QAM signals. Achievingone AGC algorithm for all modes is unlikely. Typically,

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attack time and hang-time are treated differently for datawaveforms and analog voice.

Figure 4. - Modern HF Receiver

Figure 5 illustrates a digital SSB receiver. Itimplementation, the input signal is filtered to reject s

outside the Hf band and to eliminate effects due to a]before being sampled by the ADC. The negative effia strong adjacent channel can be mitigated by an adjtband-pass filter using high Q inductorless gyrator fillvariable gain device (VGA) can be used to set signalinto the ADC to optimize SNR.

The digital down converter shown below is very simFigure 3 An analytical signal is created by mixingthe channel frequency image, correcting sign to selecor LSB images. The order of the CIC is now reversesignal is first processed by the integrator filtersdecimated, and then processed by the differentiatorOnce the sample rate is reduced, the real and imalcomponents are compensated for the CIC distortio-then the radio filter shape is applied to the demodsignals. The output signal is left in analytical formprocessed by DSP software.

-si 2 Tr IfC I t

Figure 5. - Digital SSB Receive

n thissignalsliasingMcts ofistableters. Alevels

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It USBcd; the,, thenf; 1 +,c%-

The hardware described in this section is typical of a multi-band radio platform designed to operate from 2 M4Hz to 2GHz. The platform allows both narrow-band and wide-band waveforms to be processed by the digital base-bandhardware. In the higher frequency modes, the digitalhardware operates with a fixed IF using classicalSuperheterodyne techniques. At lower frequencies, it ispossible to process the signals directly at RF frequencies.

GPP

The general purpose processor is Freescale's MX21 [10]and is based on the ARM926 core. The MX21 is designedfor the wireless smartphone and PDA markets, whichrequire significant processing capability and powermanagement to allow multimedia and graphics applicationsto run efficiently from batteries. The processor has anembedded tSB on-the-go port requiring only an externalOTG transceiver. The core runs at a 266 MHZ rate andsupports 1.8V external interface to 133 M4Hz mobilesynchronous dynamic random access memories (SDRAM)to further reduce power consumption. The MX21 alsocontains a smart switch which allows true parallelismresulting in more effective data per CPU cycle. The on-board switch allows up to four simultaneous transactions,which can provide the effective throughput of a 532 M4Hzbus.

NB AND WB DSPS

iiiiers. The narrow-band (NB) digital signal processor is Texasginary Instrument's TMS320C5510 [11] using a clock speed oftnand 200 1Mz. The C55x DSP core provides advancedlulated automatic power management for all peripherals, memoryto be arrays and individual CPU units limiting power to 1mW per

MHz while executing, and 143uW while idled One of theC55x DSP core's most innovative features is its supportfor variable -length instructions which vary from 8 to 48 bits

Real in length. An on-chip instruction buffer unit automaticallyunpacks instructions to make the most efficient use of eachclock cycle. The C55X CPU provides two multiply-accumulate units, each capable of 17-bit x 17-bitmultiplication in a single cycle. The effect of the two

Irnag individual multipliers and multiple 40 bit accumulators is thecapability of 400 million multiply-accumulates per second(MMACS). The computational hardware uses three 16-bitdata read buses, two 16-bit data write buses, one 32-bitprogram bus, and six 24-bit address buses per cycle.

HARDWARE

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Wide-band (WB) digital signal processing is performedusing Texas Instrument's 600 1\H1z TMS320C6416 [12].The 64x device uses a novel very long instruction wordarchitecture which makes the processor an excellentchoice for wide-band use or for multi-channel narrow-bandmodem signal processing. The processor executes eightinstructions per clock cycle resulting in 4800 millioninstructions per second (MIPS). The C64x can producefour 16-bit NIACS per cycle, or eight &bit NIACS perclock cycle. The 6416 has two on-chip embeddedcoprocessors (Viterbi and Turbo decoders) thatsignificantly speed up channeldecoding operations.

FPGA

The Virtex-II 2V3000 FPGA [13] provides 3 million gatesof reprogrammable fabric to implement multiplewaveforms. The Virtex-II intellectual property (IP)immersion architecture enables easy integration of on-chiphard IP blocks and a broad library of soft IP blocks.Complex IP based designs can incorporate an abundanceof advanced routing resources, on-chip memories, andembedded multiplies. With embedded multipliers, extendedmemory and improved arithmetic functions, the Virtex-IIsolution delivers over 0.5 TeraMACS per second of DSPperformance.

ADC

The analog to digital converter used is Linear Technology'sLTC2249 [14] which is a 14-bit 80 Msps, low power 3Vconverter designed to digitize high frequency, widedynamic range signals. The LTC2249 is perfect fordemanding communications applications with ACperformance of 73 dB SNR and 90 dB spurious freedynamic range. The input bandwidth of the sample andhold is 575 M4Hz making this ADC suitable for band-passsampling for signals up to and including the VHFcommunications band. When using Nyquist sampling at asample rate of 76.8 lMz, the effective 3 kHz SNR is +114dB.

VGA

An Analog Device's AD8367 [15] is a high performance45 dB variable gain amplifier (VGA) with linear-in-dB gaincontrol for use beyond 500 1Mz. The range, accuracy, andflatness of this device make it suitable for the RF automaticgain control. The step response of the VGA is 300ns whichallows AGC operation with wide band data signals. The

AD8367 contains a square-law detector that senses theoutput signal and is used as AGC bias. The AGC biasrepresents a calibrated root mean square (RMS) measureof the receive signal strength.

DAC

The digital to analog converter is Analog Device's AD9744[16] which is a 14-bit device and is specifically optimizedfor the transmit signal path of communication systems. TheAD9744 offers exceptional AC and DC performance whileupdate rates of 210 million samples per second. This ADCis designed to run at a mere 60 mW at the full rated samplerate. The converter is a current differential output devicethat is designed to drive a transformer. The transformeroutput can be connected to a reconstruction filter designedfor a 50 ohms load.

RECONSTRUCTION FILTER

The reconstruction filter used is a 1 oth order Butterworthfilter. An attribute of the Butterworth filter is that the pass-band gain is minimally flat. The band edge was designed toallow the full 30 M4Hz HF spectrum to be generatedwithout signal degradation. The stop-band edge wasdesigned to attenuate alias images at 38.4 MIHz. The filteris constructed with lump discrete elements.

TUNABLE BAND-PASS FILTER

A tunable band-pass filter is provided in both receive andtransmit paths. The filter is based on the gyrator [17] tosimulate nearly perfect inductors using operationalamplifiers. When using high gain bandwidth productamplifiers, it is possible to obtain high Q filters at RFfrequencies. In receive, the adjustable filter is used toprovide rejection to undesired signals at the ADC input.Without filtering, a;ljacent channels could desensitize theADC from seeing the desired weaker signal. In transmit,the adjustable band-pass filter allows the reconstructed RFsignal meet radio phase noise requirements.

CONCLUSIONS

The SDR paradigm presented is a flexible architectureallowing multiple waveforms to be rapidly ported. Further,HF waveforms have been shown to easily fit onto thisplatform using conventional Superhetrodyne techniques. Acompletely digital transceiver implementation waspresented such that no external analog mixers are

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necessary. The digital implementation presented for legacy [15] Analog Devices, "AD8367 - 500 lHIlz, 45 dB Linear-HF waveforms can be extended to allow wideband HF in dB Variable Gain Amplifier", Rev 0, Analogsignal processing without changing external hardware Devices Inc., Nov. 2001components of the digital architecture approach. [16] Analog Devices, "AD9744 - 14-Bit, 210 MSPS

TxDAC D/A Converter", Rev B, Analog Devices Inc.,REFERENCES April 2005

[17] Poole R. H. M., R & D White Paper, "The Taming ofthe Gyrator", British Broadcasting Corp., Sept. 2004

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[3] STANAG 4539, "Technical Standards for Non-Hopping UF Communications Waveform", NorthAtlantic Treaty Organization

[4] STANAG 4538, "Technical Standards for anAutomatic Radio Control System for UFCommunications Links", North Atlantic TreatyOrganization, 2000

[5] Andraka Ray, Design Con 2000, Jan. 31 - Feb. 3,Santa Clara, CA

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[8] Weaver D., "A Third method of generation andDetection of SignalSideband Signals", Proceeding ofthe IRE, 1956

[9] Hogenauer E. B., "An Economical Class of DigitalFilters for Decimation and Interpolation", IEEE. Tran.Accoust. Speech Signal Processing, Vol. 29, No 2, pp.155-162, April 1981

[10] Freescale, "MC9328MX21 Datasheet", Rev 1.1,Freescale Semiconductor, 2004

[11] Texas Instruments, "TMS320VC5510/551OA Fixed-Point Digital Signal Processors", Rev K, TexasInstruments Inc., June 2000 - Revised April 2005

[12] Texas Instruments, "TMS320C6414, TMS320C6415,TMS320C6416 Fixed-Point Digital Signal processors",Rev M, Texas Instruments Inc., Feb. 2001 - RevisedFeb. 2005

[13] Xilinx, "Virtex-II Platform FPGAs: Complete DataSheet", V 3.4, Xilinx Inc., March 2005

[14] Linear Technology, "LTC2249 - 14-Bit, 8OMsps LowPower 3V ADC", Rev F, Linear Technology, 2004

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