ic design of power management circuits (i)

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IC Design of Power Management Circuits (I) Wing-Hung Ki Integrated Power Electronics Laboratory ECE Dept., HKUST Clear Water Bay, Hong Kong www.ee.ust.hk/~eeki International Symposium on Integrated Circuits Singapore, Dec. 14, 2009

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Page 1: IC Design of Power Management Circuits (I)

IC Design ofPower Management Circuits (I)

Wing-Hung KiIntegrated Power Electronics Laboratory

ECE Dept., HKUSTClear Water Bay, Hong Kong

www.ee.ust.hk/~eeki

International Symposium on Integrated CircuitsSingapore, Dec. 14, 2009

Page 2: IC Design of Power Management Circuits (I)

Ki 2

1. Switching Converters: Fundamentals and Control

2. Switching Converters: IC Design

3. Switching Converters: Stability and Compensation

4. Fundamentals of Bandgap References

5. Development of Integrated Charge Pumps

6. Introduction to Low Dropout Regulators

Tutorial Content

Page 3: IC Design of Power Management Circuits (I)

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Part I

Switching Converters:Fundamentals and Control

Page 4: IC Design of Power Management Circuits (I)

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Steady State AnalysisLossless elementsBuck, boost, buck-boost power stagesVolt-second balanceContinuous conduction modeDiscontinuous conduction modeRinging suppressionPseudo-continuous conduction modeEfficiency

Performance Evaluation Parameters

Control TopologiesPWM voltage mode controlPWM current mode control

Single-Inductor Multi-Input Multi-Output Converters

Content

Page 5: IC Design of Power Management Circuits (I)

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Linear Regulator has Low Efficiency

C LR

oV

1R

2R

obV

VREF

NM

EAddV

Q1I oIQ3IQ2I

ddI

Efficiency of linear regulator is not high:

η = = = < <+

o o o o o o

in dd dd dd o Q dd

P V I V I V1

P V I V I I V

Can one design a power converter with efficiency close to 1?

power converter

Page 6: IC Design of Power Management Circuits (I)

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Switches as Lossless Components

A power converter with high efficiency needs lossless components.Reactive elements: capacitors, inductorsActive elements: switches

swI+

−swV

= Vsw ×Isw= Vsw ×0= 0

switch closed

Psw

swI+

−swV

store & relax

PC = 0

store & relax

PL = 0

switch open

Psw = Vsw ×Isw= 0×Isw= 0

CL

Page 7: IC Design of Power Management Circuits (I)

Ki 7

Switching Converter: Heuristic Development (1)

LR

oV

ddV

LR

oV

ddV

1SW

o ddV V=

t

No regulation

o ddV DV=

t

Load cannot accept a pulsating supply voltageduty ratio = D

ddV

Page 8: IC Design of Power Management Circuits (I)

Ki 8

C LR

oV

ddV

L1SW

C LR

oV

ddV

L1SW

2SW

xV

Add a lossless filter to achieve small ripple voltage, but …when switch is off, inductor current cannot change instantaneously and cause spark (volt-second balance).

Add a second switch that operates complementarily to arrive at a functional switching converter.

o ddV DV=

t

ddV

Switching Converter: Heuristic Development (2)

Page 9: IC Design of Power Management Circuits (I)

Ki 9

Buck, Boost and Buck-Boost Converters (1)

C LR

oV

ddVL

xV

C LR

oV

ddV

LxV

C LR

oV

ddV L

xV

One L and one C gives a second order switching converter.

C has to be in parallel with RL for filtering, leaving three ways to place L, SW1 and SW2 between Vdd and RL .

Three types of converters:Step-down: buckStep-up: boostStep-up/down: buck-boost

(Boost-buck, or Cuk, is a 4th order converter)

Buck

Boost

Buck-boost

1SW

2SW

1SW

2SW1SW

2SW

Page 10: IC Design of Power Management Circuits (I)

Ki 10

Buck, Boost and Buck-Boost Converters (2)

C LR

oV

ddV

LNM

1D

xV

C LR

oV

ddV

L xV

C LR

oV

ddVL

xV

SW1 is the controlling switch that determines the duty ratio D, while SW2 provides a path for the inductor current i to flow when SW1 is off.

SW1 can be a power NMOS (MN ). If power PMOS is used, the phase has to be reversed.

To prevent i from going negative, SW2

is usually implemented by a diode (D1), but the forward drop gives a low efficiency.

Note that Vo of buck-boost is negative.

Buck

Boost

Buck-Boost

i

state 1

state 2

NMstate 1

state 2state 1

NM

state 2

i

i

1D

1D

Page 11: IC Design of Power Management Circuits (I)

Ki 11

I-V Relations of C and L

The I-V characteristics of a capacitor and an inductor are described by

= cc

dvi C

dt=

div L

dt

Approximations are very useful in many calculations:

Δ=

Δc

cV

i Ct

Δ=

Δi

v Lt

ci +

cv

+

v

i

For sinusoidal steady state, the phasor relations are:

= =ω

cc

c

v 1zi j C

= = ωv

z j Li

CL

Page 12: IC Design of Power Management Circuits (I)

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Volt-Second Balance

= ⇒ Δ = Δdi V

v L I tdt L

Switching actions cause ripples for both inductor current (i ) and capacitor voltage (vc). In the steady state, both quantities return to the same value after one cycle.

+ − v i

L

=11

V (S )m

L= −2

2V (S )

mL

1t(or DT)

2t(or D ' T)

Inductor current has to obey volt-second balance (VS balance):

V (S1)×t1 + V (S2)×t2 = 0

m1 t1 = m2 t2 or m1 D = m2 D’

It is used to compute the conversion ratio M = Vo /Vdd .

i

ΔII

0A

Page 13: IC Design of Power Management Circuits (I)

Ki 13

Inductor, Input, Switch, Diode and Tail Currents

Consider the buck converter:

C LR

oV

ddV

L

NM

1D

xVi

ddi

i

di

tisi

di

ti

si

ddici

Input current idd : current through Vdd

Switch current is : i in State 1

Diode current id : i in State 2; even if diode is implemented by NMOS switch

Tail current it : current through the combination of C and RL .

Capacitor current ic : ac part of tail current

Load current io : averaged tail current

oI

oI

Page 14: IC Design of Power Management Circuits (I)

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Continuous Conduction Mode

The converter is operating in continuous conduction mode (CCM) if the inductor current is always larger than zero.

Buck converter(Step-down)

m1 D = m2 D’⇒

(Vdd -Vo )D = Vo D’

⇒ = =0

dd

V M D

V

Boost converter(Step-up)

m1 D = m2 D’⇒

Vdd D = (Vo -Vdd )D’

⇒ = =−

0

dd

V 1 MV 1 D

Buck-boost converter(Step-up/down)

m1 D = m2 D’⇒

Vdd D = -Vo D’

−⇒ = =

−0

dd

V D MV 1 D

oVddV oVddV oVddV

+

−V

1S 1S

1S2S2S 2S+ −V + −V

Page 15: IC Design of Power Management Circuits (I)

Ki 15

Discontinuous Conduction Mode

When the switching converter is operation in CCM, one switching cycle has two states S1 and S2 . When the load current becomes smaller and smaller, eventually the inductor current would fall to zero, and the converter then operates in discontinuous conduction mode (DCM) with a third state S3 . During D3 T, all switches are open.

=11

V (S )m

L= −2

2V (S )

mL

DT

i

ΔI

2D T 3D T

=3V (S )0

L

=i 0

VS balance becomes:

m1 D = m2 D2

Page 16: IC Design of Power Management Circuits (I)

Ki 16

C LR

oV

ddVL1SW

2SW

xV

xC

When both switches are open, L, C and the parasitic capacitor Cx at Vx form a resonance circuit that leads to serious ringing.

Ringing Suppression

We may add a small switch to short the inductor when SW1 and SW2 are both off [Jung 99].

xV

i

C LR

oV

ddVL1SW

2SW

xV

xC

3SW

xV

i

oVddV

Page 17: IC Design of Power Management Circuits (I)

Ki 17

Pseudo-Continuous Conduction Mode

C LR

oV

ddV

L

1SW

2SW

xV

FWSW

By increasing the size of the ringing suppression switch, a switching converter may work in pseudo-continuous mode (PCCM). It was first employed in a single-inductor dual-output (SI-DO) converter to increase the current handling capability [Ma 03b]. When both SW1 and SW2 are open, the freewheel switch SWFW is closed to allow free-wheeling of i at Ipccm.

i

pccmI

i

0

Page 18: IC Design of Power Management Circuits (I)

Ki 18

Efficiency of Buck Converter

C LR

oV

ddV

L1S

η = =o o o

dd dd dd

P V IP V I

For an ideal buck converter working in CCM, the conversion ratio M is Vo /Vdd = D, and Io :Idd = 1:D, giving η=1. If conduction loss is accounted for, then Io /Idd is still 1/D, but M is modified as M=ηD, with

η = =+ +

+

o

s ddd

L

P 1R DR D'RP 1

R

ddI

R

dR

sR

2S

oI

Page 19: IC Design of Power Management Circuits (I)

Ki 19

Efficiency of 2nd Order Converters

By accounting for conduction losses due to switch, diode and inductor series resistance (Rs , Rd and R , respectively), the efficiencies of buck, boost and buck-boost converters are computed as [Ki 98]

Buck:

Boost:

Buck-boost:

η =+ +

+buck

s d

L

1R DR D'R

1R

η =+ +

+boost

s d2

L

1R DR D'R11

RD'

−η =+ +

+buck boost

s d2

L

1R DR D'R11

RD'

Page 20: IC Design of Power Management Circuits (I)

Ki 20

Performance Evaluation Parameters

For a good voltage regulator, the output voltage should remain constant even the input voltage, load current or temperature changes.

Steady state parameters:Line regulationLoad regulationTemperature coefficient

Small signal parameters:Power supply rejectionOutput impedance

Transient parameters:Line transient (settling times)Load transient (settling times)Reference tracking time

Page 21: IC Design of Power Management Circuits (I)

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Line Regulation

in mV / VΔ=

Δo

dd

Vline reg.

V

Line regulation is the change of Vo w.r.t. the change in Vdd :

Δ=

Δo o

dd

V / VV

in % / V

Switching converters are non-linear circuits for large signal changes, and hand analysis is impossible. It could be obtained by simulation. In datasheets, line regulation is usually measured.

Page 22: IC Design of Power Management Circuits (I)

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Power Supply Rejection

Power supply rejection (PSR) is the small signal change of Vo w.r.t. the small signal change in Vdd .

In transfer function form:

In dB:

Usually |vo /vdd | < 1, but we customarily give a positive PSR in dB.

Note: Line reg. ≈

PSR × ΔVdd

= o

dd

vPSR

v

= × dd

o

vPSR 20 log

v

For a good switching converter (also for bandgap reference and linear regulator), the output voltage should be a weak function w.r.t. the supply voltage. Hence, a small signal parameter, the power supply rejection, gives good indication of line regulation.

Page 23: IC Design of Power Management Circuits (I)

Ki 23

Load Regulation and Output Impedance

in mV /mAΔ=

Δo

o

Vload reg.

I

Load regulation is the change of Vo w.r.t. the change in Io :

Δ=

Δo o

o

V / VI

in % /mA

In datasheets, load regulation is usually measured.

In the small signal limit, load regulation is the output impedance:

= oo

o

dVR

dIΩin

Page 24: IC Design of Power Management Circuits (I)

Ki 24

Temperature Coefficient

Temperature coefficient (TC) is the change of a parameter X w.r.t. the change in T, and is a large signal parameter:

−Δ= =

Δ −2 1

2 1

X(T ) X(T )XTC

T T T

TC could be positive or negative.

oin [X] / C

Δ=

ΔX / X

Toin ppm / C

Page 25: IC Design of Power Management Circuits (I)

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PWM Voltage Mode Control (1)

S

RQ

Q

refVA(s)

EACMP

gV

oV

ckramp

L

CLR

1R

2R

obVav

av

PM

NM

A regulated switching converter consists of the power stage and the feedback circuit.

For a buck converter, if an on-chip charge pump is not available, then the NMOS power switch is replaced by a PMOS power switch.

avramp

ck

Q

Q

Page 26: IC Design of Power Management Circuits (I)

Ki 26

The output voltage Vo is scaled down by the resistor string R1 and R2 . The scale factor is b = R2 /(R1 +R2 ).

The scaled output voltage bVo is compared to the reference voltage Vref to generate a lowpass filtered voltage Va through the compensator A(s).

At the start of the clock, the SR latch is set and the switch MP is turned on, starting the duty cycle. A sawtooth waveform (ramp) synchronized with the clock ramps up.

When the ramp reaches the level of Va (trip point), the SR latch is reset, terminating the duty cycle.

When the SR latch is set, i ramps up. When the SR latch is reset, i ramps down. In the steady state, i returns to the same level at the start of every clock cycle.

PWM Voltage Mode Control (2)

Page 27: IC Design of Power Management Circuits (I)

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PWM Feedback Action

For stability, the control loop has to have negative feedback.

Assume Vo drops suddenly due to change in load or disturbance⇒

error voltage Verr = (Vref –bVo ) becomes larger⇒

Va = A(f)(Vref –Vo ) also becomes larger⇒

with a higher Va , it takes the ramp longer to reach Va⇒

duty ratio D is temporarily increased⇒

more current is dumped into the load⇒

Vo rises accordingly and eventually settles to the original value

Note that A(s) is the frequency response of the compensator, not of the op amp Aop (s).

Page 28: IC Design of Power Management Circuits (I)

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PWM Current Mode Control

S

RQ

Q

refVA(s)

EACMP

ddV

oV

ck

L

CLR

1R

2R

obVav

av

i

fi R

i /N

fNR

PM

NM

A current mode controlled switching converter is realized by replacing the fixed voltage ramp with the inductor current ramp.

ddVcurrentsensor

Page 29: IC Design of Power Management Circuits (I)

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Sub-harmonic Oscillation and Slope Compensation

Output of EA Va cannot change in one cycle. If inductor current is perturbed by an amount of ΔI1 , oscillation occurs if

Δ −= > ⇔ >

Δ2 2

1 1

I m1 D 0.5

I m

=a a fI V /R

Δ 1IΔ 2I

=a a fI V /R

Δ 1I Δ 2I

1m − 2m1m − 2m

To prevent oscillation, employ slope compensation by adding a negative slope to Ia (i.e., Va ) to suppress the change in ΔI2 .

Δ 1I Δ 2I

1m − 2m

− cm

=a a fI V /R

<D 0.5 >D 0.5

−Δ= < ⇔ >

Δ +c 22 2

c1 c 1

m mI m1 m

I m m 2

Page 30: IC Design of Power Management Circuits (I)

Ki 30

Current Mode PWM with Compensation Ramp

S

RQ

Q

refVA(s)

EACMP

ddV

oV

ck

L

CLR

1R

2R

obVav

i

i /N

fNR

PM

NM

V2I

ramp from OSCav

DT

1 c f(m m )R+ 2 c f(m m )R− −

bvbv

In practice, the output of EA (Va ) should not be tempered, and a compensation ramp of +mc is added to m1 instead.

compensationramp

ddV

Page 31: IC Design of Power Management Circuits (I)

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Synchronous Rectification

ddV

L

CLR

iPM

NM

To eliminate loss due to forward diode drop, the power diode is replaced by a power NMOS MN , and the scheme is known as synchronous rectification. To eliminate short-circuit loss of MP and MN , a break-before-make (BBM) buffer is used.

S

RQ

QBBM

Buffer

PV NV

PQ,V

NV

Q(ck) φ1

φ =2 NV

φ1

φ2

φ =1

PV

φ2Additional logic is needed for DCM operation. Non-overlapping φ1 and φ2

Page 32: IC Design of Power Management Circuits (I)

Ki 32

Multiple-Output Converters

L

1CL1R

o2V

1S

L

2CL2R

o1V

1i

2i 2i

1i

0S

2S

0S

ddV

Consider two boost converters that operate in deep DCM:

T 2T

T 2T

ddV

Page 33: IC Design of Power Management Circuits (I)

Ki 33

Single-Inductor Multiple-Output Converters

2C

o2V

L

L2R

i

0S

2S

ddV

1CL1R

1S o1V i

Time-multiplexing allows sharing one inductor and diverting the inductor current to two or more outputs [Ma 03a]:

T 2T

Page 34: IC Design of Power Management Circuits (I)

Ki 34

SIMO Converter in PCCM

2C

o2V

L

L2R

i

0S

2S

ddV

1CL1R

1S o1Vi

To handle large load currents, raise the inductor current floor to operate in PCCM. Add a free-wheeling switch (SFW ) to short the inductor when the inductor current reaches Ipccm [Ma 03b].

T 2T

i

T 2T

FWS

pccmI

Page 35: IC Design of Power Management Circuits (I)

Ki 35

SI-MIMO Converter

Energy-harvesting Boost 1 Rechargeable Boost 2 Loadsource battery

srcV

srcV

batV

batV

loadV

loadV

Energy-harvesting SI-DIDO boost Load Rechargeablesource battery

batV

Some applications need two converters in series with reduce efficiency.

Reorganize by using a SI-DIDO converter that needs only one inductor [Lam 04b], [Lam 07b], [Sze 08].

Page 36: IC Design of Power Management Circuits (I)

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Development of SI-MO and SI-MIMO Converters

The recent years sees active R&D activities of SI-MO and SI-MIMO switching converters for low power applications. It is important to recognize the contribution of the first developers.

The idea of SI-MO converters was first conceived in [Goder 97], and only boost sub-converters were considered.

An SI-DO converter with buck-boost sub-converters was discussed in [Ma 97] to demonstrate the switching flow graph modeling method.

SI-DO converters became commercial products [MAX 98, UCC 99].

The concept of SI-MO was reinvented [Li 00, Ma 00, Ma 01, May 01]. [Ma 01] stressed the importance of DCM operation for reducing cross-regulation. A systematic classification is discussed in [Ki 01].

DCM operation is extended to PCCM operation in [Ma 02].

The concept of SI-MIMO was conceived [Lam 04, Lam 07].

Page 37: IC Design of Power Management Circuits (I)

Ki 37

References: Switching Converter Fundamentals

Books:[Brown 01] M. Brown, Power Supply Cookbook, EDN, 2001.

[Erickson 01] R. W. Erickson and D. Maksimovic, Fundamentals of Power Electronics, 2nd Edition, Springer Science, 2001.

[Kassakian 91] J. G. Kassakian, M. F. Schlecht and G. C. Verghese, Principle of Power Electronics, Addison Wesley, 1991.

[Krein 98] P. E. Krein, Elements of Power Electronics, Oxford, 1998.

Papers:[Jung 99] S. H. Jung et. al., "An integrated CMOS DC-DC converter for

battery-operated systems," IEEE Power Elec. Specialists Conf., pp. 43–47, 1999.

[Ki 98] W. H. Ki, "Signal flow graph in loop gain analysis of DC-DC PWM CCM switching converters," IEEE TCAS-1, pp.644-655, June 1998.

Page 38: IC Design of Power Management Circuits (I)

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[Goder 97] D. Goder and H. Santo, “Multiple output regulator with time sequencing,” US Patent 5,617,015, April 1, 1997.

[Ma 97] Y. H. Ma and K. M. Smedley, "Switching flow-graph nonlinear modeling method for multistate-switching converters," IEEE Trans. on Power Elec., pp.854–861, Sept., 1997.

[MAX 98] "MAX685: Dual-output (positive and negative) DC-DC converter for CCD and LCD", Maxim Datasheet, 1998.

[UCC 99] "UCC3941: 1V synchronous boost converter," Datasheet, Unitrode Semiconductor Products, Jan. 1999.

[Li 00] T. Li, "Single inductor multiple output boost regulator," US Patent 6,075,295, June 13, 2000.

[Ma 00] D. Ma and W. H. Ki, "Single-inductor dual-output integrated boost converter for portable applications," 4th Hong Kong IEEE Workshop on SMPS, pp. 42- 51, Nov. 2000.

References: Early Development of SI-MIMO Converters (1)

Page 39: IC Design of Power Management Circuits (I)

Ki 39

[Ma 01a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A single-inductor dual-output integrated DC/DC boost converter for variable voltage scheduling", IEEE/ACM Asia South Pacific Design Automation Conf., LSI University Design Contest, pp.19–20, Jan. 2001.

[May 01] M. W. May, M. R. May and J. E. Willis, "A synchronous dual-output switching dc-dc converter using multibit noise-shaped switch control," IEEE Int’l Solid- State Circ. Conf., pp.358–359, Jan 2001.

[Ma 01b] D. Ma, W. H. Ki, P. Mok and C. Y. Tsui, "Single-inductor multiple-output switching converters with bipolar outputs", IEEE Int'l. Symp. on Circ. and Syst., pp. III-301 - III-304, Sydney, May 2001.

[Ma 01c] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "A 1.8V single-inductor dual-output switching converter for power reduction techniques," IEEE Symp. on VLSI Circ., Kyoto, Japan, pp. 137-140, June 2001.

[Ki 01] W. H. Ki and D. Ma, "Single-inductor multiple-output switching converters", IEEE Power Elec. Specialists Conf., Vancouver, Canada, pp.226–231, June 2001.

[Ma 02] D. Ma, W.H. Ki, and C.Y. Tsui, "A pseudo-CCM / DCM SIMO switching converter with freewheel switching", IEEE Int'l Solid–State Circ. Conf., San Francisco, pp.390–391+476. Feb. 2002.

References: Early Development of SI-MIMO Converters (2)

Page 40: IC Design of Power Management Circuits (I)

Ki 40

[Ma 03a] D. Ma, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor multiple-output switching converters with time-multiplexing control in discontinuous conduction mode," IEEE J. of Solid-State Circ., pp. 89-100, Jan. 2003.

[Ma 03b] D. Ma, W. H. Ki and C. Y. Tsui, "A pseudo-CCM/DCM SIMO switching converter with freewheel switching," IEEE J. of Solid-State Circ., pp. 1007- 1014, June 2003.

[Lam 03] Y. H. Lam, W. H. Ki, C. Y. Tsui and P. Mok, "Single-inductor dual-input dual- output switching converter for integrated battery charging and power regulation," IEEE Int'l. Symp. on Circ. and Syst., Bangkok, Thailand, pp. III.447-III.450, May 2003.

[Lam 04] H. Lam, W. H. Ki, C. Y. Tsui and D. Ma, "Integrated 0.9V charge-control switching converter with self-biased current sensor," IEEE Int'l Midwest Symp. on Circ. & Sys., pp.II.305–II.308, July 2004.

[Koon 05] S. C. Koon, Y. H. Lam and W. H. Ki, "Integrated charge-control single- inductor dual-output step-up/step-down converter," IEEE Int'l. Symp. on Circ. and Syst., Kobe, Japan, pp. 3071-3074, May 2005.

[Lam 07] Y. H. Lam, W. H. Ki and C. Y. Tsui, "Single-inductor multiple-input multiple- output switching converter and method of use," US Patent 7,256,568, Aug 14, 2007.

[Ma 09] D. Ma, W. H. Ki, and C. Y. Tsui, "Single-inductor multiple-output switching converters in PCCM with freewheel switching," US Patent 7,432,614, Oct. 7, 2008.

References: Early Development of SI-MIMO Converters (3)