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A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 1
GRID.pdf
Vis i t us at e-GRID.net
Upcoming Conferences
Apr 3-7: Embedded Systems Conference - San Jose Convention Center [more]
Apr 24-26: Symposium on Field-Programmable Custom Computing Machines Napa Valley Marriott [more]
May 8-11: International Symposium on Electronics and the Environment Hyatt Regency SF Airport [more]
May 21-24: IEEE Symposium on Security and Privacy The Claremont Resort, Berkeley [more]
June 4-9: Society for Information Display Symposium and Exhibition – Moscone Center, S.F. [more]
June 5-8: Thermophysics and Heat Transfer Conference with the Fluid Dynamics Conference and Exhibit– Hyatt Regency, S.F. [more]
June 11-16: IEEE Int’l Microwave Symposium Moscone Center, S.F. Sessions, Tutorials, Exhibits [more]
June 11-13: IEEE RFIC Symposium Moscone Center, S.F. Tutorials, Workshops, Sessions [more]
Calls for Papers: POFWorld – Plastic Optical Fibers (due Apr. 10) [more] CDNLive! – Cadence Designer Net (due Apr 14) [more]
April 2006OEB-PES- 3/28 | Panel: Update on Nuclear Energy in the United States - current issues and technologies today ... [more]
SCV-CE - 3/28 | Night of the Robots - demonstrations by the HomeBrew Robotics Club; autonomous machines ... [more]
SF-IAS - 3/28 | Automatic Transfer Switch Code and Application Considerations - the four modes of transfer switches ... [more]
SCV-Rel - 3/29 | Design for Warranty (DfW) Cost Reduction - trend toward customer self diagnostics and repair ... [more]
SCV-EMS - 3/29 | What Does Management Have to do with Innovation? + Design with Variability in the Nanometer Era ... [more]
SF-PES - 3/30 | Disaster Recovery Workshop - restoring electricit and other essential services after a natural disaster ... [more]
SCV-EMC -4/3 | Understanding and Avoiding EMC-Problems of LANs - simple equations to understand and avoid problems ... [more]
SCV-LEOS - 4/4 | Microscopic Ophthalmic Imaging with Adaptive Optics - ability to resolve single cells in living eyes ... [more]
SVEC - 4/6 | 2006 Technologies Driving Northern California Business - energy, cultural, control, biotech ... [more]
SCV-IMS - 4/6 | Sharc & TigerSharc DSP Technology and Applications - configuring for parallel processing ... [more]
SCV-SP - 4/10 | Correcting Distortion in Multi-media Audio Terminals - new compensation and novel loudspeaker model ... [more]
SCV-EDS - 4/11 | Modeling Impact of Layout and Process Variability on Devices for sub-90nm Technologies - sensitivity to variations [more]
SCV-CPMT+GOLD - 4/12 | Economics of Technology and the Engineering Career - an understanding of economic cycles ... [more]
SCV-MTT - 4/13 | Microwave Imaging - millimeter wave imaging system for personnel screening ... [more]
SCV-CAS - 4/17 | A High Performance, Low-Cost Ultra Wideband System - a chipset with 500 Mbps wireless connectivity ... [more]
SCV-Mag - 4/18 | Massive Information: Exploitation and Security - circumvent limits for storing/indexing audio, images, DNA data . [more]
SCV-Nano - 4/18 | Composite Organic-Inorganic Nanotags - a high-resolution molecular marker with signature-encodable shell ... [more]
SCV-CNSV - 4/18 | The World Through the Eyes of an Inventor - applying for and winning an SBIR grant ... [more]
SCV-EMB - 4/19 | Integrated Systems for Adaptive Radiation Therapy - integrating imaging and delivery capabilities ... [more]
SCV-SSC - 4/20 | Circuit Technologies for Multi-Core Processor Design - examples from Intel dual-core processors ... [more]
OEB-ComSoc - 4/20 | Visions from a Global Carrier's "Crystal Ball" - Metro-WiFi, IP telephony, WiMAX vs cellular ... [more]
SCV-IMS - 5/4 | Worldwide Nanometrology Standards Efforts - current standards-setting bodies and what is in-process ... [more]
SCV-LEOS&EDS - 5/9 | Nanoscale Imaging of Semiconductor and Biological Systems - beyond standard optical microscopy ... [more]
SF-PES - 5/11 | Annual Spring Banquet; Future of the Transmission Business - special evening at the Monte Cristo Cafe ... [more]
SCV-CAS - 5/15 | A Fast Stochastic Integral Equation Solver to Model Rough Surface Effects - accounting for imperfections... [more]
CPMT Half-Day Technical Seminar Advanced IC Packaging Technologies - Tuesday, April 4, AM - Crowne Plaza Hotel, SJ [more]
Naval Postgraduate School: Technology Review and Update [more] - April 18-21, 2006 - Monterey
Soft Computing & Intelligent Fault Diagnosis- May 2-4 at NASA Research Park, Moffett Field [more]
UC Berkeley Extension - Summer Engineering Institute:Developing FPGA Digital Signal Processing Systems June 19 & 20, Downtown S.F. [more]
Professional Skills Classes for April, May [more]
Support our advertisers MARKETPLACE – Services page 3 RAMAC Historical Milestone page 2 Conference Calendar page 39
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 2
Your Networking Partner ®
April 2006 • Volume 53 • Number 4
IEEE-SFBAC ©2006
IEEE GRID is the monthly newsmagazine of the San Francisco Bay Area Council of the Institute of Electrical and Electronics Engineers, Inc. As a medium for both news and opinion, the editorial objectives of IEEE GRID are to inform readers in a timely and objective manner of newsworthy IEEE activities taking place in and around the Bay Area; to publish the official calendar of events; to report on IEEE activities of a national and international scope; and to serve as a forum for comment on areas of concern to the engineering community by publishing contributed articles, invited editorials and letters to the editor. IEEE GRID is published as the GRID Online Edition
residing at www.e-GRID.net, and in a handly printable GRID.pdf edition, and also as the e-GRID sent by email twice each month to more than 24,000 Bay Area members and other professionals.
Editor: Paul Wesling IEEE GRID 12250 Saraglen Dr. Saratoga CA 95070 Tel: 408 331-0114 / 510 500-0106 / 415 367-7323 Fax: 408 904-6997 Email: edi tor@e-gr id.net www.e-GRID.net
An IEEE Historical Milestone
Mike Ross (IBM Communications), Curtis Jones (SJSU), Dave Bennet (IBM Quarter Century Club), Tom Coughlin (SCV Section), Al Hoagland (Magnetic Disk Heritage Center), Laura Guio (IBM), Roger Hoyt (SCV Chapter, Magnetics Society) On Jan. 27, 2006, IEEE Milestone and ASME Landmark plaques honoring the creation of the world's first hard-disk drive at this location some 50 years ago were affixed to the building at 99 Notre Dame Avenue by City of San Jose workers. (The building is now a family court for the Superior Court of Santa Clara County.)
On this site, IBM researchers devised and created the first magnetic hard-disk drive – the IBM RAMAC. It had 50 disks (each disk was two FEET in diameter) and a total data-storage capacity of 5 megabytes. This may seem very small now, but at the time this was a huge innovation. It led to today's multi-billion-dollar data storage industry (led by companies such as IBM, Hitachi, Seagate, Western Digital, EMC, etc.). Continued improvements in disk drives -- pioneered by IBM in San Jose for more than four decades -- allowed computer users to access and work with more and more data as their computers increased in capability.
Download and watch the CBS Channel 5 News broadcast and see the RAMAC (ramac.wmv, 6 MB video file, requires Windows Media Player)
Roger Hoyt , Program Chair, SCV Magnetics Society Chapter
NOTE: This PDF version of the IEEE GRID – the GRID.pdf – is a monthly publication and is issued a few days before the first of the month. It is not updated after that. Please refer to the Online edition and Interactive Calendar for the latest information: www.e-GRID.net
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M A R C H 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 3
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Mixed-Signal IC Development
• From Inception to Production Transfer • Turnkey, Design Services & Consulting • Design Reviews & TroubleShooting
Mixel, Inc. Excellence in Mixed Signal Design
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Ozen Engineering (408) 732-4665
[email protected] www.ozeninc.com
Board Logic Systems
Complete Product Solutions Provider TM
Experienced consultants in the fields of: • Board & Verilog Design • Debug and Test • Signal Integrity • EMI • Power Electronics • Layout • Software Development • Documentation
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pioneered Reliability IntegrationSM - using multiple tools in conjunction to increase the power and value of any Reliability Program.
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EMC – Product Safety
US & Canada
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valontechnology.com
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A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 4
During “Microwave Week,” with the IMS, RFIC and ARFTG conferences, there will be over 1000 technical presentations in the form of plenaries, technical sessions, special/focused sessions, poster sessions, panel sessions, and workshops plus a student paper contest and historical exhibits. These will provide many opportunities to network and interact with the leading professionals in the field, master new skills, and learn about advanced developments in our field. The exhibition gives you the opportunity to visit displays from more than 400 companies that will be showing the latest products and services available to our industry.
Come join us as we create the “Bridge to the Future.”
11 Tutorials, including: Introduction to UHF RFID: Readers, Tags and ICs High Speed Digital Signal Integrity Fundamentals of HF Through UHF Design Introduction of MEMs Resonators and Filters Techniques of Frequency Synthesis Ferrite Devices for Low Frequency Applications
32 Workshops, including: Advances in Multi-Mode Multi-Band Radio Transceivers Quality of Automotive RF Systems UWB for Wireless Communications, Positioning and Sensing Passive and Active Differential Measurements Frequency Agile Radio: Systems and Technologies Noise in SiGe and III-V HBTs and Circuits Frequency Agile Radio: Systems and Technologies Technology and Applications of Wireless Sensor Network How Accurate are Your THz Measurements
Five Focus Sessions: Microwaves in Support of Societal Security 4 GHz for Mobile Communications Magnetic Resonance Imaging Vibrating RF MEMS THz Integrated Circuits
This year there were 980 abstracts submitted to the 32 technical program committees and more than 230 reviewers. After careful review, the committee selected 364 papers for oral presentations, and 137 for the Interactive Forum.
60 Technical Sessions, including: • GaN for Microwave • Advances in Integrated Filters • Solid State High Power Amplifiers • Couplers and Baluns • Microwave Photonics • Acoustic Filters and Applications • RF MEMS Tunable Components • Applications in RF MEMs • MEMs Switch and Packaging Technology • Compact Dividers and Couplers • Low Noise Components • Synthesis and Design Techniques for Microwave Filters • Time Domain Modeling • Physical Nonlinear Device Modeling • Microwave CAD with Neural Networks and Fuzzy Logic • Antenna Technologies for Emerging Wireless Applications • Practical Realization of Microwave Filters • Planar Filters with Extended Stopband • Measurement-based Modeling • Signal Generation for System Applications • Multi-GHz ICs for Communication • Multiband and Broadband Planar Filters • Ferrite & Ferroelectric Devices • Low Phase Noise Oscillators • Electromagnetic Bandgap and Synthesized Structures • Phased and Retrodirective Arrays • Nonlinear Circuit Analysis and System Simulation • Miniature Filters and Multiplexers • Active Components for Millimeter-wave Applications • Effective CAD Techniques for Modeling and Design • Wideband Communication and Radar Systems • Efficiency Enhancement and Linearization Technology • Biological Effects and Medical Applications • Device Technologies for Signal Generation • Novel Approaches in Packaging Technology
Exhibits: Tuesday and Wednesday, 9:00 AM – 5:00 PM Thursday, 9:00 AM – 3:00 PM Separate Exhibits Pass available ($20)
Full details in the 80-page IMC-2006 Program, available as a PDF on the website:
www.ims2006.org
Reduced rates are offered for advance registration when received by May 5, 2006. Students, retirees and IEEE Life Members receive a substantial discount
Take BART to the Powell Street Station and the Moscone Convention Center
2006 IEEE MTT-S
International Microwave Symposium
San Francisco June 11-16, 2006
Friday, June 16: 67th ARFTG Microwave Measurement Conference
Organized by the Automatic RF Techniques Group (ARFTG) Technical papers describing original work in the design and measurements of high power devices and systems
For technical program details, visit: www.arftg.org
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The RFIC Symposium brings focus to the technical accomplishments in RF systems, circuit, device and packaging technologies for mobile phones, wireless communication systems, broadband access modems, radar systems and intelligent transport systems.
It builds upon its heritage as one of the foremost IEEE technical conferences dedicated to the latest innovations in RFIC development of wireless and wire line communication IC’s, with an exciting technical program. Running in conjunction with the International Microwave Symposium and Exhibition, the RFIC Symposium adds to the excitement of Microwave Week with three days focused exclusively on RFIC technology and innovation.
The Plenary Session will be held on Sunday evening at 5:30 PM, following the workshops. Three students will be recognized for their work as part of the best student paper competition. Then, three leading experts will share their own views during the Sunday evening plenary session (details at right). The RFIC reception will follow the plenary session to allow for everyone to relax and discuss the industry outlook among friends. The regular technical program begins on Monday and Tuesday featuring invited and submitted technical papers.
Tuesday Evening Post-Session Activities: • Rump Session
James Rautio will talk on “The Life of James Clerk Maxwell”
• Women in Engineering Reception • Student Reception • Ham Radio Social Exhibits:
Tuesday and Wednesday, 9:00 AM – 5:00 PM Thursday, 9:00 AM – 3:00 PM Separate Exhibits Pass available ($20)
19 Sunday Tutorials and Workshops, including: • CMOS RFIC Design – Fundamental Building Blocks • RFICs for Ultra-wideband Systems • Advanced Power Amplifier ICs for High Efficiency Mobile Transmitters •Noise Measurements and Modeling for CMOS Plenary Session: RF-Modems the Real Application for RF CMOS,
Stefan Wolff, Vice President RF-Engines, Infineon Technologies
Architectural Implications of multimode, multiband cellular radios, Kent Heath, Director, Cellular Operations, Radio Products Division, Freescale Semiconductors
Multiple Antenna Technology in Mobile Broadband - New Challenges for RF Designers, Arogyaswami Paulraj, CTO, Beceem Communications and Professor, Stanford University
Technical Sessions: • Cellular ICs • Frequency Generation • WLAN & MIMO • VCOs and Dividers • UWB LNAs • RFIC Technology • Next Gen LNAs • WLAN Power Amplifiers • PLLs and Synthesizers • Silicon-based Millimeter-wave Front Ends • Wireless Remote Sensing & RFID • UWB Transcever ICs • CMOS Front-Ends • Passive Components and Matching Advances • Wideband Communication System & ICs • Advanced Noise Characterization and Modeling • RFIC Simulation and Layout Optimization • Cellular Bands Power Amplifiers • Advanced ICs for Optical Communications • Poster Papers Advance Registration rates through May 5th.
Substantial discount for students, retirees and IEEE Life Members. Download the 80-page Advance Program from the website:
www.rfic2006.org
Take BART to the Powell Street Station and the Moscone Convention Center
Sponsored by the IEEE MTT-S, EDS, and SSCS
2006 IEEE Radio Frequency Integrated Circuits Symposium Moscone Convention Center, S.F.
June 11-13, 2006
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The IEEE S&P Symposium is the premier forum for presenting developments in computer security and electronic privacy, and for bringing together researchers and practitioners in the field. Topical areas covered:
• Anonymity and Pseudonymity • Biometrics • Distributed Systems Security • Denial of Service • Language-Based Security • Electronic Privacy • Peer-to-Peer Security • Database Security • Security Verification • Information Flow • Access Control and Audit • Data Integrity • Mobile Code and Agent Security • Malicious Code • Secure Hardware and Smartcards • Security Protocols • Intrusion Detection • Network Security • Authentication, including Phishing • Automated and Large-Scale Attacks • Commercial and Industrial Security • Security of Mobile Ad-Hoc Networks Half-Day CPMT Chapter Seminar:
• Tuesday, April 4, 2006 • 8:30 AM – Noon (registration at 8 AM)
Speaker: Joe Fjelstad, SiliconPipe
The line between the IC package and the printed circuit board was once very sharp and well defined. However, over the last few years that line has blurred as product developers attempt to put more function into ever-decreasing sizes. Packaging technology has now attained virtual parity in importance with the IC chip itself.
This course will guide participants though the world of IC packages and will include a review of some of the most recent innovations. Attendees will better understand not only what packaging choices and options are available, but also how they are built, their strengths and their weaknesses. Tutorial topics will include: IC packaging origins and options, assembly processes, flip chip and wire bonding, chip scale and wafer-level packaging, stacked technologies, test and reliability issues, the impact of lead-free requirements on IC package assembly, and new and evolving IC packaging concepts.
Sponsored by the IEEE Technical Committee on Security and Privacy
In cooperation with the International Association for Cryptologic Research
The Symposium will be held in its traditional location at the Claremont Resort, in Berkeley, "one of the few hotels in the world with warmth, character and charm" according to Frank Lloyd Wright.
Paper sessions are presenting 23 high-quality full papers and 9 extended abstracts.
Abstracts for short (5-minute) talks are now being accepted. See the website for details about submission dates (deadline: April 10).
For full Program details, and to register:
www.ieee-security.org
Student travel grants made possible through the generosity of the IBM Corporation.
• Half-day Topical Seminar • Crown Plaza Hotel, 282 Almaden Blvd, San Jose
(across from SJ Convention Center) • Take Light Rail to the Convention Center station • Includes admission to exhibits at Embedded Systems
Conference and D2M (see pages 11-12 ) Who Should Attend: PCB designers, product engineers, development engineers, manufacturing engineers and others needing a better understanding of advanced IC packaging technologies. Fee: $85 for IEEE Members, $110 for non-members
(After Friday, March 31: $95/$125) For more information, and to register:
www.cpmt.org/scv/courses/icpkg.html
Further details: Farhad Akhavan, Intel, at farhadak2 @ yahoo.com
27th annual
2006 IEEE Symposium on Security and PrivacyThe Claremont Resort Berkeley
May 21-24, 2006
Advanced IC Packaging Technologies
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 7
The SID International Symposium, Seminar and Exhibition, now in its 44th year, is the premier international gathering of scientists, engineers, manufacturers and users in the electronic-display industry. The event provides access to a wide range of technology and applications from high-definition flat-panel displays using both emissive and liquid-crystal technology to the latest in OLED displays and large-area projection-display systems. One can find state-of-the-art information on the latest in image processing, systems software and display processor hardware, human factors and applied vision, and exciting new applications such as multimedia and the electronic cinema.
With more than 550 booths and 7,500 attendees, SID is the leading North American show for the electronic-display industry.
Events at SID this year:
Business Conference (Mon & Tues, June 5 & 6) Presentations at the Conference will be given by the highest-level executives of the leading display industrial organizations. A networking reception will be held on Monday evening and the Conference will include the SID 2006 Keynote Addresses on Tuesday morning and continue the rest of the day. Investors Conference (Tues & Wed, June 6 & 7) Company presentations from leading public and private display companies, intended to appeal primarily to securities analysts, portfolio managers, investors, M&A specialists, and display company executives. Display Technology Seminars (Mon, June 5) These twelve 90-minute seminars on diverse topics related to the information display field are held on Monday, June 5. Registering for the Display Technology Seminars entitles you to attend any combination of seminars. Exhibition Tuesday, June 6 10:30 AM - 6:30 PM Wednesday, June 7 9:00 AM - 5:00 PM Thursday, June 8 9:00 AM - 2:00 PM
Sunday Short Courses Fundamentals of Flexible Flat-Panel-Display Technology
Gregory Crawford, Brown University Fundamentals of Display Optics
Pochi Yeh, University of California Santa Barbara Fundamentals of MEMs-Based Displays
Jeff Sampsell, QUALCOMM MEMS Technologies Fundamentals of Vision and Color Science
Louis Silverstein, VCD Sciences, Inc.
Tutorials Active-Matrix-Addressing Technologies for Flat-Panel Displays
Norbert Fruehauf, University of Stuttgart Liquid-Crystal Technology for Display Applications
Phil Bos, Liquid Crystal Institute Emerging Display among Giants
Kimberly Allen, iSuppli Corp. High-Resolution Displays: Path to What the Eye Demands
Mark Fihn, Veritas et Visus LCD Backlighting
Kalil Kalantar, Nippon Leiz Flat-Panel-Display Measurements
Ed Kelly, NIST
Separate registration is allowed for the Workshops and Tutorials
Technical Sessions 72 sessions of invited and contributed papers with over 280 oral presentations and 200 poster presentations, including: OLEDs: Materials; Blue-Emitting; Device Structures; AMOLEDs Projection: Components; Digital Cinema; Laser, Mobile Projection Active Matrix: Organic TFTs; Mobile TFT-LCDs; Flexible;
Integrations; Si-Driven Integration; LCD TV Emissive: Plasma Displays & TV; Phosphors, Discharges and
Cell Structures; Protecting Layers; Manufacturing Electronics: Interfaces; Color, Gamma Control; Processing Applied Vision: Color, Luminance, Contrast; Image Quality Systems: 3-D; Power Savings; Backlights; Motion Blur Manufacturing: Roll-to-Roll; Inkjet; Inspection & Repair Liquid Crystal: VA Mode; Wide Viewing Angle; Alignment;
Fast Switching; Projection … and more! See the Advance Program.
For complete information on SID ’06, please see the
SID’06 website: www.sid2006.org
Early-Bird Rates through May 19
Take BART to the Powell Street Station and the Moscone Convention Center
Society for Information Display INTERNATIONAL SYMPOSIUM, SEMINAR & EXHIBITION
JUNE 4-9, 2006
MOSCONE CENTER, SAN FRANCISCO
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TOPICAL AREAS: • Internet Security – Opportunity or Oxymoron • Information Systems, Operations and Strategies • Integrated Circuits • Microelectromechanical Systems (MEMS) & Nanotechnology • Web-based 3D Modeling and Simulations for
Unmanned Systems • Military Satellite Communications Technology • Satellite Communication Technologies and Trends • New Product Development and New-to-the-World Products • Electro-Optical and Infrared Systems • Tour of Selected NPS Laboratories (tentative)
• Space Systems Laboratories • Virtual Reality Laboratory
FCCM is a forum for presenting new research on reconfigurable computing -- the use of field-programmable technologies for high performance and/or low energy computation. Topics presented at FCCM cover a wide variety of subjects related to custom computing, including architecture of reconfigurable computing devices and systems; languages and tools; applications of reconfigurable computing; possible forms and system implications; and novel use of reconfigurability.
Sponsored by the IEEE Computer Society
FCCM student registration fees for 2006 have been subsidized by generous donations from Xilinx, Inc. and Altera Corporation, with the assistance of Simplicity, Inc.
Hosted by : The Naval Postgraduate School, Monterey, CA
Cost : $800 (checks only, no credi t cards) Includes all sessions, tours, refreshments, and Tuesday dinner
Registrat ion : Joel le Davi, 831- 656-2948 [email protected]
Register on-line through March 31!
For fu l l schedule , module out l ines , and ins t ruc tors , Vis i t the TRAU webs i te :
www.sp.nps.navy.mil/trau/
Sessions at FCCM’06
• Supercomputer Applications • Methodology and Tools • Data Generation and Processing • Hybrid Systems • Multi-Processor/Multi-Threaded Systems • Graph Algorithms • Power and Energy Optimization • Network Technology • Biomedical and Cryptographic Applications • Arithmetic Components
Vendor/Researcher/Innovator Demo Night On Monday evening participants are welcome to bring
their wares for display. This function is intended for FCCM hardware and software demonstrations, and there is no exhibition fee. Please preregister to demo your product.
The Final Program is posted at the FCCM website:
www.fccm.org
Early-bird registration through March 30th. Add the FCCM dates to your calendar!
Symposium on Field-Programmable Custom Computing Machines
April 24-26 2006 Napa Valley Marriott
Technology Review and Update A Short Course for Technical Personnel and Decision Makers
Four Days – April 18 through April 21, 2006 Held at the Naval Postgraduate School, Monterey
This annual 4-day short course is designed for civilian, military, and government technical personnel and decision makers interested in refreshing and updating their knowledge in important technical areas. The success and popularity of this short course is ensured through recruiting of outstanding experts from industry, academia and the government and by constantly fine tuning the contents.It provides an excellent overview and stresses the more practical aspects of the topics discussed.
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 9
Soft Computing and Intelligent Fault
Diagnosis A 3 Day Short Course May 2-4, 2006
NASA Research Park Moffett Field, CA
Soft computing methods may be used to design intelligent systems on the basis of knowledge expressed in natural language. This methodology, which includes Fuzzy Logic, Neural Networks, and Genetic Algorithms, permits the processing of both symbolic and numerical information. Fuzzy logic has been applied to control trains (Sendai subway), elevators, household appliances, cameras, and manufacturing processes. In combination with Neural Networks techniques, fuzzy-logic methods may be used to design robust adaptive control systems.
The presentations in this course will discuss the application of soft computing and neural networks techniques to the design of fuzzy and hybrid neuro-fuzzy systems. At the completion of this course, you will understand the benefits of this technology, you will know about its successful applications, and you will develop the knowledge necessary to design and apply fuzzy logic to your particular needs.
This intensive 2-day course provides introductory and state-of-the-art coverage on the design and implemen-tation of FPGA signal processing systems. The emphasis is on the use of FPGAs for digital communications. The course presents a combination of signal processing theory, FPGA architecture, and datapath design.
Topics covered: • current generation FPGAs • digital filters • multirate filters • building transform processors • adaptive filters • adaptive channel equalizers • symbol timing recovery • carrier removal • DDC, DUC, FEC • sigma-delta modulation • implementing FPGA DSP design using VHDL • visual dataflow methodologies
Design techniques are presented that emphasize silicon-efficient and high-performance FPGA implemen-tations of the various signal processing topics addressed in the course.
Who Should Attend: Signal processing engineers and scientists planning on implementing signal processing systems using programmable logic, and logic/hardware engineers involved with the implementation of FPGA-based signal processing platforms.
Topics (full details on website) Intelligent Fault Diagnosis (Days 1-2) A New Direction in Systems Analysis – from
Computation with Measurements to Computation with Perception (Day 3, AM)
Adaptive Fuzzy Logic Inference (Day 3, PM)
Instructors Professor Lotfi Zadeh, UC-Berkeley Dr. Hamid Berenji, Computational Sciences Division of NASA Ames Research Center Prof. George Vachtsevanos, Georgia Tech
Registration Registration Fee: $995 The registration fee includes tuition, a full copy of the notes, and refreshments during the breaks.
For full details, and registration form, please visit the website:
www.iiscorp.com/courses
Intelligent Inference Systems Corp Mail Stop 566-109, NASA Research Park Moffett Field, CA (650) 965-9365
Two-Day Short Course June 19 and 20 Monday-Tuesday, 9 AM-5 PM
UC Berkeley Extension Downtown Center 425 Market St., 8th Floor, San Francisco
Credit: 1.4 CEU Tuition: $1295 Instructor: Chris Dick, Ph.D., is the director of signal processing engineering at Xilinx, responsible for coordinating the DSP IP engineering activities, and chief DSP architect at Xilinx.
For full course outline and registration details:
www.unex.berkeley.edu/cat/course109.html
Take BART to the Montgomery Street Station. Paid parking also available in the basement of 425 Market.
Another course of interest
Applications of Digital Signal Processing
Saturday, June 17 Redwood City
www.unex.berkeley.edu/cat/course618.html
Developing Field Programmable Gate Array (FPGA) Digital Signal Processing Systems
A course in the Berkeley Summer Engineering Institute (BSEI) 2006
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 10
Cadence Designer Network
CDNLive! 2006
Save the date: September 12-14 in San Jose
CDNLive! is a global series of technical conferences that bring electronics designers and engineers using Cadence technologies and services together for face-to-face interactions. The Cadence Designer Network, the worldwide organization of Cadence customers, and Cadence are sponsoring the three-day event in Silicon Valley September 12-14, 2006 at the San Jose Marriott and the San Jose Convention Center. The organization has issued a call for papers, with a Friday, April 14, 2006 deadline for submitting abstracts. If you submit your abstract by the due date, you will be entered into a drawing for a new Video iPod (one giveaway per conference track).
Attendees will meet the best and brightest in the electronics industry, both decision makers and technology luminaries. Don't miss your opportunity to learn fresh approaches and develop innovative strategies and tactics to meet your design challenges. Submit a paper –share your experiences and offer insights on key technical and industry issues.
Suggested Topics: Functional verification Track: • Hardware/software co-verification • Verification planning and management • Verification methodology • Verification IP reuse and platform-based design • Assertion-based verification • Testbench development and automation • Formal analysis • Simulation and debug/analysis • Emulation and acceleration • Verification languages and standards IEEE Professional Skills Courses
Creative Problem Solving – Date/Time: Tues, April 11, , 9 AM – 5 PM – Location: LSI Logic, Milpitas
Fee: $375 for IEEE Members; $425 non-members
Clear Business, Technical, and E-mail Writing
– Date/Time: Thurs, April 13, 9 AM – 5 PM – Location: Sybase, Inc, Dublin – Fee: $375 for IEEE Members; $425 non-members
Presentation Skills – Date/Time: Tues, April 25, 9 AM – 5 PM – Location: LSI Logic, Milpitas – Fee: $450 for IEEE Members; $500 non-members
Leadership Skills – Date/Time: Wed, April 26, 9 AM – 5 PM – Location: Exar, Fremont
Fee: $375 for IEEE Members; $425 non-members
CALL FOR PAPERS Abstracts Due April 14th Digital IC Design Track • Synthesis with RTL and SystemVerilog • Formal & assertion-based verification • Timing, constraints, verification • Design for test/yield/manufacturing • Hierarchical layout, prototyping, and planning • Post-placement timing closure
Custom IC Design Track • Deep submicron, high-frequency challenges/solutions • Voltage drop/electromigration • Physical automation and optimization • Modeling and characterization • Physical verification • Mixed-model/mixed-signal simulation and analysis • Full custom floorplanning • Circuit optimization
Silicon-Package-Board Co-design Track • Front-end design capture • Constraint-driven design • Library and data management • Design for manufacturing and testability • Interactive and automatic routing • Signal and power integrity analysis • Simulation model development • IC package design and analysis • Silicon-package co-design
Plus additional topics
For additional details, visit:
www.cadence.com/cdnlive
Questions? Email [email protected] or call +1-415-277-3280 SCV Chapters, Engineering Management & Components, Packaging and Manufacturing Technology Societies
Getting Things Done Across Organizational Borders
– Date/Time: Thurs, May 11, 9 AM – 5 PM – Location: Exar, Fremont – Fee: $375 for IEEE Members; $425 non-members
High-Impact Communication – Date/Time: Tues, May 16, 9 AM – 5 PM – Location: Carl Zeiss Meditec, Dublin
Fee: $350 for IEEE Members; $425 non-members
Improve your skills – register for one of these classes, or for others coming up this spring. Bring a team!
For complete course information, schedule, and registration form, see our website:
www.EffectiveTraining.com
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The 9th AIAA/ASME Thermophysics and Heat Transfer and Conference includes papers covering all aspects of heat transfer and thermophysics. Topics range from basic research and development to applied and advanced technology, including novel experimental and computational observations, interdisciplinary papers that bridge theoretical, experimental approaches and papers that provide innovative concepts and analyses. More than 50 sessions and 300 papers are planned that include areas in aerothermal design, ablation, high speed flows, boiling and condensation, conduction and convection heat transfer, heat pipes, radiation heat transfer, microscale/nanoscale heat transfer, measurements of thermophysical properties, and thermal control of spacecrafts. Panel discussion groups will be pertinent to heat transfer and aerospace related issues. Invited speakers will consist of a mix of experimentalists and theoreticians. An invited presentation by the recipient of the Thermophysics Award is planned for the conference.
PROGRAM
300 papers in 50 sessions, including: • Environmental Heat Transfer • Heat and Mass Transfer in Bioengineering • Electronics Packaging and Cooling • Boiling and Condensation • Ablation • High Speed Flows • Energy Transfer in Combined Energy and Power Systems • Thermal Protection Systems • Microscale and Nanoscale Heat Transfer • Computational Heat Transfer • Convection Heat Transfer • Experimental Heat Transfer • Heat Pipes • Phase Change Heat Transfer • Thermophysical Properties • Heat Exchangers • Convection Heat Transfer
Exhibits: Monday, June 5: 5:30 – 7:00 PM Reception Tuesday, June 6: 10 AM – 5 PM Wednesday, June 7: 10 AM – 4 PM
The 36th AIAA Fluid Dynamics Conference includes papers covering all aspects of fluid dynamics, particularly those relevant to aerospace applications. Topics range from basic research and development to applied and advanced technology, including novel experimental and computational observations, interdisciplinary papers that bridge theoretical, experimental, and numerical approaches, and papers that provide innovative concepts and analyses, especially new insight into flow physics.
PROGRAM 240 papers in 40 sessions, including: • Biological and Biologically Inspired Flows • Analysis and Modeling • Laminar Instability and Transition • Turbulent Boundary Layer Scaling • Circulation Control Applications • Multidisciplinary Fluid Mechanics • Boundary Conditions for Complex 3D Flows • MEMS and Microfluidics • Unsteady Flows
Professional Development Courses (2 days each) • Stability and Transition: Theory, Modeling,
and Experiments • Fundamentals of Satellite Thermal Control • Hypersonic Test Facilities • Specialist’s Course on Flow Control • Modern Design of Experiments • CFD Drag Prediction Workshop
REGISTER TODAY!
Special low student, retired rates!
For full information on both events:
www.aiaa.org
Earlybird registration deadline: May 8th – save $100
AIAA/ASME Joint Thermophysics and Heat Transfer Conference
June 5-8, 2006
Co-located with the 36th AIAA
Fluid Dynamics Conference & Exhibit June 5-8, 2006
Hyatt Regency San Francisco
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The ISEE/SUMMIT is the premier event for presenting and learning about environmental topics and sustainability as they pertain to the life-cycle of electronic products and the electronics industry across the fields of medical devices, vehicles, material handling and construction equipment, games, telecommunication devices, and consumer electronics. The program for this year’s event has more than ever - including:
The ISEE technical conference tracks will have 15 sessions with 70 high quality papers selected by a committee of industry and academic experts. One track will have traditional ISEE sessions spanning topical areas from design, to end-of-life, and public policy. This year there will also be a special track on emerging technologies.
The SUMMIT track will have 4 sessions including several interactive forums with industry leaders – as well as 2 technical ISEE sessions with additional selected papers on electronics recycling topics.
The conference program will also have Guest Speaker and Plenary panel sessions for all attendees.
The Exhibits program will include recyclers, manufacturers, service providers and related organizations.
Two special networking events will be held – including one off-site on Wednesday evening.
And there will again be a number of organization meetings held in conjunction with the event. Tutorials June 20 | Conference June 21-22, 2006 Santa Clara Convention Center
The only trade show for Plastic Optical Fibers that covers all aspects of the business – technology, markets and applications – coming to Santa Clara in June. Plan to attend and participate.
Proposals for presentations should include: Paper/ presentation title, Author(s)' Name(s) and Affiliation(s), Abstract, Mailing address, and E-mail address.
Please send all correspondence and submissions to:
Dr. Paul Polishuk, President, at [email protected] Informat ion Gatekeepers Inc . 320 Washington Street , Sui te 302 Boston, MA. USA 02135
Tutorials and Short Courses:
• Brominated Flame Retardants: Science, Regulation, and Public Policy
• EcoDesign Tools and Strategies for Electronics • Maximizing Returns on Materials • Best Practices for Export
Technical Sessions: 15 sessions (over 60 papers) including • Green Manufacturing • Nanotechnology • Material Recovery • Energy Generation and Supply • Small Tech Manufacturing • Recycling of Wireless Devices • Green Engineering Education • Design for Environment and Energy Efficiency • Economic Models • Industry Outlook, Trends • Ethical Issues • Collection Programs
Earlybird rates through April 18th; special student, retired rates.
Register on the website:
www.iseesummit.org
Call for Papers – Abstracts Due
April 10th www.pofworld.com
Abstracts are st i l l being sol icited for the 2006 POFWorld in Santa Clara, in the fo l lowing areas:
Technology: • Fibers • Cables • Connectors • Transceivers • Media conver ters • Switches • Couplers • WDM systems • Standards • Data l inks • Software design tools
Applicat ions • Automotive (MOST and IDB 1394) • Home Networks • Industr ia l Controls • Aerospace • Medical • In terconnects • Building Wir ing • Consumer Electronics • Home Theaters • Sensors
May 8-11, 2006 Hyatt Regency San Francisco Airport
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Panel: Update on Nuclear Energy in the United States
Speakers: Dr Jane Long, the Associate Director of
Energy and Environment for the Lawrence Livermore National Laboratories; Dr. Jasmina Vujic - Professor of Nuclear Engineering, UC-Berkeley; and others
Sponsorship: jointly sponsored with the Association of Energy Engineers
Time: 6:00 PM - 8:30 PM Cost: $5 for IEEE/AEE/PES members,
$15 others Place: Scott's Seafood in Jack London Square in
Oakland Further Information: Carole Pharr, 408-282-1500
x213 RSVP: To Carole Pharr, [email protected] Web: not available
Dr Dave McCallen, Lawrence Livermore National
Laboratories; and Dr. Jasmina Vujic, Professor of Nuclear Engineering, UC-Berkeley.
Current U.S. Nuclear Power Plants produce some of this country's most economical power based on the relatively low cost of nuclear fuel, but there have been no new orders for nuclear power plants in the U.S. since the Three Mile Island accident in 1979. This could all be changing now. With about 20% of the world's electricity supply comes from nuclear power plants, energy demand increasing, and petroleum costs are rising, President Bush has said that he wants to see increased emphasis on nuclear energy in the U.S., including starting construction of new power plants by the end of the decade. On December 30, 2005 the Nuclear Regulatory Commission (NRC) certified the design of a new reactor, the first certification in years. Has the technology progressed to the point where concerns over safety and waste disposal can be addressed?
On Tuesday March 28th come listen to what our experts have to say about this. Presented by the IEEE Oakland East Bay Chapters of Power Engineering Society and Nuclear Plasma Society as well as the Association of Energy Engineers (AEE), we welcome Dr Dave McCallen of LLNL and Dr Jasmina Vuljic of UC Berkeley as they present a panel discussion on the state of Nuclear Energy. The meeting is to be held at Scott's Seafood in Jack London Square from 6:00pm to 8:30pm, appetizers and no host bar will be provided. If you wish to attend please RSVP (see information at left). Cost is $5 for members and $15 for non- members -- fee waived if you sign up to be a member at the meeting.
TUESDAY MARCH 28OEB Power Engineering & Nuclear and Plasma Sciences
ANSYS Channel Partner
• Multiphysics, Multidisciplinary Engng • CFD, Stress, Heat Transfer, Fracture • Fatigue, Creep, Electromagnetics • Dynamics, Design Optimization • Linear/Nonlinear Finite Element Analyses
Ozen Engineering (408) 732-4665
[email protected] www.ozeninc.com
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SCV Consumer Electronics
Night of the Robots Speakers: over a dozen HomeBrew Robotics Club
members will show off their creations Time: Networking and pizza at 6:30 PM;
Presentations/demos at 7:00 PM Cost: IEEE Member $5, non-IEEE member $10 Place: Oak Room at HP Cupertino, on Wolfe and
Pruneridge, 19447 Pruneridge Avenue (Building 48), Cupertino
RSVP: Please reserve by email to [email protected]
Web: www.ieee.org/scvce
While robots have long been used for industrial
applications and have recently begun coming into homes as toys and small single function devices doing such diverse household tasks as vacuuming and mopping floors, there has long been a community of dedicated hobbyists building robotic devices and extending our knowledge of how to create and control autonomous machines. The Bay Area is the home of a dedicated group of robotic hobbyists, the HomeBrew Robotics Club (HBRC). Come see, hear and touch the creations and inventions of a select group of these local robot hobbyists as they describe the various engineering principles and control issues in creating automomous robotic mechanisms. Consumer robots like these will revolutionize our lives and serve and entertain us in the near future.
Presenters and Demonstrators:
Wayne Gramlich: HBRC Introduction; Intermodule Bus project and RoboBricks2
Camp Peavy: "Springy Thingy" Burning Man ARTBot; ROBOMagellan Robot "Rusty"; PROTOBot and the TABLEBot Challenge
Bob Allen and Ted Larson with "OLogic": Balancing Robots and "Follow Me"
Cesar Barrientos: Walter the android (maybe) SERVOMan (perhaps)
Dave Calkins: Robotics Society of America; Robotics SFSU; Robo-One demo
Dan Miller: MAX low-cost rover developed by CMU-West George Warner: Heathkit 2000 with custom DOS Al Margolis: Hobby Engineering; The Business of Robotics Brandon Blodget: Something "Interesting" Ingolf Sanders: Object Recognition Chris Palmer: ZenBot Randy Hootman: Java, Linux and Robots Dave Wyland: R1A1; A Reasonable Machine George Taylor: "Jif" a PIC-based TABLEBot.
TUESDAY MARCH 28
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Automatic Transfer Switch Code and Application Considerations
Speaker: Dave Morse - ASCO Power Technologies Time: Social at 5:30 PM; Presentation at 6:00 PM,
Dinner at 7:00 PM Cost: $25 (pay at door) Place: Sinbad's Restaurant, Pier 2 The
Embarcadero, San Francisco RSVP: Email [email protected] for reservations and
to qualify for the drawing Web: www.e-grid.net/docs/0603-sf-ias.pdf
Dave Morse is the District Manager for ASCO Power Technologies in the Northern California District. He has been with ASCO for 27 years in various manufacturing, marketing, product management, sales, and sales management positions. His experience includes the application and development of distribution switchgear, generator control switchgear, transfer switchgear, and electrical controls. Dave's current focus is on emergency and standby power plus distributed generation applications utilizing generator paralleling switchgear and automatic transfer switches. He has been in his current position for eight years. Dave holds a Bachelor's degree from St. Mary's College of California and is an Associate Member of IEEE.
This presentation on automatic transfer switches
will review the requirements of the codes and standards applicable to transfer switches, as well as discuss the four modes of transfer switches and their applications. It will include an examination of the differences between conventional transfer switches and bypass/isolation transfer switches, three-pole versus four-pole design applications, and a discussion of ground fault and motor load transfer considerations for automatic transfer switches.
TUESDAY MARCH 28SF Industry Applications
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 16
Design for Warranty (DfW) Cost Reduction
Speaker: Bob Mueller, OPS A La Carte and the
Marisan Group Time: 6:30 PM - Refreshments;
7:00 PM - Presentation Cost: none Place: HP-Cupertino Oak Room, Bldg 48,
Pruneridge Avenue (near Fwy 280 & Wolfe Rd), Cupertino
RSVP: not required Web: www.ewh.ieee.org/r6/scv/rs
Bob Mueller is a senior consultant/program manager at both OPS A La Carte and the Marisan Group. He is a product development professional with 30+ years of technical and management experience in software-intensive product development as well as in R/D process and quality systems development including extensive consulting experience with cross-functional product development teams and senior management. After receiving his M.S. in Physics in 1973, Bob joined Hewlett-Packard in Cupertino in IC process development. In the next three decades before leaving HP, he held numerous positions in R/D, R/D management and technical consulting including management positions in the computer, analytical, and healthcare business units and in HP's internal engineering consulting organization. For the past half decade Bob has focused his consulting on both product development and product support processes and practices that drive warranty costs and customer satisfaction.
Warranty costs for the computer and other high tech industries were greater than $6.2 billion in 2004. Less than 35% of that was material costs; the majority was related to support process costs. Consequently, product design teams are being challenged to reduce the warranty costs by both improving product reliability (AFR) and designing in less expensive warranty support processes (i.e., customer self diagnostics and repair). This talk, based on a 1 day seminar, will introduce a proven warranty event cost model and supporting methodologies that help teams identify warranty cost reduction solutions which integrate both component fail rate reduction strategies and strategies that shift the support process mix to less expensive processes. The warranty cost model constructs the cost of warranty events from both event frequencies and the specific support process costs used to resolve each event. Case studies will be presented describing how teams used this model to: analyze warranty costs by event type, prioritize what events needed cost reduction options, and develop cost saving estimates for each prioritized event. We will explore and practice using methods to rank the feasibility of proposed design options by identifying all diagnostic tools, product features and support tools/capabilities needed to realize its potential cost savings. Finally, how these models and tools integrate with FMEA and other reliability planning tools will be explored.
Valon Technology, LLC
valontechnology.com
RF and Wireless Product Design & Development
- System Engineering - Test & Measurement - Schematic Capture & PCB layout- Expert Witness
Redwood City (650) 369-0575
WEDNESDAY MARCH 29SCV Reliability
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 17
What Does Management Have to do with Innovation?
and Design with Variability in the
Nanometer Era Speakers: John Levy; and Xi-Wei Lin, Director of
R&D, Synopsys Inc. Time: Forum at 6:00 PM, Dinner at 7:00 PM,
Presentation at 7:45 PM Cost: $25 (IEEE member), $30 (non member),
$10 (Student IEEE members) Place: Ramada Inn, 1217 Wildwood Ave (Fwy
101 frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please reserve by March 24th on the website
Web: www.ieee-scv-ems.org John Levy has over 20 years experience as
consultant and engineering manager in high-tech industries. He managed a 27-person group at Quantum responsible for hardware interface development, firmware validation tools, disk drive performance prediction; improved product reliability by establishing orderly bug-tracking and firmware testing in a complex product development environment; managed operating systems development for a major computer manufacturer, including a US/UK development team; and built a complete discrete-event simulation system for modeling multi-processor computers. He has served as an expert witness in patent cases related to computer hardware, software, and Internet protocol, and is a technical advisor to U.S. District Court judges.
Xi-Wei Lin is Director of R&D at Synopsys Inc., developing design-for-manufacturing products. He has over 10 years of experiences in both chip design and semiconductor manufacturing. Prior to Synopsys, Lin held management and senior engineering positions in various companies, including VLSI Technology Inc., Philips Semiconductors, LSI Logic, Silicon Access Networks, and Micron Technology. He came to the industry, after working as a Staff Scientist at Lawrence Berkeley National Laboratory in the field of materials science and engineering. Lin published over 60 papers and holds more than 30 U.S. patents. He received his B.S. degree in electronics from Beijing University, and M.S. and Ph.D. degrees in solid state physics from University of Paris.
Forum Talk (before dinner) What is management’s role in innovation?
Innovation is not about managing constraints and tracking progress, but is about creating products that appeal to new classes of customers. We think of innovative products as breakthrough products, but often we can create such products by making slow and steady progress in size, speed and cost. • There are three domains of activity for a manager
that are critical for effective development: • Inwardly-focused activity, related to maintaining
well-functioning teams and individuals; • Outwardly-focused activity, related to creating
teams, communicating and removing roadblocks; • Upwardly-focused activity, related to managing
expectations of your bosses and your teams;
Drawing on over 30 years of management experience in development organizations, John will tell us what he has learned about when to “get out of the way,” when to “get our way” and when to “get in the way” while managing development organizations.
After-Dinner Presentation:
After a brief review of the current DFM solutions, this presentation focuses on three areas: a) TCAD based modeling that brings process
parameters into spice models, enabling direct communication between manufacturing and design.
b) Stress proximity effects which cause design variability and require better modeling.
c) The complexity of interconnect variations in timing analysis.
WEDNESDAY MARCH 29SCV Engineering Management
Professional Consulting Services to assist clients in developing & executing any and all elements of Reliability throughout an Organization & Product Life Cycle.
• Assessments • Goals • Benchmarking • Reliability Prog. Plans • MTBF Pred • FMECA • EOL Assessment • Warranty Analysis • HALT/HASS • DVT/V&V • Rel. Demo. Tests • Software Reliability • CAPA/CLCA • DoE • Training/teaching • RoHS/WEEE Transition
pioneered Reliability IntegrationSM - using multiple tools in conjunction to increase the power and value of any Reliability Program.
(408) 472-3889 [email protected] www.opsalacarte.com
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Disaster Recovery Workshop
Speakers: Thomas Siegel, PG&E; Stig Nilsson, Exponent; Cole Emerson, KPMG; Greg Suhr, SF-PUC; and others
Time: Registration at 7:30 AM, program from 8:15 AM - 4:00 PM
Cost: $125 members, $150 non-members Place: Milton Marks Conference Center,
455 Golden Gate Avenue (Lower Level), San Francisco
RSVP: to Michael Bachiller, [email protected], Tel 415.972.5822
Web: ewh.ieee.org/r6/san_francisco/pes
7:45 – 8:15 AM: Breakfast 8:15 – 8:20 AM: Opening Remarks 8:20 – 9:50 AM: PG& E’s Disaster Action Plan
Electricity has become so fully incorporated into our daily and professional lives that the only time we notice it is when it is not available. We expect that electricity will be available upon demand. To meet this expectation, electric utility professionals must be prepared to respond when the unexpected happens. Someday, somewhere a blackout will occur and the utility dispatchers and operators may need to restore service to millions of customers. This talk will review the restoration process and pitfalls and the decisions that dispatchers need to make as well the priorities that help drive the decision process.
10:00 – 11:30 AM: Overview of Earthquake Related Effects on Electric Power System
A discussion of the risk for earthquake damage to the major (bulk power) transmission system, and some examples about design features that increase the risk for major equipment damage and long duration outages. A Utilities’ primary needs before a disaster hits.
-Disburse spare parts inventory -Reconfige the Electric Transmission System -Secure advance helicopter service -Back up plan for communications system
11:30 – 12:30 noon: Lunch
12:30 – 2:00 PM: Business Continuity Planning –More Challenges to Come?
In today's business environment, utilities face significant risks that may impact delivery and business process optimization. Nationwide, energy executives are assessing risks that could result in business interruption and/or financial loss, and implementing appropriate mitigation strategies and enterprise-wide business continuity plans (which include crisis management and emergency response processes). This presentation will discuss the compliance requirements for having business continuity plans, what energy firms are currently doing to comply with existing regulations, and what benchmark studies indicate regarding the current state of business continuity management in large utilities.
2:10 – 3:40 PM: City and County of San Francisco’s Disaster Recovery Plan
A discussion of San Francisco’s Emergency Preparedness from both a Police Department and Water Utility perspective. The presentation will include:
• What was done in the past? (Loma Prieta Earthquake of 1989)
• Preparations in the post 9/11 era. We try to answer the question, “Where we would
be if a calamity happens tomorrow?”
3:40 PM: Closing Remarks
Parking: There is an existing underground pay parking facility at the site. Attendees are encouraged to use public transportation (Muni or Bart)
THURSDAY MARCH 30SF Power Engineering
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Understanding and Avoiding EMC-Problems of LANs
Speaker: Dr. Heyno Garbe, University of Hannover,
Germany (and EMC Society Distinguished Lecturer)
Time: Social 5:30 PM, Presentation 7:00 PM (NOTE: Not standard Tuesday evn this month)
Cost: none Place: Applied Materials Bowers Cafeteria, 3090
Bowers Ave., Santa Clara RSVP: not required Web: www.scvemc.org
Dr. Heyno Garbe received his Dipl.-Ing. and Dr.-Ing. degree in Electrical Engineering from the University of the Federal Armed Forces, Hamburg, Germany, in 1978 and 1986 respectively. Currently he is a Professor at the University of Hannover, Germany. In 1986 he joined Asea Brown Boveri Research Center, Switzerland. There he was involved in research activities on TEM-waveguides, the numerical calculation of electromagnetic fields, and other EMC related topics. Since 1992 he has been with the University of Hannover where he holds a professorship in the faculty of electrical engineering and computer science. He has developed an active research program related to electromagnetic field effect modeling, testing, and measurement as applied to EMC. Prof. Garbe is also very active in several EMC related national and international standardization committees. He has authored and coauthored more than hundred articles in books, journals or on conferences.
The increasing use of high-speed data
transmission causes a lot of discussion about the real or mythical interference from these new systems. Some people claim a lot of problems by talking about Power Line Communication (PLC) for example. Other people dealing with ISD, DSL systems never heard about problems. European claim that shielded cables are the only safe way to transport the data. What's right and what's wrong? This talk may give answers to these questions. First some EMC fundamentals with respect to LANs will be presented. The goal is that the use of some simple equations may lead to understanding and avoidance of EMC problems. Then the EMC effects of typical mistakes like improper installation or mechanical damage will be discussed. Last but not least the EMC properties of modern LANs will be presented.
MONDAY APRIL 3 (switched from our normal Tuesday)
SCV Elecromagnetic Compatibility
MET Laboratories
EMC – Product Safety
US & Canada
• Electromagnetic Compatibility • Product Safety Cert. • Environmental Simulation • Full TCB Services • Design Consultations • MIL-STD testing • NEBS (Verizon ITL & FOC) • Telecom • Wireless, RFID (BQTF & EPCglobal Test Lab)
Facilities in Union City, Santa Clara
www.metlabs.com [email protected] 510-489-6300
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 20
Microscopic Ophthalmic Imaging
with Adaptive Optics Speaker: Prof. Austin Roorda, University of California,
Berkeley Time: Networking and Pizza Social at 7:00 PM,
Presentation at 8:00 PM Cost: none Place: National Semiconductor Credit Union
Auditorium, 955 Kifer Road, Sunnyvale RSVP: Required; please reserve by email to
[email protected] Web: www.ewh.ieee.org/r6/scv/leos
Austin Roorda received his Ph.D. in Vision Science and Physics at the University of Waterloo in Ontario, Canada. As a postdoctoral research fellow at the University of Rochester, he utilized the world's first ophthalmoscope equipped with adaptive optics to measure the properties of photoreceptors in living human eyes. By combining adaptive optics imaging with retinal densitometry, he was able, for the first time ever, to map the trichromatic cone mosaic. He moved to the University of Houston in 1998, where he developed the Adaptive Optics Scanning Laser Ophthalmoscope (AOSLO), which is an instrument that provides dynamic, high-resolution microscopic imaging of living retina. Applications of this new instrument range from 3-dimensional imaging to the direct and noninvasive measurement of blood cell velocity in retinal capillaries.
Austin Roorda is on the executive committee of the NSF Center for Adaptive Optics and holds two research grants from the National Institutes of Health. He is the recent recipient of two major awards; the Irving M. and Beatrice Borish Outstanding Young Researcher Award from the American Academy of Optometry and the Excellence in Research and Scholarship Award (Assistant Professor level) from the University of Houston. Since January, 2005 Austin Roorda has been and Associate Professor and holds the Solon M. and Pearl A Braff Chair in Clinical Optometric Sciences at the University of California Berkeley School of Optometry.
The ability of ophthalmoscopes to resolve single cells in living eyes is hampered by the blur in the images caused by aberrations in the eye's optics. However, the application of adaptive optics into ophthalmoscopes in the last decade has overcome these limitations and a new generation of ophthalmoscopes are being developed that can image eyes with unprecedented resolution and contrast.
To date, AO systems have been used successfully for microscopic imaging using both flood-illuminated and scanning-laser imaging modalities. Flood-illuminated systems obtain high-quality, high-resolution single-frame snapshots of the retina, while adaptive optics scanning laser ophthalmoscopy (AOSLO) is capable of imaging at high frame rates as well as performing optical sectioning of the retina.
The presentation will include the latest performance properties of AO ophthalmoscopes, and discuss them within the context of their potential applications, which include visualization of photoreceptors, optical sectioning and direct measurement of blood flow. An expanded application of AOSLO is to project AO-corrected stimuli directly onto the retina simultaneously with retinal imaging, which facilitates a broad range of applications, from single cone psychophysics to microperimetry.
At present, AO instruments are in the hands of only a handful of investigators. The talk will close with a discussion of our efforts to make AO technology more accessible by making systems smaller, more efficient and more economically viable.
TUESDAY APRIL 4SCV Lasers and Electro Optics
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 21
Sharc & TigerSharc DSP Technology and Applications
Speaker: Alan Leek, Field Applications Engineer,
Analog Devices Time: Networking at 7:30 PM, Presentation at
8:00 PM Cost: none Place: Cogswell College (Room 197), 1175
Bordeaux Drive, Sunnyvale RSVP: to David Rivkin, [email protected] Web: www.ewh.ieee.org/r6/scv/ims
The Sharc and TigerSharc DSPs provide high-
performance digital signal processing and can be configured for parallel processing for today's most complex instrumentation and measurement needs. Sharc/TigerSharc architecture, development and example applications will be presented.
FRIDAY APRIL 6SCV Instrumentation and Measurement
Digital Chip Design Services
ASIC Design • EDA Evaluation • Verilog HDL • Synthesis • Design for Visibility • Timing • Scan • Verification • Low Power techniques • Power Analysis • BIST • DFT • ATPG • Silicon Debug
Testable logic for high-volume production with low DPM
Contact Mahesh Siddappa ME (CS, India), MS (EE, SUNY at Stony Brook)
[email protected] 408-981-6612
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 22
Correcting Distortion in Multi-media Audio Terminals
Speaker: Dr. Kevin Lashkari, DoCoMo USA Labs Time: Fast foot at 6:30 PM, presentation at
7:00 PM Cost: $1 donation for food Place: National Semiconductor Credit Union
Building (Building 31), 955 Kifer Rd., Sunnyvale
RSVP: not required Web: www.ewh.ieee.org/r6/sps
Dr. Lashkari has over 25 years of experience in industry, academia and management and has held senior positions in research and management in a number of companies in Silicon Valley. He was an executive research engineer at DoCoMo USA Labs and currently serves as a consult to the Lab. He holds a number of patents related to nonlinear signal processing and speech coding and has published papers in international conferences and professional journals. He has organized and chaired sessions in international conferences and served as advisor to Ph.D. students and postdoctoral fellows. He is a member of IEEE, the Acoustical Society of America and the American Institute of Physics. He received his Masters and Ph.D. degrees from Stanford University in 1977 and 1981 respectively and is the co-founder of the Silicon Valley Technical Institute, Inc.
Future multimedia terminals such as videophones will be used at almost an arm's length from the speaker and require high quality sound at high playback levels. Small loudspeakers in mobile devices introduce severe linear and nonlinear distortions into the sound at high sound volumes. To enable high quality multimedia services signal processing methods are needed to compensate for the distortions of the electroacoustic conversion. Conventional approaches use a predistortion filter placed between the audio signal source and the loudspeaker. The predistortion filter is based on the p-th order inverse of the Volterra model of the loudspeaker. The p-th order inverse is computationally very intensive and does not result in an exact inverse. A new compensation method based on the exact nonlinear inverse and a novel model of the loudspeaker are introduced. It is shown that the Volterra-Wiener-Hammerstein model of the loudspeaker lends itself to having an exact inverse and is a closer match to the loudspeaker response. An experimental setup involving hardware and software was developed to evaluate the performance of the new techniques as well as those reported in the literature using real loudspeakers and perceptual metrics. The initial results with real loudspeakers are consistent with the predictions and result in significant improvement in the sound quality
MONDAY APRIL 10SCV Signal Processing
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Modeling Impact of Layout and Process Variability on Devices
for sub-90nm Technologies
Speaker: Dr. Dipu Pramanik, Synopsis Time: Pizza social at 6:00p PM Presentation at
6:15 PM Cost: none Place: National Semiconductor Corp. Building 31
Large Auditorium, 955 Kifer Road, Sunnyvale
RSVP: not required Web: www.ewh.ieee.org/r6/scv/eds
DIPU PRAMANIK is currently Group Director for
TCAD DFM Solutions at Synopsys. He is responsible for developing DFM tools that link the process, device and interconnect simulations back to advanced Design tools. Dr Pramanik has 24 years of experience in the semiconductor industry with a broad experience in Process and Design Technology. He was at VLSI Technology for 13 years where he held senior management positions in Technology Development and Product Development. At VLSI he was responsible for introducing several generations of Technology starting from 1.5um down to 0.15um and was intimately involved in every aspect, from Process Development through to Advanced Design flows. Dipu Pramanik has a Ph.D. in Physics from Cornell University, has more than 90 publications and 37 issued patents.
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As feature sizes continue to scale with technology,
transistor electrical characteristics become more sensitive to layout and process variations. Some of this sensitivity is captured empirically by running test structures and process splits in the manufacturing line. The data can be encapsulated into "preferred" design rules or SPICE process corner models. But this may not be adequate given the wide variety of circuits and designs that may be ported to the technology. It is important to be able to capture the physics leading to the variability and relate it back to measured or controlled process parameters such as RTA temperatures, halo implant dose etc or to layout parameters such as distances of edges within layers and across layers. In turn these dependencies have to be captured into models that can be used by existing CAD tools so that the designer is able to assess the impact of variability on the performance of his circuit. We describe methodologies that use detailed calibrated TCAD simulations to understand the source of variability and build a new CAD framework around standard device models and existing design tools. One example deals with the layout variability arising from mechanical stress due to different process layers. The second example considers how to model device variability due to fluctuations in key front end process steps.
TUESDAY APRIL 11SCV Electron Devices
Bernie Siegal
650-961-5900
[email protected] www.thermengr.com
Device Thermal Characterization Package Thermal Characterization Thermal Test Boards Thermal Test Equipment & Fixtures
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 24
Economics of Technology and the Engineering Career
Speakers: Dr. Dan Donahoe and Dr. Michelle
Poliskie, Exponent. Time: Seated dinner served at 6:30 PM,
Presentation (no cost) at 7:30 PM Cost: $25 if reserved by April 9; $30 at the door Place: Ramada Inn, 1217 Wildwood Ave (Fwy
101 frontage road, between Lawrence Expy and Great America Pkwy), Sunnyvale
RSVP: Please reserve and pay in advance using our PayPal on-line system or email Janis Karklins, [email protected]
Web: www.cpmt.org/scv Dr. Daniel N. Donahoe is a Managing Engineer in
Exponent’s Mechanical Engineering and Materials/Metallurgy practice. He has over twenty-five years of experience. Prior to joining Exponent he had been employed at Lockheed, Motorola, Ford Aerospace, Teledyne, Compaq Computer and Iomega, and the University of Maryland’s industry and government sponsored CALCE, Electronic Products and Systems Center. His functional assignments include work as a design engineer, reliability engineer, thermal engineer, manager, technologist, and scientist.
In military electronics he worked on electronics exposed to extreme environments ranging from the high acceleration loads of gun launch to thermal challenges faced in life support, and the design of radar systems. In addition to electronic products exposed to exotic environments, he has worked on cost-driven commercial electronics products such as cooling of computer components. He has worked on integrating rack and stacked electronics into facilities. His electronic packaging analysis skills include thermal analysis, stress and dynamics analysis, and failure analysis. His Ph.D. dissertation on ceramic capacitors included failure analysis work using modern tools of failure analysis including the environmental scanning electron microscope (ESEM™), electron backscatter diffraction (EBSD), and focused ion beam (FIB). Dr. Donahoe worked on several industry standards related to electronics..
As prospective college grads, or as members of the IEEE affinity group called Graduates of the Last Decade (GOLD), you must have invested time thinking about your engineering career choices. Obviously, you picked a degree program and an institution. Next you either have, or will soon, scout for jobs. You will search for jobs within technologies (and business sectors) you feel offer the greatest career benefits to you. Within a given sector you will have to find a firm that matches your interests and desired job security. No doubt you have read about the demise of some big firms with long histories of success, and also you have watched some newer firms disappear (often by acquisition) after enjoying meteoric growth.
After you settle down in a position, you have to manage your early career. You will choose assignments that offer opportunities to master skills and enhance your future opportunities. Eventually, within the firm, you must decide if you want to work in a technical role or move into a business role. In facing all these decisions, you are acting based on an understanding of business and economics. For most engineers, our source of business and economics information is our family, our peers and the press. However, the scientist in you is probably feeling uncomfortable with business wisdom so often presented from these sources. If you have taken a first course in Economics, you may have walked out of the final exam feeling disappointed with the paltry tools provided. This talk will help you build confidence to set a course in our stormy Tech Economy. Biographies (cont)
Dan served as an Associate Editor of the IEEE Transactions on Components and Packaging Technologies for seven years. Upon return to California, he is beginning service on the Silicon Valley Administrative Committee for the IEEE Components and Packaging Technologies Society’s SCV Chapter. He has served as a teaching assistant for an intermediate heat transfer course (University of Illinois), an instructor for high school physics (Judge Memorial Catholic High School), for junior college courses in basic electronics and in statistics (Maricopa County Junior Colleges), and for a graduate course on sensors (University of Maryland).
WEDNESDAY APRIL 12SCV GOLD & Components, Packaging & Mfng Technology
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 25
He is the Secretary for IEEE's CPMT Santa Clara Valley Chapter.
Dan's MS in Mechanical Engineering is from University of Illinois at Urbana, with his PhD from the University of Maryland; he also earned an MBA from Santa Clara University, and is a Registered Professional Engineer in Arizona and California.
Dr. Michelle Poliskie is an Engineer in
Exponent’s Mechanics and Materials practice. Dr. Poliskie specializes in the chemical structure and properties of non-metallic materials, with an emphasis on plastics and elastomers. Her synthetic skills and extensive knowledge of materials characterization techniques have been applied to solve problems related to the identification of degradation pathways and kinetics, optimization of small molecule synthesis, and development of devices to monitor polymer deformation. Most recently, Dr. Poliskie has employed spectroscopic techniques to link macroscopic deformation mechanisms to molecular-level behavior and kinetics. She has specific experience with polymer nanocomposites, elastomers, inorganic crystals, and photolithographic films. Prior to joining Exponent, Dr. Poliskie participated in a variety of collaborations with researchers in government, academic and industrial laboratories. She has assisted with technical and business aspects of a start-up company. Her BA in Economics, and in Chemistry (with honors) is from Grinnell College, with her PhD from MIT in polymers; she was the recipient of a National Research Council fellowship. She is a member of the American Chemical Society and the Materials Research Society
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 26
Microwave Imaging for Personnel Screening
Speaker: Marty Neil, Agilent Technologies, Inc Time: Social at 6:00 PM, Presentation at 6:30 PM Cost: none Place: SC12-Auditorium, Intel Corp., 3600 Juliette
Lane, Santa Clara RSVP: not required Web: www.mtt-scv.org
Martin Neil received his M.S.E.E. degree from Stanford University, and began his career as a Member of Technical Staff in Bell Telephone Laboratories in Holmdel, New Jersey. Joining Hewlett Packard (now Agilent Technologies) in 1973, he has held various marketing and general management positions, and more recently has led numerous internal new business ventures. He is currently the general manager of the millimeter wave imaging venture within Agilent Laboratories
Millimeter wave imaging system for personnel
screening: scanning 10^6 points a second and using no moving parts. In this talk we describe Agilent’s novel millimeter wave imaging system. This system is an active coherent system, working at 24GHz, and using planar programmable RF-lens. The system is capable of producing real-time movies without processing latency. Moreover, due to the planar nature of the lens, and its compact form, the footprint of the system is very small. The fact that it is monochromatic assures minimal spectral occupancy resulting in an imaging system well suited to personnel screening. The RF-lens, which lies at the heart of the proposed system, is a passive RF element, capable of focusing RF energy into small volumes within its field of view through a mechanism that changes the phase of the impinging wave on the lens-surface. This enables one to scan image voxels (Volume pixels) in front of the lens. Since the phase change can be rapidly switched electronically, more than 10^6 voxels are scanned per second. Sample images will be shared
Events at Microwave Week’06 in San Francisco:
THURSDAY APRIL 13SCV Microwave Theory and Techniques
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 27
A High-Performance, Low-Cost Ultra-Wideband System
Speaker: Rajeev Krishnamoorthy, TZero Time: Snacks at 6:30 PM, Presentation at 7:00 PM Cost: none Place: Cadence Design Systems, Building 5,
2655 Seely Avenue, San Jose RSVP: not required Web: ewh.ieee.org/r6/scv/cas
Rajeev Krishnamoorthy has spent many years
working on the development of novel, advanced communications systems. Prior to founding TZero, Rajeev was at Iospan Wireless, where he was responsible for developing the first commercially available multiple-antenna (MIMO) wireless systems. Rajeev spent the early years of his career at Bell Labs (AT&T/Lucent/Agere). Part of his tenure was at the wireless LAN division in the Netherlands, where he co-invented and developed the high-speed version of the system that resulted in the 802.11b (Wi-Fi) standard. Rajeev received his BS from Caltech and his PhD from Cornell.
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This talk will give an overview of Tzero UWB
chipset and system. TZero has built an all-CMOS chipset which reliably delivers 500 Mbps wireless connectivity. The solution provides exceptionally long range, high robustness to interference, and high link reliability and availability in order to support high-bandwidth video, audio, and data networking.
MONDAY APRIL 17SCV Circuits and Systems
Mixed-Signal IC Development
• From Inception to Production Transfer • Turnkey, Design Services & Consulting • Design Reviews & TroubleShooting
Mixel, Inc. Excellence in Mixed Signal Design
(408) 274-2736 [email protected] www.mixl.com
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 28
Massive Information: Exploitation and Security
Speaker: Prof. Ronald S. Indeck, Distinguished
Lecturer, Washington University (St. Louis) Time: Cookies & Conversation at 7:30 PM,
Presentation at 8:00 PM Cost: none Place: KOMAG, 1710 Automation Parkway,
San Jose RSVP: not required Web: www.ewh.ieee.org/r6/scv/mag
Ronald S. Indeck received the B.S.E.E., M.S.E.E., and Ph.D. degrees from the University of Minnesota. He is a Founder and Technical Advisor to Exegy, Inc. He was a National Science Foundation Research Fellow at Tohoku University in Sendai, Japan. Since 1988 he has been in the Department of Electrical Engineering at Washington University in St. Louis, where he is the Das Family Distinguished Professor and Director of the Center for Security Technologies. He has published more than 50 peer reviewed technical papers and has been awarded more than 20 patents. He has received the National Science Foundation Presidential Young Investigator Award, the Missouri Bar Association’s Inventor of the Year Award, the IBM Faculty Development Award, the Washington University Distinguished Faculty Award, the IEEE Centennial Key to the Future Award, and the IEEE Young Professional Award.
Indeck is a Fellow of the IEEE and a member of the American Physical Society. He is on the board of the Federal Bureau of Investigation’s InfraGard program. He has served several international conferences and was co-chairman of the 2002 International Magnetics Conference. He has served as an editor of IEEE Transactions on Magnetics and as president of the IEEE Magnetics Society. Indeck currently consults for industry and government, and leads research in projects of recording physics, magnetic devices, security, and data mining in massive databases.
Magnetic information technologies have enabled the amount of data stored last year to increase, by some estimates, by nearly one order of magnitude over that of the previous year. Personal data stores have reached into the terabyte regime and enterprise stores are now measured in petabytes. Digital music and video recorders have brought large data stores into the consumer market. About 80 percent of these data are unstructured (i.e., not indexed), inherently unstructureable (e.g., audio, images, or DNA data), rapidly changing (e.g., intelligence data and medical records), or held as an object within an otherwise structured database (such as memo fields, voice records, etc.). To find something of interest and ultimately extract actionable knowledge from these unstructured data, like finding specific needles in a haystack of many needles, one must process all of the data stored — not just an index as is often done with structureable data. Furthermore, since data stored are increasing at a rate faster than electronic processing capacity (as guided by Moore’s Law) our ability to manage this information in reasonable times is further aggravated.
New and tractable processing approaches, yielding performance improvements in excess of 100,000 over conventional systems, may be possible over storage networks and large disk arrays with capabilities that include line-speed compression, encryption, signal processing and other broad functionality. In this presentation I will explore emerging systems and hybrid concepts that circumvent conventional, sequential processor and bus-bandwidth limits, making data movement more effective and efficient, as well as enabling content-enhanced storage on ingest. Early critical applications include intelligence (both government and commercial), medicine, scientific research, financial services, and enterprise storage networks.
TUESDAY APRIL 18SCV Magnetics
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 29
Integrated Systems for Adaptive Radiation Therapy
Speaker: Dr. Dimitre Hristov, Oncology Care
Systems, Siemens Medical Solutions Time: Dinner 6:15 PM, Presentation 7:30 PM Cost: none (parking is free after 4 PM) Place: Dinner with the speaker in the Stanford
Hospital cafeteria; Presentation in Clark Center Auditorium (see map on website)
RSVP: not required Web: www.ewh.ieee.org/r6/scv/embs/pages/
upcoming.html
Dr. Dimitre Hristov is a Clinical Development Manag er at Siemens Medical Solutions, Oncology Care Systems. A PhD graduate from McGill University and a member of the Canadian College of Physicists in Medicine, Dr. Hristov has worked as a clinical physicist, researcher and teaching faculty at the Montreal University Hospital Centre and McGill University in Canada as well as at King Faisal Specialist Hospital and Research Centre in Jeddah, Saudi Arabia. At Siemens, he had been a Senior Staff Physicist, doing research in the areas of 4D imaging, therapy imaging, inverse planning and adaptive radiotherapy. His contributions are published in Medical Physics, Physics in Medicine and Biology and The international Journal of Radiation Oncology, Biology and Physics.
Radiotherapy plays a major role in achieving cure in cancer patients. For the effective treatment of tumors, precise target localization and fast, accurate patient positioning prior to each treatment fraction are crucial clinical challenges that need to be overcome. In order to address these challenges and enable Image-Guided Radiation Therapy some systems that integrate imaging and delivery capabilities have been recently introduced based on:
(i) the integration of a traditional multi-slice computed tomography (CT) scanner "on rails" with a C-arm gantry linear accelerator;
(ii) the development of a high sensitivity, fast, megavoltage (MV) electronic portal imaging device capable of clinical MV Conebeam CT (MVCBCT) reconstruction and fluoroscopy mounted on a C-arm gantry linear accelerator; and
(iii) the development of an in-line megavoltage and kilovoltage flat panel imaging system that has the potential to image both anatomical and dosimetric information in "real-time" utilizing the traditional C-arm gantry linear accelerator geometry.
The design and clinical utility of these systems will be discussed in the context of precision, image-guided adaptive radiation therapy.
WEDNESDAY APRIL 19SCV Engineering in Medicine and Biology
Patent Agent Jay Chesavage, PE
MSEE Stanford 3833 Middlefield Road, Palo Alto 94303
www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 30
Composite Organic-Inorganic Nanotags
Speaker: Dr. Mineo Yamakawa, Staff Research
Scientist, Intel Corp. Time: Registration & light lunch 11:30 AM,
Presentation & Q/A Noon Cost: Members $5; Non-members $10 Place: National Semiconductor, Building 31,
955 Kifer Road, Santa Clara RSVP: Please reserve by email to
[email protected] Web: www.ieee.org/nano
Dr. Mineo Yamakawa is a Staff Research
Scientist in the Biomedical & Life Sciences R&D Division of the newly formed Digital Health Group at Intel Corporation. Previously he was part of the Microsystem (MEMS) Goup. He received his BS in Applied Physics from Waseda University in Tokyo, Japan and his Ph.D. in Physiology and Biophysics from the University of Oklahoma, Health Sciences Center. During his early research years at the University of Pennsylvania and University of Vermont in 1980s, he pioneered and published in broadly interdisciplinary research areas, involving molecular genetics, protein/biochemical kinetics, in vivo physiology, and digital signal processing. Among his society memberships are included the American Chemical Society, American Physical Society, and the IEEE.
The complex behaviors and patterns of nano-scale
interactions between organic and inorganic materials are among the most difficult to decipher. By taking advantage of the recent advances in computational power and nano-scale chemical processing, Dr. Yamakawa’s team has developed a molecular signaling agent that is based on self-contained Surface Enhanced Raman Scattering. COIN Nanotags, or Composite Organic-Inorginic Nanotags, are the result. This has led to the development of a highly sensitive, high-resolution molecular marker with a signature-encodable shell, which could be used in identifying or observing specific target biomolecular species in experimental samples.
TUESDAY APRIL 18SCV Nanotechnology Council
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 31
The World Through the Eyes of an Inventor
Speaker: Peter Salmon, Founder & CTO, Sysflex,
Inc. Time: Networking at 7:00 PM, Presentation at
7:30 PM Cost: none Place: Keypoint Credit Union, 2805 Bowers
Avenue, Santa Clara RSVP: not required Web: www.CaliforniaConsultants.org
Peter Salmon has broad operating experience at semiconductor companies like Fairchild and Intel, defense companies like TRW and GTE, and several startup companies in the non-impact printing arena. His two issued patents are Component Connections Using Bumps and Wells, US 6,881,609 B2, and Electronic System Modules and Method of Fabrication, US 6,927,471 B2.
One of his patent applications is for an electrostatic motor that works by attraction and repulsion of charge. Torque is proportional to operating voltage rather than current, and this can lead to more efficient motors for industry, automobiles and other advanced applications such as UAVs and waterborne vehicles. Since there are no windings, there are no winding losses. High starting torque is an additional benefit for robotic applications. Peter’s company Sysflex won an SBIR grant to pursue this motor technology. The research is sponsored by the Navy, and is targeted at restricted access drilling machines.
In November 2005, Peter won the Best of Conference Award at the 2nd International Wafer Level Packaging Conference in San Jose for his flip chip connector paper titled “Repairable 3D Semiconductor Subsystems.” Peter can be reached at [email protected] and 650.814.1076.
For the inventor and entrepreneur, government-
sponsored Small Business Innovative Research (SBIR) grants provide an excellent way to reduce the risks of technology development, particularly because the recipient does not lose any equity. In this talk, Peter Salmon will cover the process of applying for and winning an SBIR grant.
Patents protect an inventor’s valuable Intellectual Property (IP). However, use of a patent attorney to file a patent application can cost $10K and up. After Peter learned how to write a patent application by working closely with a senior patent attorney, he is now able to do most of the work himself. Peter will discuss what he has learned about this process.
Peter has submitted over 24 patent applications for technologies including semiconductor interconnect systems, test and assembly methods, and electrostatic motors. One of the issued patents covers Pillar in Well, a unique type of flip chip connector. Peter will discuss this invention’s cost and thermal advantages, as well as how he is marketing this and another patent for sale or license.
TUESDAY APRIL 18SCV Consultants' Network of Silicon Valley
Do you provide a service? Would you like more inquiries?
• Access 25,000 engineers and managers • IEEE Members across the Bay Area • Monthly and Annual Rates available
Visit our Marketplace (page 3)
Download Rates and Services information: www.e-grid.net/docs/marketplace-f lyer.pdf
GRID.pdf
e-GRID
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 32
Circuit Technologies for Multi-Core Processor Design
Speaker: Stefan Rusu, Intel Corporation Time: Food/refreshments at 6:00 PM, Presentation
6:30 PM Cost: donation for food Place: National Semiconductor Building 31
Auditorium, 955 Kifer Road, Sunnyvale RSVP: Please reserve by email to
[email protected] Web: www.ewh.ieee.org/r6/scv/ssc
Stefan Rusu (M’85-SM’01)
received the MSEE degree from the Polytechnic Institute in Bucharest, Romania. He first joined Intel Corp. in 1984 working on data communications integrated circuits. In 1988 he joined Sun Microsystems working on microprocessor design with focus on clock and power distribution, packaging, standard cell libraries, CAD and circuit design methodology. He re-joined Intel Corp. in 1996 working on the clock and power distribution, cell library, I/O buffers and package for the first Itanium® processor. He is presently a Senior Principal Engineer in Intel's Enterprise Microprocessor Group leading the technology and special circuits design team for the Xeon® Processors Family. His technical interests are high-speed clocking, power distribution, I/O buffers, power and leakage reduction, and high-speed circuit design techniques. Stefan has authored or co-authored more than 70 papers on VLSI design methodology and microprocessor circuit technology. He holds 25 U.S. patents with several more pending. He is a member of the Technical Program Committee for ESSCIRC, A-SSCC and SoC conferences and an Associate Editor of the IEEE Journal of Solid-State Circuits.
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This presentation describes circuit technologies
for multi-core microprocessor design with specific examples from 90nm and 65nm Intel dual-core processors. We review cache hierarchy options for multi-core processors, as well as cache power reduction techniques using sleep and shut-off modes. Extensive use of long channel devices reduces sub-threshold leakage in non-timing critical paths. Multi-core clock distribution requires careful synchronization across cores, as well as sparse distribution networks over the caches to reduce power consumption. We review packaging options for multi-core processors, design-for-test and manufacturing features, as well as power and thermal management techniques.
THURSDAY APRIL 20SCV Solid State Circuits
Board Logic Systems
Complete Product Solutions Provider TM
Experienced consultants in the fields of: • Board & Verilog Design • Debug and Test • Signal Integrity • EMI • Power Electronics • Layout • Software Development • Documentation
www.boardlogics.com
[email protected] (650) 867-0869
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 33
Visions from a Global Carrier's "Crystal Ball"
Speaker: Dr. Stanley Chia, Vodafone Time: 6:30 PM Pizza and drinks;
7:00 PM Presentation Cost: none Place: Bishop Ranch 1, 6101 Bollinger Canyon
Road, San Ramon RSVP: Please reserve by email by April 19 to
[email protected] or call (510) 305-6022 Web: www.comsoc.org/oeb
Dr. Stanley Chia is Senior Director, Vodafone Group R&D-US. He has been with the mobile communications industry for over 24 years and has held leadership positions in network operations, technology development, and strategy. Prior to joining Vodafone and its predecessor AirTouch, he worked for BT-Cellnet (UK) now O2, British Telecom Laboratories (UK), and SmarTone Mobile Communications (Hong Kong). He is Senior Member of Institute of Electronic and Electrical Engineers (US) and Fellow of Institution of Electrical Engineers (UK).
3G may be here, but, how does it play with all the rapidly developing technologies?
• How does Metro-WiFi impact cellular carriers? • What is the impact of IP telephony? • How do increases in storage media affect this
market? • Will WiMAX replace cellular? • How does mobile broadcast impact the cellular
business?
Come hear Dr. Stanley Chia, Senior Director of Vodafone Group, R&D-US discuss these and other topics in the rapidly evolving wireless communications space.
We will continue our feature at the meeting of providing discussion of the latest happenings in the field of communications. This is a discussion and everyone is welcome to contribute. Please notify Bill Kaminsky ([email protected]) if you have something to comment about.
There will be time before and after the formal meeting for one-on-one discussions.
THURSDAY APRIL 20OEB Communications
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 34
Worldwide Nanometrology Standards Efforts
Speaker: Dr. David Rivkin, VP Engineering,
SciEssence Intl. Time: Networking at 7:30 PM,
Presentation at 8:00 PM Cost: none Place: Cogswell College (Room 197), 1175
Bordeaux Drive, Sunnyvale RSVP: to David Rivkin, [email protected] Web: www.ewh.ieee.org/r6/scv/ims
A presentation by: David Rivkin, PhD, Chairman IEEE IMS TC-34, VP Engineering SciEssence Intl & Pres. GCPI
We will review the current standards setting bodies,
their relationships and the standards for nanometrology that currently exist and are in process. ISO, IMS and IEEE standards will be presented including IEEE 1650 "EEE Standard Test Methods for Measurement of Electrical Properties of Carbon Nanotubes". We will also discuss the needs for future standards and recommendations to be presented by IEEE IMS TC-34
THURSDAY MAY 4SCV Instrumentation and Measurement
Patent Agent Jay Chesavage, PE
MSEE Stanford 3833 Middlefield Road, Palo Alto 94303
www.File-EE-Patents.com TEL: 650-619-5270 FAX: 650-494-3835
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 35
Nanoscale Imaging of Semiconductor and Biological Systems
Speaker: Prof. Ronald S. Indeck, Distinguished
Lecturer, Washington University (St. Louis) Time: Cookies & Conversation at 7:30 PM,
Presentation at 8:00 PM Cost: none Place: National Semiconductor Credit Union
Auditorium, 955 Kifer Road, Sunnyvale RSVP: not required Web: www.ewh.ieee.org/r6/scv/leos/archive/
leosabs20060509.htm
M. Selim Ünlü is a Professor of Electrical and Computer Engineering, Biomedical Engineering, and Physics at Boston University. Prof. Ünlü received the B.S. degree in electrical engineering from Middle East Technical University, Ankara, Turkey, in 1986, and the M.S.E.E. and Ph.D. in electrical engineering from the University of Illinois, Urbana-Champaign, in 1988 and 1992, respectively. In 1992, he joined the Department of Electrical and Computer Engineering, Boston University.
Dr. Ünlü's career interest is in research and development of photonic materials, devices and systems focusing on the design, processing, characterization, and modeling of semiconductor optoelectronic devices, especially photodetectors, as well as high-resolution microscopy and spectroscopy of semiconductor and biological materials.
During 1994-1995, Dr. Ünlü served as the Chair of IEEE Laser and Electro-Optics Society, Boston Chapter, winning the LEOS Chapter-of-the-Year Award. He was awarded National Science Foundation Research Initiation Award in 1993, United Nations TOKTEN award in 1995 and 1996, and both the National Science Foundation Career and Office of Naval Research Young Investigator Awards in 1996. He has authored and co-authored over 200 technical articles and several book chapters and magazine articles; edited one book; and holds several patents. His professional service includes the former chair of the IEEE/LEOS technical committee on photodetectors and imaging and currently, the current chair of IEEE/LEOS Nanophotonics committee. He is also serving as an Associate Editor for IEEE Journal of Quantum Electronics and a VP of LEOS.
We present two innovative approaches to go beyond the capabilities of standard optical microscopy which is limited to a transverse resolution of approximately half a wavelength due to the diffraction, also termed the Rayleigh or Abbe limit. The resolution is inversely proportional to the Numerical Aperture (NA). One method to increase the NA is to increase n, the refractive index of the material in the object space. We recently developed a new technique involving a Numerical Aperture Increasing Lens (NAIL) for diffraction limited subsurface microscopy. The NAIL technique is demonstrated by near-IR inspection of Si integrated circuits yielding a 230 nm resolution at 1050 nm wavelength representing a factor of 4 improvement over the state-of-the-art. We have applied this technique to photoluminescence and PLE measurements of InAs/GaAs quantum dots and demonstrated high collection efficiency and spatial resolution better than 400 nm. We also used NAIL technique in subsurface thermal emission microscopy of Si integrated circuits and achieved improvements in the amount of light collected and the spatial resolution, well beyond the limits of conventional thermal emission microscopy. We experimentally demonstrate a lateral spatial resolution of 1.4 µm and a longitudinal spatial resolution of 7.4 µm, for thermal imaging at free space wavelengths up to 5 µm. We also examine in detail the ability of sharp metal tips to enhance local optical fields and describe a new approach to nano-optics, that of combining solid immersion microscopy with tip-enhanced focusing and show how such an approach may lead to 20 nm resolution with near-unity throughput.
Spatial resolution can also be improved beyond the diffraction limit by collecting spectral information. We have built on our experience on resonant optoelectronic devices and developed a novel application to fluorescence microscopy that promises nanometer resolution in biological imaging. Over the past 20 years fluorescence microscopy has developed into a standard tool in biological sciences. Today, confocal microscopy provides three-dimensional resolution on lateral length scales of 0.5 micron and axial length scales of 0.75 micron with good imaging speed for studies of biological systems. In the past few years, the increased resolution achieved through advanced fluorescent probes and two-photon sources has made possible the coarse examination of structures at the subcellular level, complementing decades of molecular biology with the
TUESDAY MAY 9SCV Lasers and Electro Optics & Electron Devices
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 36
nascent ability to localize subcellular processes. We have developed an alternative method, spectral self-interference fluorescent microscopy. The technique transforms the variation in emission intensity for different path lengths used in fluorescence interferometry to a variation in the intensity for different wavelengths in emission, encoding the high-resolution information in the emission spectrum. Using monolayers of streptavidin, we have demonstrated better than 5nm axial height determination for thin layers of fluorophores and built successful models that accurately fit the data. Initial experiments on fluorescently labeled lipid layers successfully determined the binding of fluorescent molecules in membranes with sub-nanometer precision. Recently, the orientation of ss and dsDNA monolayers on silicon oxide is studied by tracing the location of a fluorescent label attached to the DNA.
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Annual Spring Banquet, with keynote talk: The Future of the
Transmission Business Speaker: Stewart Ramsay, VP, Transmission &
Asset Management, PG&E Time: 5:00 PM Cost: $30 members, $35 non-members, $15
students, through April 17; $5 more after 4/17
Place: Monte Cristo Cafe at Four Embarcadero Center in downtown San Francisco
RSVP: Please reserve and pay in advance – see flyer
Info: www.e-grid.net/docs/0605-sf-pes.pdf
Stewart Ramsay, VP, Transmission of PG&E, will be our keynote speaker at the banquet to discuss these issues in greater details.
This will be an enjoyable evening for engineers and non-engineers alike, so invite a friend or a family member. All are welcome!
SF PES is also offering corporate group discounts for 8 or more attendees. You can purchase a table for 8 attendees at a price of $300.
Construction of new transmission facilities have
become increasingly challenging in California due to stringent environmental regulations and permitting uncertainties. Due to retirement of aging power plants and lack of adequate local generation addition, transmission infrastructure expansion is needed to gain access to resources which are remote from customer load. Transmission system is being used very differently than it was designed to be used thereby creating grid congestion. FERC has adopted new rules on the certification of an Electric Reliability Organization and the procedures for the establishment, approval and enforcement of mandatory electric reliability standards. How will these issues affect the transmission business and PG&E efforts to expand the infrastructure? Will PG&E have adequate incentives for the construction of new transmission facilities in the near future? How will PG&E Sea Breeze HVDC Project improve grid reliability and provide benefit to customers in California?
SFPES will also host the annual award ceremony during this event. Various recipients will be given IEEE awards for their notable contributions to our PES Society. In addition, we will be enjoying fine dining at Monte Cristo Cafe. Dinner is being subsidized by the SFPES ADCOM committee, so that all attendees can enjoy this great memorable evening at a reasonable price!
THURSDAY MAY 11SF Power Engineering
A P R I L 2 0 0 6 V i s i t u s a t w w w . e - G R I D . n e t P a g e 38
A Fast Stochastic Integral Equation Solver to Model
Rough Surface Effects Speaker: Zhenhai Zhu, Cadence Berkeley
Laboratories Time: Snacks at 6:30 PM,
Presentation at 7:00 PM Cost: none Place: Cadence Design Systems, Building 5,
2655 Seely Avenue, San Jose RSVP: not required Web: ewh.ieee.org/r6/scv/cas
Zhenhai Zhu received his M.S. and Ph.D. degrees in Electrical Engineering and Computer Science from the Massachusetts Institute of Technology in 2002 and 2004, respectively. He was a Josef Raviv Memorial Postdoctoral Fellow at IBM T.J. Watson Research Center from 2004 to 2005. He joined Cadence Berkeley Laboratories as a Research Scientist in July, 2005.
He is a recipient of IEEE/ACM William J. McCalla 2005 ICCAD Best Paper Award for his work on fast stochastic integral equation solver. At MIT he also developed FastImp, a public-domain fast impedance extraction code, and pfft++, a public-domain fast integral equation solver. FastImp is generally considered as the state-of-the-art academic solver for the high-frequency analysis of 3D interconnects. The code pfft++ has been used to solve various partial differential equations in different engineering applications, such as computational aerodynamics, bio-molecular simulation and drug design, and computational electromagnetics.
His research interests focus on the development of efficient numerical methods for modeling and simulation of high frequency electronic systems. Current research projects include variational model order reduction, statistical timing and lithography simulation.
He lives with his wife and son in the city of Alameda. He likes to jog or bike along coast line, work out in gym and play table tennis and badminton. He was a leading player and co-captain of MIT table tennis team.
Rough surfaces are pervasive in integrated circuits and systems at both on-chip and off-chip levels. They are caused mainly by the imperfection in manufacturing processes such as electroplating and etching. And they can lead to serious performance degradation. For example, extensive experiments have shown that surface roughness can cause the conduction loss on the printed circuit boards to increase by a factor of 3 at high frequencies.
The calculation of the equivalent circuit elements of complicated 3D interconnect structures, so called parasitic extraction, has become a mature sub-field in EDA research and industry. The integral equation based methods have been proven to be the most powerful approaches. But so far the surfaces of those 3D structures have always been assumed to be perfectly smooth. The presence of surface roughness changes the nature of the problem and has unfortunately raised the numerical difficulty of the parasitic extraction to such a new level that even the state-of-the-art parasitic extraction algorithms are not able to handle practical structures.
In this talk, I will show: - Why the rough surface problem is important - A quick review of integral equation based parasitic
extraction solvers - Why these solvers fail to efficiently solve the
rough surface problem - The key elements in the proposed fast stochastic
integral equation solver (FastSies) - The potential applications of FastSies in high
frequencyelectromagnetic analysis of 3D structures with rough surfaces
MONDAY MAY 15SCV Circuits and Systems