field effect transistors: operation, circuit models, and applications ac power chapter 11
TRANSCRIPT
Field Effect Transistors: Operation, Circuit Models,
and Applications
AC Power
CHAPTER
11
Figure 11.1
11-1
Classification of field-effect transistorsFigure 11.1
Figure 11.2
11-2
The n-channel enhancement MOSFET construction and circuit symbol
Figure 11.2
Figure 11.3
11-3
Channel formation in NMOS transistor: (a) With no external gate voltage, the source-substrate and substrate-drain junctions are both reverse biased, and no conduction occurs; (b) when a gate voltage is applied, charge-carrying electrons are drawn between the source and drain regions to form a conducting channel.
Figure 11.3
Figure 11.4
11-4
Regions of operation of NMOS transistorFigure 11.4
where,
where,
:
:
:
Figure 11.5
11-5
Drain characteristic curves for a typical NMOS transistor with VT = 2 V and K = 1.5 mA/V2
Figure 11.5
Figure 11.6
11-6
The n-channel enhancement MOSFET circuit and drain characteristic for Example 11.1 (Biasing MOSFET Circuits)Figure 11.6
Figure 11.12
MOSFET Self-Bias Circuit
Figure 11.8, 11.9
11-7
The p-channel enhancement-mode field-effect transistor (PMOS)Figure 11.8Figure 11.8
Regions of operation for PMOS transistor
Figure 11.9
Figure
11.10, 11.11
11-8
Figure 11.11
MOSFET transconductance parameter
Example 11.4 MOSFET Transconductance Calculation
Figure
11.13
11-9
MOSFET small-signal modelFigure 11.13
Block diagram of a multistage amplifier
An example of three-stage amplifier
Figure 11.14, 11.15
11-10
CMOS inverterFigure 11.14
CMOS inverter approximate by ideal switches: (a) When vin is “high,”
vout is tied to ground; (b) when vin is “low,” vout is tied to VDD
Figure 11.15
Figure 11.18
11-11
Figure 11.18
Figure 11.19 Figure 11.20Figure 11.19, 11.20
This gate is a NOR gate
Figure 11.22, 11.23
11-12
MOSFET analog switch Symbol for bilateral FET analog gate
Figure 11.23
Figure 11.22
CMOS analog transmission gate
This gate can be used to analog multiplexer and sample-and-hold.