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RIZAL TECHNOLOGICAL UNIVERSITY

COLLEGE OF ENGINEERING AND INDUSTRIAL TECHNOLOGY

E C E II

R E S E A R C H W O R K

2

FIELD EFFECTTRANSISTOR

Name ; Armodia Tevarms t,

Time/day ; TF 7:30P 9:00P

Course ; Bs Ece

Submitted to ;Engr Nasuli

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FETThe field-effect transistor (FET) is a transistor that uses an electric field tocontrol the shape and hence the conductivity of a channel of one type ofchargecarrier in a semiconductor material. FETs are sometimes called unipolartransistors to contrast their single-carrier-type operation with the dual-carrier-typeoperation ofbipolar (junction) transistors (BJT). The conceptof the FET predatesthe BJT, though it was not physically implemented until afterBJTs due to thelimitations of semiconductor materials and the relative ease of manufacturing BJTscompared to FETs at the time. The field-effect transistor (FET) is a three-terminaldevice used for a variety of applications that match to a large extent, those of the

BJT transistor. Although there are important differences between the two types ofdevices, there are also many similarities, which will be pointed out in the sectionsto follow. The primary difference between the two types of transistors is the factthat;

The BJT transistor is a current-controlled device as depicted where as the JFETtransistor is a voltage-controlled device.

The term field effect in the name deserves some explanation. We are all familiarwith the ability of permanent magnet to draw metal fillings to itself without theneed for actual contact. The magnetic field of the permanent magnet envelopes thefillings and attracts them to the magnet because the magnetic flux lines act so as to

be short as possible. For the FET an electric field is established by the chargespresent, which controls the conduction path of the output circuit without the needfor direct contact between the controlling and controlled quantities. There is anatural tendency when introducing a device with a range of applications similar toone already introduced to compare some of the general characteristics of one tothose of the other:

One of the most important characteristics of the FET is its high input impedance

FETs are more temperature stable than BJT, and FET are usually smaller than BJT,making them particularly useful in integrated-circuit (IC)chips.

A field effect transistor(FET) is aunipolardevice, conducting a current using onlyone kind of charge carrier. If based on an N-type slab of semiconductor, the

carriers are electrons. Conversely, a P-type based device uses only holes. At the

circuit level,field effect transistoroperation is simple. A voltage applied to thegate,

input element, controls the resistance of thechannel, the unipolar region between

the gate regions.In an N-channel device, this is a lightly doped N-type slab of

silicon with terminals at the ends. Thesourceanddrainterminals are analogous to

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the emitter and collector,

respectively, of a BJT. In an

N-channel device, a heavy

P-type region on both sides

of the center of the slab

serves as a control

electrode, the gate. The

gate is analogous to the

base of a BJT

In the FET, current flows

along a semiconductor path called the channel. At one end of the channel, there is

an electrode called the source. At the other end of the channel, there is an

electrode called the drain. The physical diameter of the channel is fixed, but its

effective electrical diameter can be varied by the application of a voltage to a

control electrode called the gate. The conductivity of the FET depends, at any giveninstant in time, on the electrical diameter of the channel. A small change in gate

voltage can cause a large variation in the current from the source to the drain. This

is how the FET amplifies signals.

History

The field-effect transistor was first patented by Julius Edgar Lilienfeld in 1925 and

by Oskar Heil in 1934, but practical semi-conducting devices (the JFET, junction

gate field-effect transistor) were only developed much later after

the transistor effect was observed and explained by the team ofWilliam

Shockley at Bell Labs in 1947. The MOSFET (metaloxidesemiconductor field-

effect transistor), which largely superseded the JFET and had a more profound

effect on electronic development, was first proposed by Dawon Kahng in 1960.

Drs. Ian Munro Ross and G.C. Dacey jointly developed an experimental

procedure for measuring the characteristics of a field-effect transistor in 1995.

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Types of Field-Effect Transistors

CNTFET (Carbon nanotube field-effect transistor) TheDEPFETis a FET formed in a fully depleted substrate and acts as a sensor,

amplifier and memory node at the same time. It can be used as an image

(photon) sensor. TheDGMOSFETis a MOSFET with dual gates. TheDNAFETis a specialized FET that acts as a biosensor, by using a gate made

of single-strand DNA molecules to detect matching DNA strands.

TheFREDFET(Fast Reverse or Fast Recovery Epitaxial Diode FET) is aspecialized FET designed to provide a very fast recovery (turn-off) of the bodydiode.

The HEMT(high electron mobility transistor), also called a HFET(heterostructure FET), can be made using bandgapengineering in a ternarysemiconductor such as AlGaAs. The fully depleted wide-band-gap material formsthe isolation between gate and body.

The HIGFET (heterostructure insulated gate field effect transisitor)), is usedmainly in research now. [1]

The IGBT(insulated-gate bipolar transistor) is a device for power control. It hasa structure akin to a MOSFET coupled with a bipolar-like main conductionchannel. These are commonly used for the 200-3000 V drain-to-source voltagerange of operation. Power MOSFETs are still the device of choice for drain-to-source voltages of 1 to 200 V.

TheISFET(ion-sensitive field-effect transistor) used to measure ionconcentrations in a solution; when the ion concentration (such as H+, see pHelectrode) changes, the current through the transistor will change accordingly.

TheMESFET(MetalSemiconductor Field-Effect Transistor) substitutes the p-njunction of the JFET with a Schottky barrier; used in GaAs and other III-Vsemiconductor materials.

TheMODFET(Modulation-Doped Field Effect Transistor) uses a quantumwell structure formed by graded doping of the active region.

TheMOSFET(MetalOxideSemiconductor Field-Effect Transistor) utilizesan insulator (typically SiO2) between the gate and the body.

TheNOMFETis a Nanoparticle Organic Memory Field-Effect Transistor.[2] TheOFETis an Organic Field-Effect Transistor using an organic semiconductor

in its channel.

The GNRFET is a Field-Effect Transistor that uses a graphene nanoribbon for itschannel.

The VeSFET (Vertical-Slit Field-Effect Transistor) is a square-shaped junction-less FET with a narrow slit connecting the source and drain at opposite corners.Two gates occupy the other corners, and control the current through theslit. [3] [4]

The TFET (Tunnel Field-Effect Transistor) is based on band to band tunneling

http://en.wikipedia.org/wiki/Carbon_nanotube_field-effect_transistorhttp://en.wikipedia.org/w/index.php?title=DEPFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=DEPFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=DEPFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=Dual_Gate_MOSFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=Dual_Gate_MOSFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=Dual_Gate_MOSFET&action=edit&redlink=1http://en.wikipedia.org/wiki/DNA_field-effect_transistorhttp://en.wikipedia.org/wiki/DNA_field-effect_transistorhttp://en.wikipedia.org/wiki/DNA_field-effect_transistorhttp://en.wikipedia.org/wiki/Biosensorhttp://en.wikipedia.org/wiki/FREDFEThttp://en.wikipedia.org/wiki/FREDFEThttp://en.wikipedia.org/wiki/FREDFEThttp://en.wikipedia.org/wiki/High_electron_mobility_transistorhttp://en.wikipedia.org/wiki/Bandgaphttp://en.wikipedia.org/wiki/AlGaAshttp://en.wikipedia.org/w/index.php?title=Heterostructure_insulated_gate_field_effect_transisitor&action=edit&redlink=1http://www.freepatentsonline.com/5614739.htmlhttp://en.wikipedia.org/wiki/Insulated-gate_bipolar_transistorhttp://en.wikipedia.org/wiki/Power_MOSFEThttp://en.wikipedia.org/wiki/ISFEThttp://en.wikipedia.org/wiki/ISFEThttp://en.wikipedia.org/wiki/ISFEThttp://en.wikipedia.org/wiki/PH_electrodehttp://en.wikipedia.org/wiki/PH_electrodehttp://en.wikipedia.org/wiki/MESFEThttp://en.wikipedia.org/wiki/MESFEThttp://en.wikipedia.org/wiki/MESFEThttp://en.wikipedia.org/wiki/P-n_junctionhttp://en.wikipedia.org/wiki/P-n_junctionhttp://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/wiki/MODFEThttp://en.wikipedia.org/wiki/MODFEThttp://en.wikipedia.org/wiki/MODFEThttp://en.wikipedia.org/wiki/Quantum_wellhttp://en.wikipedia.org/wiki/Quantum_wellhttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/Electrical_insulationhttp://en.wikipedia.org/wiki/Silicon_dioxidehttp://en.wikipedia.org/wiki/Silicon_dioxidehttp://en.wikipedia.org/wiki/Silicon_dioxidehttp://en.wikipedia.org/wiki/NOMFEThttp://en.wikipedia.org/wiki/NOMFEThttp://en.wikipedia.org/wiki/NOMFEThttp://www.sciencedaily.com/releases/2010/01/100125122101.htmhttp://en.wikipedia.org/wiki/OFEThttp://en.wikipedia.org/wiki/OFEThttp://en.wikipedia.org/wiki/OFEThttp://en.wikipedia.org/wiki/Graphene_nanoribbonshttp://vestics.org/twiki/bin/view/Main/WebHomehttp://www.ece.cmu.edu/~cssi/research/manufacturing.htmlhttp://www.ece.cmu.edu/~cssi/research/manufacturing.htmlhttp://vestics.org/twiki/bin/view/Main/WebHomehttp://en.wikipedia.org/wiki/Graphene_nanoribbonshttp://en.wikipedia.org/wiki/OFEThttp://www.sciencedaily.com/releases/2010/01/100125122101.htmhttp://en.wikipedia.org/wiki/NOMFEThttp://en.wikipedia.org/wiki/Silicon_dioxidehttp://en.wikipedia.org/wiki/Electrical_insulationhttp://en.wikipedia.org/wiki/MOSFEThttp://en.wikipedia.org/wiki/Quantum_wellhttp://en.wikipedia.org/wiki/Quantum_wellhttp://en.wikipedia.org/wiki/MODFEThttp://en.wikipedia.org/wiki/Schottky_barrierhttp://en.wikipedia.org/wiki/P-n_junctionhttp://en.wikipedia.org/wiki/P-n_junctionhttp://en.wikipedia.org/wiki/MESFEThttp://en.wikipedia.org/wiki/PH_electrodehttp://en.wikipedia.org/wiki/PH_electrodehttp://en.wikipedia.org/wiki/ISFEThttp://en.wikipedia.org/wiki/Power_MOSFEThttp://en.wikipedia.org/wiki/Insulated-gate_bipolar_transistorhttp://www.freepatentsonline.com/5614739.htmlhttp://en.wikipedia.org/w/index.php?title=Heterostructure_insulated_gate_field_effect_transisitor&action=edit&redlink=1http://en.wikipedia.org/wiki/AlGaAshttp://en.wikipedia.org/wiki/Bandgaphttp://en.wikipedia.org/wiki/High_electron_mobility_transistorhttp://en.wikipedia.org/wiki/FREDFEThttp://en.wikipedia.org/wiki/Biosensorhttp://en.wikipedia.org/wiki/DNA_field-effect_transistorhttp://en.wikipedia.org/w/index.php?title=Dual_Gate_MOSFET&action=edit&redlink=1http://en.wikipedia.org/w/index.php?title=DEPFET&action=edit&redlink=1http://en.wikipedia.org/wiki/Carbon_nanotube_field-effect_transistor

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JFET

There are two basic types of FET. In the junction FET (JFET), the gate material ismade of the opposite polarity semiconductor to the channel material (for a P-channel FET the gate is made of N-type semiconductor material). The gate-channel

junction is similar to a diode's PN junction. As with the diode, current is high if the

junction is forward biased and is extremely small when the junction is reversebiased. The latter case is the way that JFETs are used, since any current in thegate is undesirable. The magnitude of the reverse bias at the junction isproportional to the size of the electric field that 11 pinches" the channel. Thus, thecurrent in the channel is reduced for higher reverse gate bias voltage.

Because the gate-channel junction in a JFET is similar to a bipolar junction diode,this junction must never be forward biased, otherwise large currents will pass

through the gate and into the channel. For an N-channel JFET, the gate mustalways be at a lower potential than the source (Vcs < 0). The channel is as fullyopen as it can get when the gate and source voltages are equal (VGS = 0). The

prohibited condition is when VGS > 0. For P-channel JFETs these conditions arereversed (in normal operation VGS 0 and the prohibited condition is when VGS 0) repel holes from the channel intothe substrate, thereby widening the channel and decreasing channelresistance. Conversely, VGS < 0 causes holes to be attracted from the substrate,narrowing the channel and increasing the channel resistance. Once again, thepolarities discussed in this example are reversed for P-channel devices. Thecommon abbreviation for an N-channel MOSFET is NMOS, and for a P-channelMOSFET, PMOS.

Because of the insulating layer next to the gate, input resistance of a MOSFET isusually greater than 1012 Ohms (a million megohms). Since MOSFETs can bothdeplete the channel, like the JFET, and also enhance it, the construction of MOSFETdevices differs based on the channel size in the resting state, VGS = 0. A depletionmode, device (also called a normally on MOSFET) has a channel in resting statethat gets smaller as a reverse bias s applied, this device conducts current with nobias applied. An enhancement mode device (also called a normally offMOSFET) is

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built without a channel and does not conduct current when VGS = 0; increasingforward bias forms a channel that conducts current.

Characteristics Of FETsThe JFETs is a three-terminal device with one terminal capable of controlling thecurrent between the other two. For the JFET transistor the n-channel device will bethe prominent device, with paragraphs and sections devoted to the effects of usinga p-channel JFET.

The basic construction of the n-channel FET is the major part of the structureis the n-type material, which forms the channel between the embedded layers of p-type material. The top of the n-type channel is connected through an ohmic contactto a terminal referred to as the drain, whereas the lower end of the same materialis connected through an ohmic contact to a terminal referred to as the source. The

two p-type terminal materials are connected together and to the gate terminal. Inessence, therefore, thedrain and the source areconnected to the endsof the n-type channeland the gate to the twolayers of p-typematerial. In the absenceof any applied potentialsthe FET has two p-n

junctions under no-bias

conditions. The result isa depletion region aseach junction, that resembles the same region of a diode under no=bias conditions.Recall also that a depletion region is void of free carriers and is therefore unable tosupport conduction.

Analogies are seldom perfect and at times can be misleading, but the wateranalogy does provide a sense for the FET control at the terminal and theappropriateness of the terminology applied to the terminals of the device. Thesource of water pressure can be likened to the applied voltage from drain to source,which establishes a flow of water (electrons) from the spigot (source). The gatethrough an applied signal(potential), controls the flow of water (charge) to the

drain The drain and source terminals are at opposite ends of the n-channelbecause the terminology is defined for electron flow.

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FET operation

The FET controls the flow ofelectrons (or electron holes) from the source to drainby affecting the size and shape of a "conductive channel" created and influenced byvoltage (or lack of voltage) applied across the gate and source terminals (For ease

of discussion, this assumes body and source are connected). This conductivechannel is the "stream" through which electrons flow from source to drain.

In an n-channel depletion-mode device, a negative gate-to-source voltage causesadepletion regionto expand in width and encroach on the channel from the sides,narrowing the channel. If the depletion region expands to completely close thechannel, the resistance of the channel from source to drain becomes large, and theFET is effectively turned off like a switch. Likewise a positive gate-to-source voltageincreases the channel size and allows electrons to flow easily.

Conversely, in an n-channel enhancement-mode device, a positive gate-to-sourcevoltage is necessary to create a conductive channel, since one does not exist

naturally within the transistor. The positive voltage attracts free-floating electronswithin the body towards the gate, forming a conductive channel. But first, enoughelectrons must be attracted near the gate to counter the dopant ions added to thebody of the FET; this forms a region free of mobile carriers called a depletionregion, and the phenomenon is referred to as thethreshold voltageof the FET.Further gate-to-source voltage increase will attract even more electrons towardsthe gate which are able to create a conductive channel from source to drain; thisprocess is called inversion.

For either enhancement- or depletion-mode devices, at drain-to-source voltagesmuch less than gate-to-source voltages, changing the gate voltage will alter thechannel resistance, and drain current will be proportional to drain voltage

(referenced to source voltage). In this mode the FET operates like a variableresistor and the FET is said to be operating in a linear mode or ohmic mode.

If drain-to-source voltage is increased, this creates a significant asymmetricalchange in the shape of the channel due to a gradient of voltage potential fromsource to drain. The shape of the inversion region becomes "pinched-off" near thedrain end of the channel. If drain-to-source voltage is increased further, the pinch-off point of the channel begins to move away from the drain towards the source.The FET is said to be in saturation mode; some authors refer to it as active mode,for a better analogy with bipolar transistor operating regions. The saturation mode,or the region between ohmic and saturation, is used when amplification is needed.

The in-between region is sometimes considered to be part of the ohmic or linearregion, even where drain current is not approximately linear with drain voltage.

Even though the conductive channel formed by gate-to-source voltage no longerconnects source to drain during saturation mode, carriers are not blocked fromflowing. Considering again an n-channel device, a depletion region exists in the p-type body, surrounding the conductive channel and drain and source regions. Theelectrons which comprise the channel are free to move out of the channel throughthe depletion region if attracted to the drain by drain-to-source voltage. The

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depletion region is free of carriers and has a resistance similar to silicon. Anyincrease of the drain-to-source voltage will increase the distance from drain to thepinch-off point, increasing resistance due to the depletion region proportionally tothe applied drain-to-source voltage. This proportional change causes the drain-to-source current to remain relatively fixed independent of changes to the drain-to-source voltage and quite unlike the linear mode operation. Thus in saturation mode,the FET behaves as a constant-current source rather than as a resistor and can beused most effectively as a voltage amplifier. In this case, the gate-to-sourcevoltage determines the level of constant current through the channel.

Parameters of AC and DC,

Name Symbol Description Unit Default

Vt0 Vth zero -bias threshold voltage V -2.0

Beta Beta transconductance parameter A/V 10

Lambda channel-length modulation parameter 1/V 0.0

Rd drain ohmic resistance ohms 0.0

Rs source ohmic resistance ohms 0.0

Is gate-junction saturation current A 10

N gate P-N emission coefficient 1.0

Isr gate-junction recombination current parameter A 0.0

Nr Isr emission coefficient 2.0

Cgs zero-bias gate-source junction capacitance F 0.0

Cgd zero-bias gate-drain junction capacitance F 0.0

Pb gate-junction potential V 1.0

Fc Fe forward-bias junction capacitance coefficient 0.5

M M gate P-N grading coefficient 0.5

Kf flicker noise coefficient 0.0

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Af flicker noise exponent 1.0

Ffe flicker noise frequency exponent 1.0

Temp device temperature 26.85

Xti saturation current exponent 3.0

Vt0tc Vt0 temperature coefficient 0.0

Betatce Beta exponential temperature coefficient 0.0

Tnom temperature at which parameters were extracted 26.85

Area default area for JFET 1.0

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edition, pp 1 18.

Balbir kumar and shail b. jain, Electronic devices andcircuits, 2007 ,published by Asoke k. Ghosg, EEE

eastern economy edition, pp 4 20.

B. P. Singh Rekha Singh, Electronics devices andintegrated circuits, first impression,2006, published

by Dorling Kindersley ( India) pvt. Ltd, licenses of

pearson in sounth Asia. pp 1 50.

S. salivahanan, N.suresh kumar, A vallavaraj, Electronic devices and circuits, 1998, Tata Mcgraw-

Hill Publishing Company Limited, This edition can

be exported from india only by the publishers.