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Digital systems testing and testable design

Miron Abramovici, Melvin A. Breuer, Arthur D. Friedman

This updated printing of the leading text and reference in digital systems testing and testable design provides comprehensive, state-of-the-art coverage of the field. Included are extensive discussions of test generation, fault modeling for classic and new technologies, simulation, fault simulation, design for testability, built-in self-test, and diagnosis. Complete with numerous problems, this book is a must-have for test engineers, ASIC and system designers, and CAD developers, and advanced engineering students will find this book an invaluable tool to keep current with recent changes in the field.

This course examines in depth the theory and practice of fault analysis, test generation, and design for testability for digital ICs and systems. The topics to be covered include circuit and system modeling; fault sources and types; the single stuck-line (SSL), delay, and functional fault models; fault simulation methods; automatic test pattern generation (ATPG) algorithms for combinational and sequential circuits, including the D-algorithm, PODEM, FAN, and the genetic algorithm; testability measures; design-for-testability; scan design; test compression methods; logic-level diagnosis; built-in self-testing (BIST); VLSI testing issues; and processor and memory testing. Advance research issues, including topics on MEMS and mixed-signal testing are also discussed.

This course teaches fundamentals of testing theory and practice for complex VLSI designs. The objectives are to give the student the ability to solve a wide range of non-trivial testing problems using practical and cost effective techniques. Students will also learn to create test automation tools on their own. Topics covered include, Fault Modeling, Fault Simulation, Automatic Test Generation in Combinational and Sequential Circuits, Functional Testing of Microprocessors, ALUs and Memories, Design for Testability, Synthesis for Testability, Built-In Self-Test and Diagnosis.

This course is designed to introduce students to testing of digital circuits. The course will familiarize students with existing techniques in VLSI design. After a gentle introduction to how design errors or manufacturing errors happen in the VLSI flow, the course teaches how to test a chip for its expected functionality. The course will gently straddle into both EE and CSE domains. Manufacturing defects and faults will be abstracted as CS problems and students will learn algorithms to test a chip systematically. The course also teaches how designs can be made testable and various methods by which a circuit can be made more testable. Exposure to VLSI design is not assumed. Students are expected to have a good understanding of digital circuits. Exposure to data structures and algorithms is desired.

Circuit Modeling: Basic Concepts, Functional Modeling at Logic and Register levels, Structural Models.

Logic Simulation: Simulation based Design Verification, Delay Models, Gate-level Event Driven Simulation.

Fault Modeling: Logical Fault Models, Fault Detection, Equivalence and Dominance, Single and Multiple Stuck-Fault Model.

Fault Simulation: General Fault Simulation Techniques, Fault Simulation for Combinational Circuits, Fault Sampling.

Testing: Algorithms tor Testing Single Stuck Fault and Bridge Faults, Automatic Test Generation Concepts, Functional Testing, Random Test Generators. Encoding techniques.

Design tor Testability: Scan Based Design. Boundary Scan Techniques, Compression Techniques, LFSFs, Built-in Self Test (BIST), BIST Architectures and Advanced BIST Concepts.

--references

Digital Systems Testing and Testable Design Miron Abramovici, Melvin Breuer and Arthur Friedman Jaico Books (in India), Fifth Impression,

Essentials of Electronic Testing for Digital, Memory, and Mixed-Signal VLSI

Circuits Michael Bushnell and Vishwani Agrawal Springer,

Scientific Introduction to Algorithms

Thomas H. Cormen, Charles E. Leiserson, Ronald L. Rivest and Cliff Stein MIT Press and McGraw-Hill, nd Edition, .

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