computing and informatics class notes for amie

5/24/2018 Computing and Informatics Class Notes for AMIE

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Computing and Informatics Class Notes for AMIE

By Vinayak Ashok Bharadi

Local Area Networks

For historical reasons, the industry refers to nearly every type of network as an "area

network." The most commonly-discussed categories of computer networks include the

following -

Local Area Network (LAN) Wide Area Network (WAN) Metropolitan Area Network (MAN) Storage Area Network (SAN) System Area Network (SAN) Server Area Network (SAN) Small Area Network (SAN) Personal Area Network (PAN) Desk Area Network (DAN) Controller Area Network (CAN) Cluster Area Network (CAN)

LANs and WANs were the original flavors of network design. The concept of "area"

made good sense at this time, because a key distinction between a LAN and a WAN

involves the physical distance that the network spans. A third category, the MAN, also fit

into this scheme as it too is centered on a distance-based concept.

As technology improved, new types of networks appeared on the scene. These, too,

became known as various types of "area networks" for consistency's sake, although

distance no longer proved a useful differentiator.

LAN Basics

A LAN connects network devices over a relatively short distance. A networked office

building, school, or home usually contains a single LAN, though sometimes one building

will contain a few small LANs, and occasionally a LAN will span a group of nearbybuildings. In IPnetworking, one can conceive of a LAN as a single IP subnet (though this

is not necessarily true in practice).

Besides operating in a limited space, LANs include several other distinctive features.

LANs are typically owned, controlled, and managed by a single person or organization.They also use certain specific connectivity technologies, primarily Ethernet and Token

Ring.
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WAN Basics

As the term implies, a wide-area network spans a large physical distance. A WAN like

the Internet spans most of the world!

A WAN is a geographically-dispered collection of LANs. A network device called arouter connects LANs to a WAN. In IP networking, the router maintains both a LAN

addressand a WAN address.

WANs differ from LANs in several important ways. Like the Internet, most WANs arenot owned by any one organization but rather exist under collective or distributed

ownership and management. WANs use technology like ATM, Frame Relay and X.25 for

connectivity.

LANs and WANs at Home

Home networkers with cable modemor DSLservice already have encountered LANs andWANs in practice, though they may not have noticed. A cable/DSL router like those in

the Linksys family join the home LAN to the WAN link maintained by one's ISP. TheISP provides a WAN IP address used by the router, and all of the computers on the home

network use private LAN addresses. On a home network, like many LANs, all computers

can communicate directly with each other, but they must go through a central gateway

location to reach devices outside of their local area.

What About MAN, SAN, PAN, DAN, and CAN?

Future articles will describe the many other types of area networks in more detail. After

LANs and WANs, one will most commonly encounter the following three networkdesigns:

A Metropolitan Area Networkconnects an area larger than a LAN but smaller than a

WAN, such as a city, with dedicated or high-performance hardware. [1]

A Storage Area Networkconnects servers to data storage devices through a technology

like Fibre Channel. [2]

A System Area Network connects high-performance computers with high-speed

connections in a clusterconfiguration.

Conclusion

To the uninitiated, LANs, WANs, and the other area network acroymns appear to be justmore alphabet soup in a technology industry already drowning in terminology. The

names of these networks are not nearly as important as the technologies used to construct

them, however. A person can use the categorizations as a learning tool to better

understand concepts like subnets, gateways, and routers.
http://compnetworking.about.com/library/glossary/bldef-router.htmhttp://compnetworking.about.com/library/glossary/bldef-address.htmhttp://compnetworking.about.com/cs/atm/index.htmhttp://compnetworking.about.com/library/glossary/bldef-cablemodem.htmhttp://compnetworking.about.com/library/glossary/bldef-dsl.htmhttp://compnetworking.about.com/library/weekly/aa121700a.htmhttp://compnetworking.about.com/library/glossary/bldef-isp.htmhttp://compnetworking.about.com/library/glossary/bldef-gateway.htmhttp://compnetworking.about.com/gi/dynamic/offsite.htm?site=http://www.erg.abdn.ac.uk/users/gorry/eg3561/intro%2Dpages/man.htmlhttp://compnetworking.about.com/cs/fibrechannel/index.htmhttp://compnetworking.about.com/cs/sanforbeginners/index.htmhttp://compnetworking.about.com/library/glossary/bldef-cluster.htmhttp://compnetworking.about.com/library/glossary/bldef-cluster.htmhttp://compnetworking.about.com/cs/sanforbeginners/index.htmhttp://compnetworking.about.com/cs/fibrechannel/index.htmhttp://compnetworking.about.com/gi/dynamic/offsite.htm?site=http://www.erg.abdn.ac.uk/users/gorry/eg3561/intro%2Dpages/man.htmlhttp://compnetworking.about.com/library/glossary/bldef-gateway.htmhttp://compnetworking.about.com/library/glossary/bldef-isp.htmhttp://compnetworking.about.com/library/weekly/aa121700a.htmhttp://compnetworking.about.com/library/glossary/bldef-dsl.htmhttp://compnetworking.about.com/library/glossary/bldef-cablemodem.htmhttp://compnetworking.about.com/cs/atm/index.htmhttp://compnetworking.about.com/library/glossary/bldef-address.htmhttp://compnetworking.about.com/library/glossary/bldef-router.htm


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Bus, ring, star, and other types of network topology

In networking, the term "topology" refers to the layout of connected devices on anetwork. This article introduces the standard topologies of computer networking.

Topology in Network Design

One can think of a topology as a network's virtual shape or structure. This shape does notnecessarily correspond to the actual physical layout of the devices on the network. For

example, the computers on a home LANmay be arranged in a circle in a family room,

but it would be highly unlikely to find an actual ring topology there.

Network topologies are categorized into the following basic types:

bus ring star tree mesh

More complex networks can be built as hybrids of two or more of the above basic

topologies.

Bus Topology

Bus networks (not to be confused with the system bus of a computer) use a common

backbone to connect all devices. A single cable, the backbone functions as a shared

communication medium that devices attach or tap into with an interface connector. Adevice wanting to communicate with another device on the network sends a broadcast

message onto the wire that all other devices see, but only the intended recipient actually

accepts and processes the message.

Ethernet bus topologies are relatively easy to install and don't require much cablingcompared to the alternatives. 10Base-2 ("ThinNet") and 10Base-5 ("ThickNet") both

were popular Ethernet cabling options many years ago for bus topologies. However, busnetworks work best with a limited number of devices. If more than a few dozen

computers are added to a network bus, performance problems will likely result. In

addition, if the backbone cable fails, the entire network effectively becomes unusable.
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Ring Topology

In a ring network, every device has exactly two neighbors for communication purposes.

All messages travel through a ring in the same direction (either "clockwise" or

"counterclockwise"). A failure in any cable or device breaks the loop and can take downthe entire network.

To implement a ring network, one typically uses FDDI, SONET, or Token Ring

technology. Ring topologies are found in some office buildings or school campuses.

Star Topology

Many home networks use the star topology. A star network features a central connection

point called a "hub" that may be a hub, switchor router. Devices typically connect to thehub with Unshielded Twisted Pair (UTP) Ethernet.

Compared to the bus topology, a star network generally requires more cable, but a failure

in any star network cable will only take down one computer's network access and not theentire LAN. (If the hub fails, however, the entire network also fails.)
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Tree Topology

Tree topologies integrate multiple star topologies together onto a bus. In its simplest

form, only hub devices connect directly to the tree bus, and each hub functions as the

"root" of a tree of devices. This bus/star hybrid approach supports future expandability ofthe network much better than a bus (limited in the number of devices due to the broadcast

traffic it generates) or a star (limited by the number of hub connection points) alone.

Mesh Topology

Mesh topologies involve the concept of routes. Unlike each of the previous topologies,

messages sent on a mesh network can take any of several possible paths from source to

destination. (Recall that even in a ring, although two cable paths exist, messages can onlytravel in one direction.) Some WANs, like the Internet, employ mesh routing.

Summary

Topologies remain an important part of network design theory. You can probably build ahome or small business network without understanding the difference between a bus

design and a star design, but understanding the concepts behind these gives you a deeperunderstanding of important elements like hubs, broadcasts, and routes

Internet protocol sui te

Internet protocol suite

Layer Protocols

5. Application

DNS, TLS/SSL,TFTP, FTP,

HTTP, IMAP4,

IRC, POP3, SIP,

SMTP, SNMP,SSH, TELNET,

RTP,

4. Transport

TCP, UDP,

RSVP, DCCP,

SCTP,

3. Network IP (IPv4, IPv6),

ICMP, IGMP,ARP, RARP,

2. Data link Ethernet, Wi-Fi,PPP, FDDI,

ATM, Frame
http://compnetworking.about.com/cs/lanvlanwan/g/bldef_wan.htmhttp://en.wikipedia.org/wiki/Application_layerhttp://en.wikipedia.org/wiki/Domain_name_systemhttp://en.wikipedia.org/wiki/Transport_Layer_Securityhttp://en.wikipedia.org/wiki/Trivial_File_Transfer_Protocolhttp://en.wikipedia.org/wiki/File_Transfer_Protocolhttp://en.wikipedia.org/wiki/Hypertext_Transfer_Protocolhttp://en.wikipedia.org/wiki/Internet_Message_Access_Protocolhttp://en.wikipedia.org/wiki/Internet_Relay_Chathttp://en.wikipedia.org/wiki/Post_Office_Protocolhttp://en.wikipedia.org/wiki/Session_Initiation_Protocolhttp://en.wikipedia.org/wiki/Simple_Mail_Transfer_Protocolhttp://en.wikipedia.org/wiki/Simple_Network_Management_Protocolhttp://en.wikipedia.org/wiki/Secure_Shellhttp://en.wikipedia.org/wiki/TELNEThttp://en.wikipedia.org/wiki/Real-time_Transport_Protocolhttp://en.wikipedia.org/wiki/Category:Application_layer_protocolshttp://en.wikipedia.org/wiki/Transport_layerhttp://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/User_Datagram_Protocolhttp://en.wikipedia.org/wiki/Resource_Reservation_Protocolhttp://en.wikipedia.org/wiki/Datagram_Congestion_Control_Protocolhttp://en.wikipedia.org/wiki/Stream_Control_Transmission_Protocolhttp://en.wikipedia.org/wiki/Category:Transport_layer_protocolshttp://en.wikipedia.org/wiki/Network_layerhttp://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/IPv4http://en.wikipedia.org/wiki/IPv4http://en.wikipedia.org/wiki/IPv6http://en.wikipedia.org/wiki/Internet_Control_Message_Protocolhttp://en.wikipedia.org/wiki/Internet_Group_Management_Protocolhttp://en.wikipedia.org/wiki/Address_Resolution_Protocolhttp://en.wikipedia.org/wiki/Reverse_Address_Resolution_Protocolhttp://en.wikipedia.org/wiki/Category:Network_layer_protocolshttp://en.wikipedia.org/wiki/Data_link_layerhttp://en.wikipedia.org/wiki/Ethernethttp://en.wikipedia.org/wiki/Wi-Fihttp://en.wikipedia.org/wiki/Point-to-Point_Protocolhttp://en.wikipedia.org/wiki/Fiber_distributed_data_interfacehttp://en.wikipedia.org/wiki/Asynchronous_Transfer_Modehttp://en.wikipedia.org/wiki/Frame_relayhttp://en.wikipedia.org/wiki/Frame_relayhttp://en.wikipedia.org/wiki/Asynchronous_Transfer_Modehttp://en.wikipedia.org/wiki/Fiber_distributed_data_interfacehttp://en.wikipedia.org/wiki/Point-to-Point_Protocolhttp://en.wikipedia.org/wiki/Wi-Fihttp://en.wikipedia.org/wiki/Ethernethttp://en.wikipedia.org/wiki/Data_link_layerhttp://en.wikipedia.org/wiki/Category:Network_layer_protocolshttp://en.wikipedia.org/wiki/Reverse_Address_Resolution_Protocolhttp://en.wikipedia.org/wiki/Address_Resolution_Protocolhttp://en.wikipedia.org/wiki/Internet_Group_Management_Protocolhttp://en.wikipedia.org/wiki/Internet_Control_Message_Protocolhttp://en.wikipedia.org/wiki/IPv6http://en.wikipedia.org/wiki/IPv4http://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/Network_layerhttp://en.wikipedia.org/wiki/Category:Transport_layer_protocolshttp://en.wikipedia.org/wiki/Stream_Control_Transmission_Protocolhttp://en.wikipedia.org/wiki/Datagram_Congestion_Control_Protocolhttp://en.wikipedia.org/wiki/Resource_Reservation_Protocolhttp://en.wikipedia.org/wiki/User_Datagram_Protocolhttp://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/Transport_layerhttp://en.wikipedia.org/wiki/Category:Application_layer_protocolshttp://en.wikipedia.org/wiki/Real-time_Transport_Protocolhttp://en.wikipedia.org/wiki/TELNEThttp://en.wikipedia.org/wiki/Secure_Shellhttp://en.wikipedia.org/wiki/Simple_Network_Management_Protocolhttp://en.wikipedia.org/wiki/Simple_Mail_Transfer_Protocolhttp://en.wikipedia.org/wiki/Session_Initiation_Protocolhttp://en.wikipedia.org/wiki/Post_Office_Protocolhttp://en.wikipedia.org/wiki/Internet_Relay_Chathttp://en.wikipedia.org/wiki/Internet_Message_Access_Protocolhttp://en.wikipedia.org/wiki/Hypertext_Transfer_Protocolhttp://en.wikipedia.org/wiki/File_Transfer_Protocolhttp://en.wikipedia.org/wiki/Trivial_File_Transfer_Protocolhttp://en.wikipedia.org/wiki/Transport_Layer_Securityhttp://en.wikipedia.org/wiki/Domain_name_systemhttp://en.wikipedia.org/wiki/Application_layerhttp://compnetworking.about.com/cs/lanvlanwan/g/bldef_wan.htm


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Relay, GPRS,

Bluetooth,

1. Physical

Modems, ISDN,SONET/SDH,

RS232, USB,Ethernet

physical layer,

Wi-Fi, GSM,

Bluetooth,

The Internet protocol suite is the set of communications protocols that implement the

protocol stackon which the Internetand most commercial networks run. It is sometimes

called the TCP/IPprotocol suite, after the two most important protocols in it: the

Transmission Control Protocol(TCP) and the Internet Protocol(IP), which were also the

first two defined.

The Internet protocol suite like many protocol suites can be viewed as a set of

layers, each layer solves a set of problems involving the transmission of data, and

provides a well-defined service to the upper layer protocolsbased on using services from

some lower layers. Upper layers are logically closer to the user and deal with more

abstract data, relying on lower layer protocols to translate data into forms that can

eventually be physically transmitted. The original TCP/IP reference modelconsisted of

four layers, but has evolved into a five layer model.

The OSI model describes a fixed, seven layer stack for networking protocols.

Comparisons between the OSI model and TCP/IP can give further insight into thesignificance of the components of the IP suite, but can also cause confusion, since the

definition of the layers are slightly different.

History

The Internet protocol suite came from work done by DARPAin the early 1970s. After

building the pioneering ARPANET, DARPA started work on a number of other datatransmission technologies. In 1972, Robert E. Kahnwas hired at the DARPA Information

Processing Technology Office, where he worked on both satellite packet networks and

ground-based radio packet networks, and recognized the value of being able to

communicate across them. In the spring of 1973, Vinton Cerf, the developer of theexisting ARPANET Network Control Program (NCP) protocol, joined Kahn to work on

open-architecture interconnection models with the goal of designing the next protocol for

the ARPANET.

By the summer of 1973, Kahn and Cerf had soon worked out a fundamentalreformulation, where the differences between network protocols were hidden by using a

common internetwork protocol, and instead of the network being responsible for
http://en.wikipedia.org/wiki/Frame_relayhttp://en.wikipedia.org/wiki/GPRShttp://en.wikipedia.org/wiki/Bluetoothhttp://en.wikipedia.org/wiki/Category:Link_protocolshttp://en.wikipedia.org/wiki/Physical_layerhttp://en.wikipedia.org/wiki/Modemhttp://en.wikipedia.org/wiki/ISDNhttp://en.wikipedia.org/wiki/Synchronous_optical_networkinghttp://en.wikipedia.org/wiki/RS232http://en.wikipedia.org/wiki/USBhttp://en.wikipedia.org/wiki/Ethernet_physical_layerhttp://en.wikipedia.org/wiki/Ethernet_physical_layerhttp://en.wikipedia.org/wiki/Wi-Fihttp://en.wikipedia.org/wiki/GSMhttp://en.wikipedia.org/wiki/Bluetoothhttp://en.wikipedia.org/wiki/Category:Physical_layer_protocolshttp://en.wikipedia.org/wiki/Communications_protocolhttp://en.wikipedia.org/wiki/Protocol_stackhttp://en.wikipedia.org/wiki/Internethttp://en.wikipedia.org/wiki/Protocol_suitehttp://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/Upper_layer_protocolhttp://en.wikipedia.org/wiki/Lower_layer_protocolhttp://en.wikipedia.org/wiki/TCP/IP_modelhttp://en.wikipedia.org/wiki/OSI_modelhttp://en.wikipedia.org/wiki/DARPAhttp://en.wikipedia.org/wiki/ARPANEThttp://en.wikipedia.org/wiki/Robert_E._Kahnhttp://en.wikipedia.org/wiki/Information_Processing_Technology_Officehttp://en.wikipedia.org/wiki/Information_Processing_Technology_Officehttp://en.wikipedia.org/wiki/Vinton_Cerfhttp://en.wikipedia.org/wiki/Internetwork_protocolhttp://en.wikipedia.org/wiki/Internetwork_protocolhttp://en.wikipedia.org/wiki/Vinton_Cerfhttp://en.wikipedia.org/wiki/Information_Processing_Technology_Officehttp://en.wikipedia.org/wiki/Information_Processing_Technology_Officehttp://en.wikipedia.org/wiki/Robert_E._Kahnhttp://en.wikipedia.org/wiki/ARPANEThttp://en.wikipedia.org/wiki/DARPAhttp://en.wikipedia.org/wiki/OSI_modelhttp://en.wikipedia.org/wiki/TCP/IP_modelhttp://en.wikipedia.org/wiki/Lower_layer_protocolhttp://en.wikipedia.org/wiki/Upper_layer_protocolhttp://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/Protocol_suitehttp://en.wikipedia.org/wiki/Internethttp://en.wikipedia.org/wiki/Protocol_stackhttp://en.wikipedia.org/wiki/Communications_protocolhttp://en.wikipedia.org/wiki/Category:Physical_layer_protocolshttp://en.wikipedia.org/wiki/Bluetoothhttp://en.wikipedia.org/wiki/GSMhttp://en.wikipedia.org/wiki/Wi-Fihttp://en.wikipedia.org/wiki/Ethernet_physical_layerhttp://en.wikipedia.org/wiki/Ethernet_physical_layerhttp://en.wikipedia.org/wiki/USBhttp://en.wikipedia.org/wiki/RS232http://en.wikipedia.org/wiki/Synchronous_optical_networkinghttp://en.wikipedia.org/wiki/ISDNhttp://en.wikipedia.org/wiki/Modemhttp://en.wikipedia.org/wiki/Physical_layerhttp://en.wikipedia.org/wiki/Category:Link_protocolshttp://en.wikipedia.org/wiki/Bluetoothhttp://en.wikipedia.org/wiki/GPRShttp://en.wikipedia.org/wiki/Frame_relay


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reliability, as in the ARPANET, the hosts became responsible. (Cerf credits Hubert

Zimmerman and Louis Pouzin [designer of the CYCLADES network] with important

influences on this design.)

With the role of the network reduced to the bare minimum, it became possible to join

almost any networks together, no matter what their characteristics were, thereby solvingKahn's initial problem. (One popular saying has it that TCP/IP, the eventual product ofCerf and Kahn's work, will run over "two tin cans and a string", and it has in fact been

implemented using homing pigeons.) A computer called a gateway (later changed to

router to avoid confusion with other types of gateway

) is provided with an interface to

each network, and forwardspacketsback and forth between them.

The idea was worked out in more detailed form by Cerf's networking research group at

Stanford in the 197374 period. (The early networking work at Xerox PARC, whichproduced the PARC Universal Packet protocol suite, much of which was

contemporaneous, was also a significant technical influence; people moved between the

two.)

DARPA then contracted with BBN Technologies, Stanford University, and the

University College London to develop operational versions of the protocol on different

hardware platforms. Four versions were developed: TCP v1, TCP v2, a split into TCP v3

and IP v3 in the spring of 1978, and then stability with TCP/IP v4 the standard

protocol still in use on the Internet today.

In 1975, a two-network TCP/IP communications test was performed between Stanford

and University College London (UCL). In November, 1977, a three-network TCP/IP test

was conducted between the U.S., UK, and Norway. Between 1978 and 1983, several

other TCP/IP prototypes were developed at multiple research centres. A full switchoverto TCP/IP on the ARPANET took place January 1, 1983.[1]

In March 1982,[2]

the US Department of Defense made TCP/IP the standard for all

military computer networking. In 1985, the Internet Architecture Boardheld a three dayworkshop on TCP/IP for the computer industry, attended by 250 vendor representatives,

helping popularize the protocol and leading to its increasing commercial use.

On November 9, 2005 Kahn and Cerf were presented with the Presidential Medal of

Freedomfor their contribution to American culture.[3]
http://en.wikipedia.org/wiki/Hubert_Zimmermanhttp://en.wikipedia.org/wiki/Hubert_Zimmermanhttp://en.wikipedia.org/wiki/Louis_Pouzinhttp://en.wikipedia.org/wiki/CYCLADEShttp://en.wikipedia.org/wiki/IP_over_Avian_Carriershttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/Gatewayhttp://en.wikipedia.org/wiki/Gatewayhttp://en.wikipedia.org/wiki/Packethttp://en.wikipedia.org/wiki/Xerox_PARChttp://en.wikipedia.org/wiki/PARC_Universal_Packethttp://en.wiktionary.org/wiki/Contemporaneoushttp://en.wikipedia.org/wiki/BBN_Technologieshttp://en.wikipedia.org/wiki/Stanford_Universityhttp://en.wikipedia.org/wiki/University_College_Londonhttp://en.wikipedia.org/wiki/TCP/IP#_note-0#_note-0http://en.wikipedia.org/wiki/January_1http://en.wikipedia.org/wiki/1983http://en.wikipedia.org/wiki/TCP/IP#_note-0#_note-0http://en.wikipedia.org/wiki/TCP/IP#_note-1#_note-1http://en.wikipedia.org/wiki/Internet_Architecture_Boardhttp://en.wikipedia.org/wiki/November_9http://en.wikipedia.org/wiki/2005http://en.wikipedia.org/wiki/TCP/IP#_note-2#_note-2http://en.wikipedia.org/wiki/Presidential_Medal_of_Freedomhttp://en.wikipedia.org/wiki/Presidential_Medal_of_Freedomhttp://en.wikipedia.org/wiki/TCP/IP#_note-2#_note-2http://en.wikipedia.org/wiki/TCP/IP#_note-2#_note-2http://en.wikipedia.org/wiki/Presidential_Medal_of_Freedomhttp://en.wikipedia.org/wiki/Presidential_Medal_of_Freedomhttp://en.wikipedia.org/wiki/2005http://en.wikipedia.org/wiki/November_9http://en.wikipedia.org/wiki/Internet_Architecture_Boardhttp://en.wikipedia.org/wiki/TCP/IP#_note-1#_note-1http://en.wikipedia.org/wiki/TCP/IP#_note-0#_note-0http://en.wikipedia.org/wiki/1983http://en.wikipedia.org/wiki/January_1http://en.wikipedia.org/wiki/University_College_Londonhttp://en.wikipedia.org/wiki/Stanford_Universityhttp://en.wikipedia.org/wiki/BBN_Technologieshttp://en.wiktionary.org/wiki/Contemporaneoushttp://en.wikipedia.org/wiki/PARC_Universal_Packethttp://en.wikipedia.org/wiki/Xerox_PARChttp://en.wikipedia.org/wiki/Packethttp://en.wikipedia.org/wiki/Gatewayhttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/IP_over_Avian_Carriershttp://en.wikipedia.org/wiki/CYCLADEShttp://en.wikipedia.org/wiki/Louis_Pouzinhttp://en.wikipedia.org/wiki/Hubert_Zimmermanhttp://en.wikipedia.org/wiki/Hubert_Zimmerman


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Layers in the Internet protocol suite stack

IP suite stack showing the physical network connection of two hosts via two routersand

the corresponding layers used at each hop

Sample encapsulation of data within a UDPdatagram within an IPpacket

The IP suite uses encapsulation to provide abstraction of protocols and services.

Generally a protocol at a higher level uses a protocol at a lower level to help accomplish

its aims. The Internet protocol stack can be roughly fitted to the four layers of the original

TCP/IP model:
http://en.wikipedia.org/wiki/Image:IP_stack_connections.pnghttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/Image:UDP_encapsulation.pnghttp://en.wikipedia.org/wiki/User_Datagram_Protocolhttp://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/Encapsulation_%28networking%29http://en.wikipedia.org/wiki/TCP/IP_modelhttp://en.wikipedia.org/wiki/TCP/IP_modelhttp://en.wikipedia.org/wiki/Encapsulation_%28networking%29http://en.wikipedia.org/wiki/Internet_Protocolhttp://en.wikipedia.org/wiki/User_Datagram_Protocolhttp://en.wikipedia.org/wiki/Routerhttp://en.wikipedia.org/wiki/Image:UDP_encapsulation.pnghttp://en.wikipedia.org/wiki/Image:UDP_encapsulation.pnghttp://en.wikipedia.org/wiki/Image:IP_stack_connections.pnghttp://en.wikipedia.org/wiki/Image:IP_stack_connections.png


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DNS, TFTP, TLS/SSL, FTP, HTTP, IMAP, IRC,NNTP, POP3,

SIP, SMTP, SNMP, SSH, TELNET, ECHO, BitTorrent, RTP,PNRP, rlogin, ENRP,

4. Application

Routing protocols like BGP and RIP, which for a variety of

reasons run over TCP and UDP respectively, may also be

considered part of the application or network layer.

TCP, UDP, DCCP, SCTP, IL, RUDP,

3. Transport

Routing protocols like OSPF, which run over IP, may also be

considered part of the transport or network layer. ICMP and

IGMPrun over IP may be considered part of the network layer.

IP(IPv4, IPv6)

2. Internet

ARPand RARP operate underneath IP but above the link layer

so they belong somewhere in between.

1. Network access Ethernet, Wi-Fi, Token ring, PPP, SLIP, FDDI, ATM, Frame

Relay, SMDS,

In many modern textbooks, this model has evolved into the five layer TCP/IP model,where the Network access layer is splitted into a Data link layeron top of a Physical

layer, and the Internet layeris calledNetwork layer.

Implementations

Today, most commercial operating systems include and install the TCP/IP stack by

default. For most users, there is no need to look for implementations. TCP/IP is includedin all commercial Unixsystems, Mac OS X, and all free-software Unix-likesystems such

as Linuxdistributions and BSDsystems, as well as Microsoft Windows.

Unique implementations include Lightweight TCP/IP, an open sourcestack designed for

embedded systemsand KA9Q NOS, a stack and associated protocols for amateurpacket

radiosystems andpersonal computersconnected via serial lines.
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p://en.wikipedia.org/wiki/Transmission_Control_Protocolhttp://en.wikipedia.org/wiki/Transport_layerhttp://en.wikipedia.org/wiki/Routing_information_protocolhttp://en.wikipedia.org/wiki/Border_Gateway_Protocolhttp://en.wikipedia.org/wiki/Endpoint_Handlespace_Redundancy_Protocolhttp://en.wikipedia.org/wiki/Rloginhttp://en.wikipedia.org/wiki/Peer_Name_Resolution_Protocolhttp://en.wikipedia.org/wiki/Real-time_Transport_Protocolhttp://en.wikipedia.org/wiki/BitTorrenthttp://en.wikipedia.org/wiki/ECHO_protocolhttp://en.wikipedia.org/wiki/Telnethttp://en.wikipedia.org/wiki/Secure_Shellhttp://en.wikipedia.org/wiki/Simple_Network_Management_Protocolhttp://en.wikipedia.org/wiki/Simple_Mail_Transfer_Protocolhttp://en.wikipedia.org/wiki/Session_Initiation_Protocolhttp://en.wikipedia.org/wiki/Post_Office_Protocolhttp://en.wikipedia.org/wiki/Network_News_Transfer_Protocolhttp://en.wikipedia.org/wiki/Internet_Relay_Chathttp://en.wikipedia.org/wiki/Internet_Message_Access_Protocolhttp://en.wikipedia.org/wiki/HyperText_Transfer_Protocolhttp://en.wikipedia.org/wiki/File_Transfer_Protocolhttp://en.wikipedia.org/wiki/Transport_Layer_Securityhttp://en.wikipedia.org/wiki/Trivial_File_Transfer_Protocolhttp://en.wikipedia.org/wiki/Domain_Name_Systemhttp://en.wikipedia.org/wiki/Application_layer


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Karnaugh map

The Karnaugh map, also known as a Veitch diagram(K-map or KV-map for short), isa tool to facilitate management of Boolean algebraic expressions. A Karnaugh map is

unique in that only one variable changes value between squares, in other words, the rows

and columns are ordered according to the principles of Gray code.

History and nomenclature

The Karnaugh map was invented in 1953by Maurice Karnaugh, a telecommunications

engineer at Bell Labs.

Usage in boolean logic

Normally, extensive calculations are required to obtain the minimal expression of a

Boolean function, but one can use a Karnaugh map instead.

Problem solving uses

Karnaugh maps make use of the human brain's excellent pattern-matchingcapability to decide which terms should be combined to get the simplestexpression.

K-maps permit the rapid identification and elimination of potential race hazards,something that boolean equations alone cannot do.

A Karnaugh map is an excellent aid for simplification of up to six variables, butwith more variables it becomes hard even for our brain to discern optimal

patterns.

For problems involving more than six variables,solving the boolean expressions ismore preferred than the Karnaugh map.

Karnaugh maps also help teach about Boolean functions and minimization.

Properties

A mapping of minterms on a Karnaugh map. The arrows indicate which squares can be

thought of as "switched" (rather than being in a normal sequential order).
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A Karnaugh map may have any number of variables, but usually works best when there

are only a few - between 2 and 6 for example. Each variable contributes two possibilitiesto each possibility of every other variable in the system. Karnaugh maps are organized so

that all the possibilities of the system are arranged in a grid form, and between two

adjacent boxes, only one variable can change value. This is what allows it to reduce

hazards.

When using a Karnaugh map to derive a minimized function, one "covers" the ones on

the map by rectangular "coverings" that contain a number of boxes equal to a power of 2

(for example, 4 boxes in a line, 4 boxes in a square, 8 boxes in a rectangle, etc). Once aperson has covered the ones, that person can produce a term of a sum of products by

finding the variables that do not change throughout the entire covering, and taking a 1 to

mean that variable, and a 0 as the complement of that variable. Doing this for every

covering gives you a matching function.

One can also use zeros to derive a minimized function. The procedure is identical to the

procedure for ones, except that each term is a term in a product of sums - and a 1 meansthe compliment of the variable, while 0 means the variable non-complimented.

Each square in a Karnaugh map corresponds to a minterm(and maxterm). The picture to

the right shows the location of each minterm on the map.

Example

Consider the following function:

f(A,B,C,D) =E(4,8,9,10,11,12,14,15)

The values insideEtell us which rows have output 1.

This function has this truth table:

# A B C D f(A,B,C,D)

0 0 0 0 0 0

1 0 0 0 1 0

2 0 0 1 0 0
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3 0 0 1 1 0

4 0 1 0 0 1

5 0 1 0 1 0

6 0 1 1 0 0

7 0 1 1 1 0

8 1 0 0 0 1

9 1 0 0 1 1

10 1 0 1 0 1


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11 1 0 1 1 1

12 1 1 0 0 1

13 1 1 0 1 0

14 1 1 1 0 1

15 1 1 1 1 1

The input variables can be combined in 16 different ways, so our Karnaugh map has to

have 16 positions. The most convenient way to arrange this is in a 4x4 grid.
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The binary digits in the map represent the function's output for any given combination ofinputs. We write 0 in the upper leftmost corner of the map because f= 0 whenA= 0,B=

0, C= 1,D= 0. Similarly we mark the bottom right corner as 1 because A= 1,B= 0, C=

0,D= 0 givesf= 1. Note that the values are ordered in a Gray code, so that precisely one

variable flips between any pair of adjacent cells.

After the Karnaugh map has been constructed our next task is to find the minimal termsto use in the final expression. These terms are found by encircling groups of 1's in the

map. The encirclings must be rectangular and must have an area that is a positive powerof two (i.e. 2, 4, 8, ). The rectangles should be as large as possible without containing

any 0's. The optimal encirclings in this map are marked by the green, red and blue lines.

For each of these encirclings we find those variables that have the same state in each of

the fields in the encircling. For the first encircling (the red one) we find that:

The variable Amaintains the same state (1) in the whole encircling, therefore itshould be included in the term for the red encircling.

Variable B does not maintain the same state (it shifts from 1 to 0), and shouldtherefore be excluded.

Cdoes not change: it is always 1. Dchanges.

Thus the first term in the Boolean expression isAC.

For the green encircling we see thatAandBmaintain the same state, but CandDchange.

Bis 0 and has to be negated before it can be included. Thus the second term isAB'.

In the same way, the blue rectangle gives the termBC'D'and so the whole expression is:

AC+AB+BCD.

The grid is toroidallyconnected, which means that the rectangles can wrap around edges,

soABDis a valid term, although not part of the minimal set.

The inverse of a function is solved in the same way by encircling the 0's instead.

In a Karnaugh map with nvariables, a Boolean term mentioning kof them will have a

corresponding rectangle of area 2

n-k

.

Karnaugh maps also allow easy minimizations of functions whose truth tables include"don't care" conditions (that is sets of inputs for which the designer doesn't care what the

output is) because "don't care" conditions can be included in a ring to make it larger but

do not have to be ringed. They are usually indicated on the map with a hyphen/dash in

place of the number. The value can be a "0," "1," or the hyphen/dash/X depending on if
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one can use the "0" or "1" to simplify the KM more. If the "don't cares" don't help you

simplify the KM more, then use the hyphen/dash/X.

Race hazards

Karnaugh maps are useful for detecting and eliminating race hazards. They are very easyto spot using a Karnaugh map, because a race condition may exist when moving between

any pair of adjacent, but disjointed, regions circled on the map.

In the above example, a potential race condition exists when C and D are both 0,A is a 1, and B changes from a 0 to a 1 (moving from the green state to the blue

state). For this case, the output is defined to remain unchanged at 1, but because

this transition is not covered by a specific term in the equation, a potential for aglitch(a momentary transition of the output to 0) exists.

A harder possible glitch to spot is if D was 0 and A and B were both 1, with Cchanging from 0 to 1. In this case the glitch wraps around from the bottom of the

map to the top of the map.

Whether these glitches do occur depends on the physical nature of the implementation,

and whether we need to worry about it depends on the application.

In this case, an additional term of +AD' would eliminate the potential race hazard,

bridging between the green and blue output states or blue and red output states.

The term is redundant in terms of the static logic of the system, but such redundant terms

are often needed to assure race-free dynamic performance.

When not to use K-maps

The diagram becomes cluttered and hard to interpret if there are more than four variableson an axis. This argues against the use of Karnaugh maps for expressions with more than

six variables. For such expressions, the Quine-McCluskey algorithm, also called the

method of prime implicants, should be used.

This algorithm generally finds most of the optimal solutions quickly and easily, butselecting the final prime implicants (after the essential ones are chosen) may still require

a brute force approach to get the optimal combination (though this is generally far

simpler than trying to brute force the entire problem).

Logic gate

A logic gate performs a logical operation on one or more logic inputs and produces asingle logic output. The logic normally performed is Boolean logic and is most

commonly found in digital circuits. Logic gates are primarily implemented electronically

using diodes or transistors, but can also be constructed using electromagnetic relays,

fluidics, opticalor even mechanicalelements.
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Logic levels

A Boolean logical input or output always takes one of two logic levels. These logic levels

can go by many names including: on / off, high (H) / low (L), one (1) / zero (0), true (T) /false (F), positive / negative, positive / ground, open circuit / close circuit, potential

difference / no difference, yes / no.

For consistency, the names 1 and 0 will be used below.

Logic gates

A logic gate takes one or more logic-level inputs and produces a single logic-level output.Because the output is also a logic level, an output of one logic gate can connect to the

input of one or more other logic gates. Two outputs cannot be connected together,

however, as they may be attempting to produce different logic values. In electronic logic

gates, this would cause a short circuit.

In electronic logic, a logic level is represented by a certain voltage (which depends on the

type of electronic logic in use). Each logic gate requires power so that it can source andsink currents to achieve the correct output voltage. In logic circuit diagrams the power is

not shown, but in a full electronic schematic, power connections are required.

Background

The simplest form of electronic logic is diodelogic. This allows AND and OR gates to bebuilt, but not inverters, and so is an incomplete form of logic. To build a complete logic

system, valvesor transistorscan be used. The simplest family of logic gates using bipolar

transistors is called resistor-transistor logic, or RTL. Unlike diode logic gates, RTL gates

can be cascaded indefinitely to produce more complex logic functions. These gates wereused in early integrated circuits. For higher speed, the resistors used in RTL were

replaced by diodes, leading to diode-transistor logic, or DTL. It was then discovered that

one transistor could do the job of two diodes in the space of one diode, so transistor-transistor logic, or TTL, was created. In some types of chip, to reduce size and power

consumption still further, the bipolar transistors were replaced with complementary field-

effect transistors (MOSFETs), resulting in complementary metal-oxide-semiconductor

(CMOS) logic.

For small-scale logic, designers now use prefabricated logic gates from families of

devicessuch as the TTL7400 seriesinvented by Texas Instrumentsand the CMOS4000series invented by RCA, and their more recent descendants. These devices usually

contain transistors with multiple emitters, used to implement the AND function, which

are not available as separate components. Increasingly, these fixed-function logic gates

are being replaced byprogrammable logic devices, which allow designers to pack a huge

number of mixed logic gates into a single integrated circuit. The field-programmable

nature ofprogrammable logic devicessuch as FPGAshas removed the 'hard' property of

hardware; it is now possible to change the logic design of a hardware system by
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reprogramming some of its components, thus allowing the features or function of a

hardware implementation of a logic system to be changed.

Electronic logic gates differ significantly from their relay-and-switch equivalents. They

are much faster, consume much less power, and are much smaller (all by a factor of a

million or more in most cases). Also, there is a fundamental structural difference. Theswitch circuit creates a continuous metallic path for current to flow (in either direction)between its input and its output. The semiconductor logic gate, on the other hand, acts as

a high-gain voltageamplifier, which sinks a tiny current at its input and produces a low-

impedance voltage at its output. It is not possible for current to flow between the output

and the input of a semiconductor logic gate.

Another important advantage of standardised semiconductor logic gates, such as the 7400

and 4000 families, is that they are cascadable. This means that the output of one gate canbe wired to the inputs of one or several other gates, and so on ad infinitum, enabling the

construction of circuits of arbitrary complexity without requiring the designer to

understand the internal workings of the gates.

In practice, the output of one gate can only drive a finite number of inputs to other gates,

a number called the 'fanout limit', but this limit is rarely reached in the newer CMOSlogic circuits, as compared to TTL circuits. Also, there is always a delay, called the

'propagation delay', from a change in input of a gate to the corresponding change in its

output. When gates are cascaded, the total propagation delay is approximately the sum of

the individual delays, an effect which can become a problem in high-speed circuits.

Electronic logic levels

The two logic levels in binary logic circuits are represented by two voltage ranges, "low"and "high". Each technology has its own requirements for the voltages used to represent

the two logic levels, to ensure that the output of any device can reliably drive the input ofthe next device. Usually, two non-overlapping voltage ranges, one for each level, aredefined. The difference between the high and low levels ranges from 0.7 volts in Emitter

coupled logicto around 28 volts in relay logic.

Logic gates and hardware

NAND and NOR logic gates are the two pillars of logic, in that all other types of Boolean

logic gates (i.e., AND, OR, NOT, XOR, XNOR) can be created from a suitable network

of just NAND or just NOR gate(s). They can be built from relays or transistors, or anyother technology that can create an inverter and a two-input AND or OR gate. Hence the

NAND and NOR gates are called the universal gates.

For an input of 2 variables, there are 16 possible boolean algebra outputs. These 16outputs are enumerated below with the appropriate function or logic gate for the 4

possible combinations of A and B. Note that not all outputs have a corresponding
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function or logic gate, although those that do not can be produced by combinations of

those that can.

A 0 0 1 1

INPUT

B 0 1 0 1

0 0 0 0 0

A AND B 0 0 0 1

0 0 1 0

A 0 0 1 1

0 1 0 0

B 0 1 0 1

A XOR B 0 1 1 0

A OR B 0 1 1 1

A NOR B 1 0 0 0

A XNOR B 1 0 0 1

OUTPUT

NOT B 1 0 1 0


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1 0 1 1

NOT A 1 1 0 0

1 1 0 1

A NAND B 1 1 1 0

1 1 1 1 1

Logic gates are a vital part of many digital circuits, and as such, every kind is available as

an IC. For examples, see the 4000 seriesof CMOSlogic chips or the 700series.

Symbols

There are two sets of symbols in common use, both now defined by ANSI/IEEEStd 91-1984 and its supplement ANSI/IEEE Std 91a-1991. The "distinctive shape" set, based on

traditional schematics, is used for simple drawings and is quicker to draw by hand. It issometimes unofficially described as "military", reflecting its origin if not its modern

usage. The "rectangular shape" set, based on IEC60617-12, has rectangular outlines for

all types of gate, and allows representation of a much wider range of devices than ispossible with the traditional symbols. The IEC's system has been adopted by other

standards, such as EN60617-12:1999 in Europe and BSEN 60617-12:1999 in the United

Kingdom.

Type Distinctive shape Rectangular shape

Boolean

algebra

between A

& B

Truth table

AND

INPUT OUTPUT

A B A AND B

0 0 0

0 1 0

1 0 0
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1 1 1

OR

A+B

INPUT OUTPUT

A B A OR B

0 0 0

0 1 1

1 0 1

1 1 1

NOT

INPUT OUTPUT

A NOT A

0 1

1 0

In electronics a NOT gate is more commonly called an inverter. The circle on the symbolis called a bubble, and is generally used in circuit diagrams to indicate an inverted input

or output.

NAND

INPUT OUTPUT

A B A NAND B

0 0 1

0 1 1

1 0 1

1 1 0

NOR

INPUT OUTPUT

A B A NOR B

0 0 1

0 1 0

1 0 0

1 1 0

In practice, the cheapest gate to manufacture is usually the NAND gate. Additionally,
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Charles Peirceshowed that NAND gates alone (as well as NOR gates alone) can be used

to reproduce all the other logic gates.

Symbolically, a NAND gate can also be shown using the OR shape with bubbles on its

inputs, and a NOR gate can be shown as an AND gate with bubbles on its inputs. This

reflects the equivalency due to De Morgans law, but it also allows a diagram to be readmore easily, or a circuit to be mapped onto available physical gates in packages easily,

since any circuit node that has bubbles at both ends can be replaced by a simple bubble-less connection and a suitable change of gate. If the NAND is drawn as OR with input

bubbles, and a NOR as AND with input bubbles, this gate substitution occurs

automatically in the diagram (effectively, bubbles "cancel"). This is commonly seen inreal logic diagrams - thus the reader must not get into the habit of associating the shapes

exclusively as OR or AND shapes, but also take into account the bubbles at both inputs

and outputs in order to determine the "true" logic function indicated.

Two more gates are the exclusive-OR or XOR function and its inverse, exclusive-NOR or

XNOR. The two input Exclusive-OR is true only when the two input values are different,false if they are equal, regardless of the value. If there are more than two inputs, the gate

generates a true at its output if the number of trues at its input is odd([1]

). In practice,these gates are built from combinations of simpler logic gates.

XOR

INPUT OUTPUT

A B A XOR B

0 0 0

0 1 1

1 0 1

1 1 0

XNOR

INPUT OUTPUT

A B A XNOR B

0 0 1

0 1 0

1 0 0

1 1 1
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The 7400 chip, containing four NANDs. The two additional contacts supply power (+5

V) and connect the ground.

DeMorgan equivalent symbols

By use of De Morgan's theorem, anANDgate can be turned into an ORgate by inverting

the sense of the logic at its inputs and outputs. This leads to a separate set of symbols

with inverted inputs and the opposite core symbol. These symbols can make circuit

diagrams for circuits using active lowsignals much clearer and help to show accidental

connection of an active high output to an active low input or vice-versa.

Storage of bits

Related to the concept of logic gates (and also built from them) is the idea of storing a bit

of information. The gates discussed up to here cannot store a value: when the inputschange, the outputs immediately react. It is possible to make a storage element either

through a capacitor(which stores charge due to its physical properties) or by feedback.

Connecting the output of a gate to the input causes it to be put through the logic again,and choosing the feedback correctly allows it to be preserved or modified through the use

of other inputs. A set of gates arranged in this fashion is known as a "latch", and more

complicated designs that utilise clocks (signals that oscillate with a known period) and

change only on the rising edge are called edge-triggered "flip-flops". The combination of

multiple flip-flops in parallel, to store a multiple-bit value, is known as a register.

These registers or capacitor-based circuits are known as computer memory. They vary in

performance, based on factors of speed, complexity, and reliability of storage, and manydifferent types of designs are used based on the application.

Three-state logic gates
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A tristate buffer can be thought of as a switch. IfBis on, the switch is closed. If B is off,the switch is open.

Main article: Tri-state buffer

Three-state, or 3-state, logic gates have three states of the output: high (H), low (L) andhigh-impedance (Z). The high-impedance state plays no role in the logic, which remainsstrictly binary. These devices are used on busesto allow multiple chips to send data. A

group of three-states driving a line with a suitable control circuit is basically equivalent to

a multiplexer, which may be physically distributed over separate devices or plug-in cards.

'Tri-state', a widely-used synonym of 'three-state', is a trademark of the National

Semiconductor Corporation.

Miscellaneous

Logic circuits include such devices as multiplexers, registers, arithmetic logic units

(ALUs), and computer memory, all the way up through complete microprocessorswhich

can contain more than a 100 million gates. In practice, the gates are made from field

effect transistors(FETs), particularly metal-oxide-semiconductor FETs (MOSFETs).

In reversiblelogic, Toffoli gatesare used.

History and development

The earliest logic gates were made mechanically. Charles Babbage, around 1837, devised

the Analytical Engine. His logic gates relied on mechanical gearing to perform

operations. Electromagnetic relays were later used for logic gates. In 1891, AlmonStrowgerpatented a device containing a logic gate switch circuit (U.S. Patent 0447918).

Strowger's patent was not in widespread use until the 1920s. Starting in 1898, Nikola

Teslafiled forpatentsof devices containing logic gate circuits (see List of Tesla patents).

Eventually, vacuum tubes replaced relays for logic operations. Lee De Forest'smodification, in 1907, of the Fleming valvecan be used as AND logic gate. Claude E.

Shannonintroduced the use of Boolean algebra in the analysis and design of switchingcircuits in 1937. Walther Bothe, inventor of the coincidence circuit, got part of the 1954

Nobel Prizein physics, for the first modern electronic AND gate in 1924. Active research

is taking place in molecular logic gates.

Common Basic Logic ICs

CMOS TTL Function

4001 7402 Quad two-input NOR gate
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4011 7400 Quad two-input NAND gate

4049 7404 Hex NOT gate (invertingbuffer)

4070 7486 Quad two-Input XOR gate

4071 7432 Quad two-input OR gate

4077 74266 Quad two-input XNOR gate

4081 7408 Quad two-input AND gate

For more CMOS logic ICs, including gates with more than two inputs, see 4000 series.

Adders (electronics)

In electronics, an adderis a device which will perform the addition, S, of two numbers.In computing, the adder is part of the ALU, and some ALUs contain multiple adders.Although adders can be constructed for many numerical representations, such as Binary-

coded decimalor excess-3, the most common adders operate on binary numbers. In cases

where two's complement is being used to represent negative numbers it is trivial to

modify an adder into an adder-subtracter.

For single bit adders, there are two general types. A half adderhas two inputs, generally

labelledAandB, and two outputs, the sumSand carryoutput Co. Sis the two-bit xorofA

andB, and Cois the two-bit andof AandB. Essentially the output of a half adder is the

two-bit arithmetic sum of two one-bit numbers, with Co being the most significant of

these two outputs.

The other type of single bit adder is the full adderwhich is like a half adder, but takes anadditional input carry Ci. A full adder can be constructed from two half adders by

connecting A and B to the input of one half adder, connecting the sum from that to an

input to the second adder, connecting Cito the other input and orthe two carry outputs.Equivalently, Scould be made the three-bit xor ofA,B, and Ciand Cocould be made the
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three-bit majority function of A, B, and Ci. The output of the full adder is the two-bit

arithmetic sum of three one-bit numbers.

The purpose of the carry input on the full-adder is to allow multiple full-adders to be

chained together with the carry output of one adder connected to the carry input of the

next most significant adder. The carry is said to ripple down the carry lines of this sort ofadder, giving it the name ripple carry adder.

Half adder

Half adder circuit diagram

A half adderis a logical circuit that performs an addition operation on two binary digits.

The half adder produces a sum and a carry value which are both binary digits.

Following is the logic table for a half adder:

Input Output

A B C S

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0
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Full adder

Full adder circuit diagram

A + B + CarryIn = Sum + CarryOut

A full adderis a logical circuit that performs an addition operation on three binary digits.

The full adder produces a sum and carry value, which are both binary digits. It can becombined with other full adders (see below) or work on its own.

Input Output

A B Ci Co S

0 0 0 0 0

0 0 1 0 1

0 1 0 0 1

0 1 1 1 0

1 0 0 0 1

1 0 1 1 0
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1 1 0 1 0

1 1 1 1 1

Note that the final OR gate before the carry-out output may be replaced by an XOR gatewithout altering the resulting logic. This is because the only discrepancy between OR and

XOR gates occurs when both inputs are 1; for the adder shown here, one can check this is

never possible. Using only two types of gates is convenient if one desires to implement

the adder directly using common IC chips.

Ones' complement

Alternatively, a system known as ones' complementcan be used to represent negative

numbers. The ones' complement form of a binary number is thebitwiseNOTapplied to it the complementof its positive counterpart. Like sign-and-magnitude representation,

ones' complement has two representations of 0: 00000000 (+0) and 11111111 (0).

As an example, the ones' complement form of 00101011 (43) becomes 11010100 (43).

The range of signed numbers using ones' complement in a conventional eight-bit byte is

12710to +12710.

To add two numbers represented in this system, one does a conventional binary addition,

but it is then necessary to add any resulting carry back into the resulting sum. To see whythis is necessary, consider the case of the addition of 1 (11111110) to +2 (00000010).

The binary addition alone gives 00000000not the correct answer! Only when the carryis added back in does the correct result (00000001) appear.

This numeric representation system was common in older computers; the PDP-1 and

UNIVAC 1100/2200 series, among many others, used ones'-complement arithmetic.

(A remark on terminology: The system is referred to as "ones' complement" because the

negation of xis formed by subtracting xfrom a long string of ones. Two's complement

arithmetic, onthe other hand, forms the negation ofxby subtractingxfrom a single large

power of two.[1]

)

Two's complement

Two's complement is the most popular method of representing signed integers in

computer science. It is also an operation of negation (converting positive to negative

numbers or vice versa) in computers which represent negative numbers using two's

complement. Its use is ubiquitous today because it doesn't require the addition and

subtraction circuitry to examine the signs of the operands to determine whether to add or
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subtract, making it both simpler to implement and capable of easily handling higher

precision arithmetic. Also, 0 has only a single representation, obviating the subtleties

associated with negative zero(which exists in one's complement).

sign bit

0 1 1 1 1 1 1 1 = 1270 0 0 0 0 0 1 0 = 2

0 0 0 0 0 0 0 1 = 1

0 0 0 0 0 0 0 0 = 0

1 1 1 1 1 1 1 1 = 1

1 1 1 1 1 1 1 0 = 2

1 0 0 0 0 0 0 1 = 127

1 0 0 0 0 0 0 0 = 128

8-bit two's complement integers

Explanation

Two's complement Decimal

0001 1

0000 0

1111 1

1110 2

1101 3

1100 4

Two's complement using a 4-bit integer

Two's complement represents signed integers by counting backwards and wrapping

around.

The boundary between positive and negative numbers may theoretically be anywhere (as

long as you check for it). For convenience, all numbers whose left-most bit is 1 areconsidered negative. The largest number representable this way with 4 bits is 0111 (7)

and the smallest number is 1000 (-8).

To understand its usefulness for computers, consider the following. Adding 0011 (3) to

1111 (-1) results in the seemingly-incorrect 10010. However, ignoring the 5th bit (from

the right), as we did when we counted backwards, gives us the actual answer, 0010 (2).Ignoring the 5th bit will work in all cases (although you have to do the aforementioned

overflow checks when, eg, 0100 is added to 0100). Thus, a circuit designed for addition

can handle negative operands without also including a circuit capable of subtraction (anda circuit which switches between the two based on the sign). Moreover, by this method

an addition circuit can even perform subtractions if you convert the necessary operand

into the "counting-backwards" form. The procedure for doing so is called taking the two's
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complement (which, admittedly, requires either an extra cycle or its own adder circuit).

Lastly, a very important reason for utilizing two's complement representation is that itwould be considerably more complex to create a subtraction circuit which would take

0001 - 0010 and give 1001 (ie -001) than it is to make one that returns 1111. (Doing the

former means you have to check the sign, then check if there will be a sign reversal, then

possibly rearrange the numbers, and finally subtract. Doing the latter means you simplysubtract, pretending there's an extra left-most bit hiding somewhere.)

In an n-bitbinary number, the most significant bit is usually the 2n1

s place. But in the

two's complement representation, its place value is negated; it becomes the 2n1

s place

and is called the sign bit.

If the sign bit is 0, the value is positive; if it is 1, the value is negative. To negate a two's

complement number, invert all the bits then add 1 to the result.

If all bits are 1, the value is 1. If the sign bit is 1 but the rest of the bits are 0, the value is

the most negative number, 2

n1

for an n-bit number. The absolute value of the mostnegative number cannot be represented with the same number of bits, because it is greater

than the most positive number that two's complement number by exactly 1.

A two's complement 8-bit binary numeral can represent every integer in the range 128to +127. If the sign bit is 0, then the largest value that can be stored in the remaining

seven bits is 271, or 127.

Using two's complement to represent negative numbers allows only one representation ofzero, and to have effective addition and subtraction while still having the most significant

bit as the sign bit.

Calculating two's complement

In finding the two's complement of a binary number, thebitsare inverted, or "flipped", byusing thebitwise NOToperation; the value of 1 is then added to the resulting value. Bit

overflow is ignored, which is the normal case with zero.

For example, beginning with the signed 8-bit binary representation of the decimal value

5:

0000 0101 (5)

The first bit is 0, so the value represented is indeed a positive 5. To convert to 5 in two'scomplement notation, the bits are inverted; 0 becomes 1, and 1 becomes 0:

1111 1010

At this point, the numeral is the ones' complementof the decimal value 5. To obtain the

two's complement, 1 is added to the result, giving:
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1111 1011 (-5)

The result is a signed binary numeral representing the decimal value 5 in two's

complement form. The most significant bit is 1, so the value is negative.

The two's complement of a negative number is the corresponding positive value. Forexample, inverting the bits of 5 (above) gives:

0000 0100

And adding one gives the final value:

0000 0101 (5)

The decimal value of a two's complement binary number is calculated by taking the valueof the most significant bit, where the value is negative when the bit is one, and adding to

it the values for each power of two where there is a one. Example:

1111 1011 (5) = 128 + 64 + 32 + 16 + 8 + 0 + 2 + 1 = (2^7 + 2^6 + ...) = 5

Note that the two's complement of zero is zero: inverting gives all ones, and adding onechanges the ones back to zeros (the overflow is ignored). Also the two's complement of

the most negative number representable (e.g. a one as the sign bit and all other bits zero)

is itself. This happens because the most negative number's "positive counterpart" isoccupied by "0", which gets classed as a positive number in this argument. Hence, there

appears to be an 'extra' negative number.

A more formal definition of two's complement negative number (denoted by N*in thisexample) is derived from the equation N * = 2 N

n, where N is the corresponding

positive number and nis the number of bits in the representation.

For example, to find the 4 bit representation of -5:

N(base 10) = 5, thereforeN(base 2) = 0101

n= 4

Hence:

N* = 2 N= [2 ]base2 0101 = 10000 0101 = 1011n 4

N.B. You can also think of the equation as being entirely in base 10, converting to base 2at the end, e.g.:

N* = 2 N= 2 5 = [11]base10 = [1011]base2n 4


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Obviously, "N*... = 11" isn't strictly true but as long as you interpret the equals sign as

"is represented by", it is perfectly acceptable to think of two's complements in this

fashion.

Nevertheless, a shortcut exists when converting a binary number in two's complement

form.

0011 1100

Converting from right to left, copy all the zeros until the first 1 is reached. Copy downthat one, and then flip the remaining bits. This will allow you to convert to two's

complement without first converting to one's complement and adding 1 to the result. The

two's complemented form of the number above in this case is:

1100 0100

Sign extensionDecimal 4-bit two's complement 8-bit two's complement

5 0101 0000 0101

-3 1101 1111 1101

sign-bit repetition in 4 and 8-bit integers

When turning a two's complement number with a certain number of bits into one withmore bits (e.g., when copying from a 1 byte variable to a two byte variable), the sign bit

must be repeated in all the extra bits.

Some processors have instructions to do this in a single instruction. On other processors aconditional must be used followed with code to set the relevant bits or bytes.

Similarly, when a two's complement number is shifted to the right, the sign bit must be

maintained. However when shifted to the left, a 0 is shifted in. These rules preserve the

common semantics that left shifts multiply the number by two and right shifts divide the

number by two.

Both shifting and doubling the precision are important for some multiplication

algorithms. Note that unlike addition and subtraction, precision extension and right

shifting are done differently for signed vs unsigned numbers.

The weird number

With only one exception, when we start with any number in two's complement

representation, if we flip all the bits and add 1, we get the two's complementrepresentation of the negative of that number. Negative 12 becomes positive 12, positive

5 becomes negative 5, zero becomes zero, etc.


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128 1000 0000

invert bits 0111 1111

add one 1000 0000

The two's complement of -128 results in the same 8-bit binary number.

The most negative number in two's complement is sometimes called "the weird number"

because it is the only exception.

The two's complem

computing and informatics class notes for amie

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