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Microelectronics: Analysis and Design January 9, 2003 Sundaram Natarajan

479

CHAPTER 6: POWER AMPLIFIERS AND OUTPUT STAGES

6.0: INTRODUCTION

The analysis and design of small-signal amplifiers were discussed so far. These amplifiers operate

in the linear range, and the output will normally be undistorted. The operation of the transistors is confined

to the active mode. This permitted the use of small-signal models to analyze these circuits. Such small-signal

amplifiers have inherently low power output capability and are not expected to drive low impedance loads

such as speakers and motor drives.

Requirements of Power Amplifiers

In this chapter, we consider power amplifiers. Both discrete and IC power amplifiers will be

examined. These amplifiers usually constitute the output stages in a multistage amplifier. There are somespecific requirements of such amplifiers. Some important ones are:

1. Power amplifiers must have low output impedance so they can drive low impedance loads with no

reduction in the voltage gain.

2. Power amplifiers must deliver a large amount of power while dissipating only a low amount of power

internally; i.e., they must have a high power efficiency. There are two important reasons for this:

(a) While the amplifier is expected to deliver a specific amount of output (load) power, the input

power to the amplifier comes essentially from the dc power supply (Section 1.4) Therefore,

if the amplifier is inefficient, there will be a large drain on the power supply.

(b) The difference between the battery power and the power delivered to the load must be

dissipated by the transistors. If the amplifier is inefficient, the power dissipation ratings of

the transistors must be higher, and large size heat sinks will be required to prevent any

damage to the transistors. High power transistors are expensive, and the size and cost of the

amplifier will escalate.

These reasons clearly suggest the importance of efficiency.

3. Power amplifiers handle large voltage and current signals since they are the final stages of multi-

stage amplifiers. Therefore, the distortion of the output signal is also an important consideration.

These amplifiers should deliver power to a specific load with acceptably low levels of distortion. A

measure of the distortion in the output signal is the total harmonic distortion(THD). In a good power

amplifier, THD should be less than 0.1 %.

4. Since the power amplifiers handle large signals, the small-signal approximations are not generally


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1Sinusoidal signals are used to study and assess the properties of many electrical and electronic circuits. Theproperties of the power amplifiers are studied using a single frequency sinusoidal signal. Therefore, unless otherwise

specified, both input and output signals will be sinusoidal throughout this chapter.

480

valid in the analysis of power amplifiers. Instantaneous values of the signals should be used instead.

However, as mentioned earlier, we cannot accept large distortion either. Therefore, linearity is also

an important consideration in power amplifiers.

In this chapter, we first consider the classification of power amplifiers using the signal-swing

considerations. Then, power amplifiers under the different classifications starting with the simplest

configuration of the emitter follower circuit are discussed. Thermal considerations due to the power

dissipation in the transistors are included. Also examined are short-circuit protection and current-limiting

features. We conclude the chapter with a discussion on power MOSFETs.

6.1: CLASSIFICATION OF POWER AMPLIFIERS

Power amplifiers are classified according to the waveform of the collector current (drain current if

FETs are used). They are Class-A, Class-AB, Class-B, and Class-Camplifiers. While the first three types of

amplifiers find wide use in the audio power applications, the Class-C operation is usually employed in the

RF (radio frequency) power amplifiers. In this chapter, we focus on the first three categories only.

In the Class-A operation, the BJT is biased with a dc bias currentICQso the instantaneous value of

the collector current never becomes zero. The waveform of the collector current under the Class-A operation

is shown in Fig. 6.1.1(a) using a sinusoidal signal1as an example. The transistor conducts during the entire

cycle, and the collector current never goes to zero. This is like any other small-signal amplifier addressed in

the earlier chapters. All small-signal linear amplifiers belong to the Class-A category. Therefore, in a Class-A

power amplifier, the distortion will be the least. The value ofICQ

is typically chosen to be equal to half the

maximum expected value of the collector current. This provides the maximum symmetrical signal-swing and

maximum efficiency in this category.

In the Class-B operation, the transistor is biased to operate with a zero bias current; i.e.,ICQ= 0. With

sinusoidal inputs, the collector current exists during either the positive or negative half cycles only. Therefore,

the waveform of the collector current of a npntransistor will be as shown in Fig. 6.1.1(b). With the same

input, apnptransistor will conduct during the negative-half cycles of the input only. Since the input voltage

has to overcome the cut-in voltage of the base-emitter junction, the collector current will be distorted near

the zero crossings. This situation is exactly similar to what exists in a half-wave rectifier. If only one

transistor is used to amplify signals with Class-B operation, the output will be heavily distorted. Fortunately,


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481

Fig. 6.1.1: Collector current waveforms of thenpntransistors operating in (a) class-A, (b) class-B, (c) class-AB, and (d) class-C power amplifiers.

(a)

Im

iC(t)

ICQ

0 2 3 4 t

(b)

iC(t)

0 2 3 4 t

Im

(c)

iC(t)

0 2 3 4 t

Im

ICQ

(d)

iC(t)

0 2 3 4 t

both halves of the input signal can be amplified using the complementary symmetry (push-pull) arrangement.

With this arrangement, the power amplifier will be highly efficient because there is no dc power dissipation

under the quiescent conditions, i.e., with no input signal.

To avoid the distortion during the zero crossings, each transistor in the push-pull arrangement can

be biased with a small dc bias current so that the conduction angle is more than 180 as shown in Fig.

6.1.1(c). This is called the Class-AB operation because this operation is intermediate between the Class-A

and Class-B operations. Of course, the efficiency will reduce in comparison to the Class-B operation because

of the quiescent dc power dissipation but the distortion during the zero-crossings can be avoided. However,

in all types of power amplifiers, whether it is Class-A, -AB, -B, the distortion due to the transistor saturation

cannot be avoided. Therefore, the maximum signal-swing should be limited to the transistor saturation levels,

and we assume this to be the case throughout this chapter.


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482

Fig. 6.2.1: (a) A class-A power amplifier with a constant-current source biasing, and (b) its

transfer characteristics.

+VCC

Q1

Q3

+vI

Q2

IREF

R

IBIAS

iE1

+vOiL

RL

+

-

vBE1

-VEE

vBE1

vI

vO

VCC

-VCES1

-(VEE

-VCES2

)

-IBIAS

RL

In the Class-Coperation, the transistor is biased to conduct for less than half a cycle as shown in Fig.

6.1.1(d). This type of operation is used in RF power amplifiers (in radio and TV transmitters), where

efficiency is required to be very high. The output waveform is almost pulsating. The output is fed to an LC

tank circuit, which essentially operates as a tuned amplifier (see Fig. 1.9.3) and selects the fundamental

component for further amplification. Although the Class-C amplifier is very efficient, it is only used in some

special applications where high power is delivered to the load. The analysis of the Class-C amplifier is tedious

and beyond the scope of this book.

6.2: CLASS-A POWER AMPLIFIERS

The simplest power amplifier is an emitter(or the source) follower. A Class-A power amplifier using

a constant-current source biasing, along with its transfer characteristic, has been reproduced here in Fig. 6.2.1

(see Fig. 3.6.9). Emitter- and source-followers have been analyzed in the earlier chapters for their small-signal

behavior. Now we consider their large-signal operation and power efficiency. This circuit may be used in a

discrete design also. To keep the analysis simple, it is assumed that 1 for the BJTs in this and future

sections.

Power Dissipation and Efficiency

A power amplifier is designed to deliver a specified maximum value of the average amount of power

to a given load. It is convenient to assume the output signal to be a sinusoid and develop all the equations in

terms of its amplitude. Thus, let


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2In calculating the total power drawn from the power supplies, we neglect the average power drawn from thenegative power supply by the bias resistanceR. We discuss its influence soon.

483

vO

( t) Vm

sin t, (6.2.1)

vCE1

VCC

vO

VCC

Vm

sin t, and iC1

iE1

IBIAS

(Vm

/RL

) sin t. (6.2.2)

pD1

vCE1

iC1

VCC

IBIAS

(V2

m /RL ) sin2 t (V

CC/R

L) I

BIASV

msin t. (6.2.3)

pD1

VCC

IBIAS

(V2

m /RL ) sin2 t. (6.2.4)

PD2

1

T

t T

t 0

(Vm

sin t VCC

)IBIAS

dt VCC

IBIAS

. (6.2.5)

PD1

1

T

t T

t 0

VCC

IBIAS

V2

m

RLsin2 t d t V

CCI

BIAS

V2

m

2RL. (6.2.6)

where Vm VCC. Then, we find that

The input current from the signal source is very small in comparison to the collector currents of the

transistors. Therefore, in power calculations, the power input from the signal source is ignored, and the input

power to the circuit is assumed to be the power supplied by the power supplies only (see (1.4.1)). The power

dissipation in a transistor, also known as the collector-dissipation, is mainly due to the collector current (see

(1.4.2)). The instantaneous value of the power dissipation in Q1is

If VCC =IBIASRL, the above equation reduces to

The maximum power dissipation equal to (VCCIBIAS) occurs in Q1at t= 0 or if Vmis zero (there is no

signal). Therefore, Q1must be able to dissipate this power without any increase in its junction temperature.

However, ifRL (when no load is connected to the amplifier), we find from (6.2.3) that the maximum

power dissipation can be as much as (VCC+ Vm )IBIAS, when sin(t) = -1. Since such a special condition exists

only at specific instants of time and is not sustained, the design need not be this conservative; it is sufficient

if the transistor power dissipation rating is greater than (VCCIBIAS). Another possible extreme condition isRL

= 0 (short-circuit). Under this condition, the transistor Q1may draw a large current, and consequently, its

junction temperature will start increasing. If this condition persists even for a small period, the transistor will

be damaged. Therefore, most power amplifiers are provided with ashort-circuit protection(see Fig. 6.4.7).

The collector current of Q2has a constant value ofIBIAS. Taking VCC= VEE, its maximum collector-

dissipation is [(VCC + Vm )IBIAS] and occurs when vO(t) reaches Vm. This again is only an instantaneous

maximum but not the average. The average power dissipation in Q2is

The (average) power dissipation in Q1is

The power conversion efficiency is calculated as the percentage of the useful (average) power PL

supplied to the load to the total powerPSdrawn from the dc sources (see (1.4.4)). We can find the latter2as


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484

PS

PD1

PD2

PL

,

PL

1

T

t T

t 0

V2

msin2 t

RL

dtV

2

m

2RL

. (6.2.7)

P

L

PS

1

4

V2

m

VCC

IBIAS

RL

1

4

V2

m

V2

CC

. (6.2.8)

RLeff

a 2RL

, (6.2.9)

vO ( t) Vmsin t.

ICmax

(VCC

aVm

)

a 2RL

, and ICQ

aVm

a 2RL

Vm

aRL

. (6.2.10)

where

Therefore,PS

= (2VCC

IBIAS

), and the efficiency is

The efficiency is maximum if Vm= VCC, and the maximum attainable efficiency is only 25%. Since

the biasing resistor R also draws a current approximately equal toIfrom the negative power supply, we have

to add another (VCCIBIAS) toPS. If so, the maximum power efficiency will only be 16.7%, when this biasing

scheme is used. If the amplitude Vmof the output signal is close to the value of VCC, considerable distortion

of the output can occur due to saturation of the transistors. Therefore, the value of Vmshould be less than VCC.

Then, the efficiency will be even lower than 16.7% in this circuit.

A Transformer coupled Class-A Power Amplifier

In the audio power applications, one uses mostly a single power supply scheme, and the load

resistance is capacitively coupled to the emitter follower (see Fig. 3.8.5). However, with the use of a

transformer coupling, the maximum efficiency can be increased to almost 50%. The emitter follower circuit

with a transformer coupling and its load lines are shown in Fig. 6.2.2. The transformer can also serve the

purpose of providing impedance matching between the load and the output resistance of the amplifier, which

is an added advantage. This helps to transfer maximum power to the load.

The resistance of the transformer primary coil is negligible and is almost a short-circuit for dc.

Therefore, the dc load line will be almost vertical. However, for sinusoidal signals, the effective resistance

on the primary side is

where ais the turns-ratio (n1/n2). Therefore, the slope of the ac load line will be (-1/RLeff). Let the output

voltage be

Then, the sinusoidal signal across the collector-emitter terminals will have an amplitude of (aVm) around VCC.

The maximum and dc bias values of the collector current are


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485

VCC

aVm

, and ICQ

ICmax

2

VCC

a 2RL

. (6.2.11)

PS

VCC

ICQ

V2

CC

a 2RL

. (6.2.12)

P

LP

S

12

a 2 V2

m

V2

CC

. (6.2.13)

PD (VCCICQ / 2 ) .

PD

VCC

ICQ

.

Fig. 6.2.2: (a) A transformer-coupled power amplifier and (b) its load lines.

(a)

QR

B1

RB2

+vI

iE

iL

n1

:n2

+vO

+VCC

RL

(b)

VCC

VCC

+ aVm

vCE

ICQ

ICmax

dc load line,

slope

iC

0

ac load line,

slope =-1

RLeff

To obtain the maximum symmetrical signal-swing,ICQmust bisect the ac load line (see Fig. 3.8.3); i.e., the

following conditions must be fulfilled:

The average current drawn from the power supply isICQ. Therefore,

(6.2.7) gives the load power in this circuit also. Therefore, the efficiency is

Since Vm (VCC/a), the maximum attainable efficiency is 50%. In this calculation, the power dissipation in

RB1 and RB2 has been ignored. Therefore, the actual efficiency will be lower than 50%. However, in

comparison to the previous Class-A amplifier, the efficiency has doubled for the same supply voltage and the

amplitude of the output signal.

If Vm= (VCC/a), the collector-dissipation is equal to the power dissipation in the load because the

efficiency is 50%. The average power dissipation in the BJT is then

However, with no input signal, the maximum average collector-dissipation is

Therefore, transistor power dissipation rating should exceed twice the maximum power dissipation in the

load; i.e.,


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486

PD

2PLmax

, (6.2.14)

Vm

2PLR

L4 V .

ICQ

VCC

a 2RL

12

94

1

3

A .

2

4 0.40345.4 %.

wherePLmaxoccurs for Vm= (VCC/a).

Example 6.1 (Design)

Using the circuit of 6.2.2, design a power amplifier to supply a maximum load power of 2 W to a 4-

load. Assume that VCC= 12 V.

SOLUTION

Using (6.2.9),

For maximum efficiency, the transformer turns-ratio is Next, using (6.2.11), we find thata (VCC

/Vm

) 3 .

The current rating of the transistor should exceed 2ICQ= (2/3) A, and its power rating should exceed (VCCICQ)

= 4 W. The maximum signal-swing across the collector-emitter terminals is (2VCC), which is 24 V. Since we

need a relatively low current device, a general purpose transistor such as 2N2270 may be used in this circuit.

It has VCEO= 45 V, andICmax= 1 A. Usually, a general purpose transistor cannot be used in power applications

without a heat sink. With a heat sink provided, the maximum power dissipation rating for this transistor is

5 W. Thus, the power dissipation rating is also satisfied.

The typical value of the base-emitter voltage is about 0.88 V atIC= 150 mA, and hFE= 135 at this

current for this transistor. Therefore, we use the same value in this design, although we require (1/3) A.

Allowing (ICQ /10) throughRB2, since the dc voltage drop acrossRB2should be 0.88 V, a standard value of

may be selected. The current throughRB1should be (IB+ICQ /10) = 35.8 mA, and the voltageRB2 27

drop acrossRB1should be about 11.12 V. Therefore,RB1should be 310.6 . We select a standard resistance

of RB1

330 .

Let us calculate the efficiency of this design including the power dissipation inRB1andRB2. The total

power dissipated in these two resistors is about 403 mW. Then, including this power dissipation, the

efficiency is


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487

TJmax

TC

JC

PD

, (6.2.15)

Fig. 6.2.3: The typical power derating characteristic of a transistor.

PD

PDmax

0T

CO T

Jmax T

C

slope =-1

JC

Power Dissipation and Thermal considerations

The power dissipated in a transistor generates heat and causes an increase in its collector-base

junction temperature. In an improper design, the temperature increase may damage the transistor permanently.

Therefore, the designer should choose a power transistor with appropriate power rating and should also

consider the details of the heat sink that may be necessary for a given application. Let us now address the

effect of the power dissipation on the junction temperature.

The junction temperature of a transistor should be kept below the maximum allowable junction

temperature TJmax. For silicon transistors, the value of TJmaxis about 150 to 200 C, and the manufacturers

usually specify this value. The heat is transmitted from the junction to the case and then to the environment.

Unless this heat is taken away from the case as fast as it reaches, the case temperature and the temperature

at the environment will also increase. If so, for a given amount of power dissipation, the junction temperature

increases. The ambient temperature decides how fast the heat can be transferred away from the case, and

therefore, how much power can be dissipated in a transistor.

The manufacturers usually provide the maximum power dissipation and thepower derating curve,

similar to the one shown in Fig. 6.2.3, for a transistor. In this plot, TCis the case temperature, and TCOis

typically about 25 C. The value of TJmaxcan be read from the point where the curve (a straight line) cuts the

temperature axis; i.e., if TC= TJmax, the transistor cannot transfer any heat from the junction to the case and

hence cannot dissipate any power. Nonzero power dissipation is possible, only if TC< TJmax. For TC< Tjmax,

we can find the maximum permissible power dissipation level of the transistor at a specified case temperature

TCfrom this curve. The manufacturers also give the slope of this curve, known as the power derating factor,

the unit of which is W/ C. The linear portion of the power derating curve can be described by

wherePDis the permitted power dissipation at a case temperature TCand JCis called the thermal resistance

expressed in C/W. The value of the thermal resistance value can be computed from the inverse of the slope


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488

TJmax

TA

(JC

CS

SA

)PD

JA

PD

,(6.2.16)

PD

(TJmax

TC

)

JC

100

0.875114.3 W.

TJ

TC

0.875 100 157.5 C.

of derating characteristic. Usually, the manufacturers provide the thermal resistance JCfrom the junction to

the case. Sometimes, they also provide the value of JA, which is the thermal resistance from the junction to

the ambient without any heat sink added. With a heat sink, one has to take the thermal resistance of the heat

sink also into account. Including all the effects, we can write that

where CSis the thermal resistance from the case to the heat sink, and SAis the thermal resistance of the heat

sink to the ambient. Without a heat sink, JA= JC+ CA. It should be noted that the thermal resistance from

the case to the ambient without a heat sink would be much greater than the effective thermal resistance (CS

+ SA) with a heat sink. Hence the need is for a heat sink.

Example 6.2

A 200-W power transistor is operated at a case temperature of 100 C with no heat sink. Its maximum

allowable junction temperature is 200 C and JC= 0.875 C/W. (a) Find the maximum allowed power

dissipation. (b) If TC= 70 C, and the transistor dissipates 100 W, find the junction temperature.

SOLUTION

(a) Using the values of JCin (6.2.15),

Obviously, the maximum power dissipation should not exceed 114.3 W, although its maximum power rating

of the transistor is 200 W.

(b) Using (6.2.15) again, we find that

Although the thermal resistance from the junction to the case is typically small, the thermal resistance

from the junction to the ambient JAis usually high with a typical value of 60 C/W. Assume that a transistor

has a maximum power rating of 60 W, JA= 60 C/W, and TJmax= 150 C. If it is to be operated at a room

temperature of 25 C, the transistor can only dissipate 2.1 W.


A 200-W power transistor has TJmax= 200 C and JC= 0.875 C/W. It has a typical value of CS=


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489

JC

CS

SA

(TJmax TA )P

D

200 2550

3.5 C/W .

SA

3.5 /W 0.875 C/W 1 C/W 1.625 C/W.

1 C/W. It is operated with a heat sink. If the transistor power dissipation is 50 W and the ambient temperature

is 25 C, what can be the maximum value of the thermal resistance of the heat sink to the ambient?

SOLUTION

Using (6.2.16), we find that

Substituting the values for JC= 0.875 C/W and CS= 1 C/W, the thermal resistance of the heat sink should

be limited to

Therefore, any heat-sink with a thermal resistance less than 1.625 C/W is acceptable.

6.3: CLASS-B POWER AMPLIFIERS

A maximum efficiency of 50% is obtained in a transformer-coupled Class-A power amplifier. This

circuit configuration, however, cannot be realized in an IC because of the presence of the transformer. The

efficiency can be improved considerably with Class-B operation both in IC and discrete circuits. Virtually,

in all practical applications, either the Class-B or its modification, Class-AB operation, is used.

A Class-B Power Amplifier using a Complementary pair of BJTs

The basic Class-B circuit, using a complementary pair of npnandpnptransistors, is shown in Fig.

6.3.1(a). This circuit is essentially a combination of two emitter follower circuits. If vIis zero, both Q1and

Q2do not conduct, and iL= vO= 0. We can prove this using the contradiction principle. Assume that vI= 0

and Q1conducts. If so, iL> 0 and vO> 0. If vI= 0 and vO> 0, vBE1< 0. For Q1to conduct, vBEmust be positive

because it is an npntransistor. This contradicts our original assumption. Using a similar argument, it can be

proven that, if vI= 0, thepnptransistor does not conduct either. Since both transistors do not conduct, vO 0.

Circuit Operation

Each transistor operates in the Class-B mode and conducts during alternate half cycles of the input

signal. At the output, the half cycles are combined to obtain the replica of the input signal. During the positive

half cycle, the npntransistor pushes the current iE1into the load, and thepnptransistor pulls the current iE2

from the load during the negative half-cycle. Therefore, another name for this amplifier is thepush-pull

amplifier. Q1and Q2operate as emitter followers during the positive and negative half cycles respectively.

If vIgoes positive, Q1conducts for vI V, whereas Q2does not. If Q1conducts, the load draws current from


12/48


490

vO vI V , vI V . (6.3.1)

PL

(V2

m / 2RL ) . (6.3.2)

IC1

1

T

t T/2

t 0

(Vm

/RL

) sin ( t)dt Vm

/ (RL

) .(6.3.3)

IC2

Vm

/ (RL

) . (6.3.4)

Fig. 6.3.1: A class-B power amplifier and its transfer characteristic.

(a)

iE2 R

LiL

iE1

Q1

+VCC

-VCC

+vO

+vI

Q2

+

-vBE1

+

-vBE2

(b)

vO

V

-V

vI

VCC

-VCC

the positive power supply, and vOincreases positively. Thus, during the positive cycle of vI,

vOcan only reach a maximum value of VCCbecause the transistor Q1will saturate for a sufficiently large

positive input. If vIgoes negative, Q2conducts and Q1does not; vOalso goes negative. For a sufficiently large

negative value of vI, vOwill reach a negative maximum of -VCC if Q2 saturates. Therefore, the transfer

characteristic will be as shown in Fig. 6.3.1(b). Since the transistors do not conduct for vI V, where V

stands for the cut-in voltages of the transistors, there is a dead zonein the transfer characteristic around vI=

0. If vIis a sinusoidal signal, the waveform of the output voltage will be as shown in Fig. 6.3.2(a). The

waveforms of the emitter and output currents are also shown in this figure.

The distortion near the zero-crossing of the output signal is called thezero crossover distortion.

Reducing or eliminating the distortion is possible. Ignoring the crossover distortion and approximating vO(t)

as a sinusoid, the load power is same as the one given by (6.2.9); i.e.,

Efficiency

The average current drawn from the positive power supply is

The average current drawn from the negative power supply (In fact, the current sinks into the negative supply)

has equal value in magnitude but is negative, and therefore,

Therefore, the total power drawn from the power supplies is


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491

PS

VCC

IC1

VCC

( IC2

) (2VCC

Vm

) / (RL

) . (6.3.5)

P

L

PS

4

Vm

VCC

. (6.3.6)

PLm ax

V2CC

2RL

.

Fig. 6.3.2: The waveforms of varuous signals in the class-B amplifier of Fig. 5.3.1. (a) vO(t),

(b) iL

(t), (c) iE1

(t), and (d) -iE2

(t).

(b)

T2

T t

iL

(t)

03T2

Vm

RL

-Vm

RL (d)

T2

T t

iE2

(t)

03T2

Vm

RL

-Vm

RL

(a)

T2

T t

vO(t)

Vm

-Vm

0 3T2

(c)

T2

T t

iE1

(t)

0 3T2

Vm

RL

-Vm

RL

Using (6.3.2) and (6.3.5), we find that

If the amplitude of the sinusoid Vmequals the value of VCC, the efficiency reaches its maximum of

78.5%. The corresponding load power is

Clearly, the efficiency of the Class-B amplifier is much higher than the efficiency of the Class-A power

amplifier. This is the most important reason for its popularity in both IC and discrete circuits. Furthermore,

if vI= 0, the quiescent power dissipation in the transistors is zero. Another advantage of the Class-B operation

also exists. If Vmis less than VCC, the efficiency decreases linearly in a Class-B amplifier whereas being


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492

PD

PD1

PD2

1

2(P

S P

L)

VCC

Vm

RL

1

4

V2

m

RL

. (6.3.7)

Vm ( 2VCC) / . (6.3.8)

PDm ax

VCC

RL

2VCC

1

4

2VCC

2

1

RL

V2

CC

2RL

2

2P

Lm ax, (6.3.9)

Fig. 6.3.3: The collector dissipation as a function of the amplitude of the output sinusoid in the

class-B power amplifier.

Vm

PD

PDmax

VCC2V

CC

= 50%

0

= 78.5%

proportional to (Vm/VCC)2, it decreases quadratically in a Class-A amplifier. For values of Vmless than VCC,

the percentage decrease in the efficiency of the Class-B amplifier will be lower than the percentage decrease

in the efficiency of the Class-A amplifier.

Power Dissipation in the TransistorsBecause of the symmetry, the power dissipation in both transistors should be equal. Therefore, if we

subtract the load power from the total power drawn from the power supplies, it should be twice the power

dissipated in each transistor. Thus, the power dissipation in each transistor is

Unlike in Class-A amplifiers, the average power dissipation depends on the value of Vm in a Class-B

amplifier. The plot ofPDas a function of Vmis shown in Fig. 6.3.3.

Under the quiescent conditions (Vm= 0), the collector-dissipations are zero. For some value of Vm,

the collector-dissipation reaches a maximum value. To find the condition for the maximum collector-

dissipation, we can differentiatePDwith respect to Vmand equate it to zero. Solving such an equation, it can

be shown thatPDreaches the maximum value, if

Substituting this value of Vmin (6.3.7), the value ofPDmaxis

wherePLmax=PLwhen Vm= VCC. Therefore, to select the transistors in this circuit, the above equation is used


15/48


493

PL

V2

m / (2RL ) 20 W .

VCC

20 V .

PDm ax

V2

CC/ (2R

L) 5.066 W .

ICmax

(Vm

/RL

) (VCC

/RL

) 2.5 A .

to specify their power dissipation rating. In the Class-A amplifier with the transformer coupling, the collector

power dissipation should be greater than 2PLmax(see (6.2.16)). This means that, for the same load power

delivery, the collector-dissipation of the transistor in a Class-B amplifier should only be approximately 10%

of what it is in a Class-A amplifier. In the design Example 6.1, the same 2-W power could have been

delivered with transistors having only about 0.4 W power dissipation rating had we used the Class-B

configuration. If the amplitude Vmof the sinusoid is equal to the value given by (6.3.8), the efficiency will

only be 50%. Typically, the efficiency of the Class-B amplifiers is somewhere between 50% and 78.5%.


Design the push-pull Class-B amplifier to deliver a maximum power of 20 W to an 8-load.

SOLUTION

The amplitude of the sinusoidal signal at the output can be computed from

Using the value ofRL= 8, we find that Vm= 17.89 V. To avoid the distortion of the output due to saturation,

we choose

The maximum collector-dissipation can be found using (6.3.9), and thus,

The maximum current through the transistors is

If vO(t) reaches -VCC, the maximum value of VCEin Q1is about 38 V. Similarly, the maximum value

of VECin Q2should also be about 38 V. Therefore, we select a complementary pair of transistors, MJE180

(npn) and MJE170 (pnp) from Motorola, which satisfy the required power, current, and voltage ratings. These

transistors have a continuous current rating of 3 A, and VCEO= 40 V. With a heat sink provided, their power

dissipation rating is 12.5 W, which is more than twice the required value.

Single Supply Schemes

A Class-B power amplifier can also be designed with transformer coupling using a single power

supply. This circuit is shown in Fig. 6.3.4. One should note that the center-tapped secondary of the

transformer at the input enables the use of the npn-type for both transistors. This amplifier works in about the

same way as the previous circuit does. The load current reconstructed with the use of the center-tapped

transformer at the output will be similar to the one shown in Fig. 6.3.2(b). All the waveforms will be similar


16/48


17/48


495

sin 1 V

Vm

. (6.3.11)

vO

( t)n 1n odd

Vmn

sin(n t) . (6.3.12)

VHeff

1

2 n 3n odd

V2

mn . (6.3.13)

THDeffective value of all harmonics

effective value of the fundamental

VHeff

Vm1

/ 2

n 3n odd

V2

mn

Vm1

.(6.3.14)

V2

Heff

1

T

T

t 0

v2

O ( t)dtV

2

m1

2. (6.3.15)

THD1

V2

m1

2

T

T

t 0

v2

O ( t)dt 1 . (6.3.16)

vO(t) is an odd function since vO(-t) = -vO(t). Also, vO(t) has half-wave symmetry in that vO(t+T/2) = -vO(t) for

all t. The Fourier series representation of an odd function with half-wave symmetry will have the fundamental

and odd harmonic sine terms only. Therefore, vO

(t) can be represented in terms of its fundamental and odd

harmonics as follows:

In the above sum, n= 1 corresponds to the fundamental, and the other components are the harmonics. Vm1is

the amplitude of the fundamental, and its effective value is (Vm1/ 2). The effective value (rms) value of all

the harmonics put together is

The total harmonic-distortionis defined with

Using Parseval's theorem,

Using the above in the definition for THD,

The percentage THD can be found by multiplying the above result with 100.

The value of the term inside the square-brackets in (6.3.16) is nothing but twice the amount of power

dissipated by the output voltage vO(t) in a 1-resistor. The amplitude of the fundamental component of vO(t)

described in (6.3.10) is


18/48


496

Vm1

2

T

T

t 0

vO

( t)sin t d t V m

12

sin(2 )

4cos

V. (6.3.17)

2

T

T

t 0

v2

O ( t)dt (V2

m 2V2

) 12

V2

m sin(2 )

8Vm

Vcos

. (6.3.18)

Vm1

2

T

T

t 0

vO

( t)sin ( t)dt 4.11 V, and2

T

T

t 0

v2

O ( t)dt 17.04

Fig. 6.3.6: A scheme to reduce the crossover distortion in a class-B power amplifier.

RL

iL

Q1

+VCC

+vO

+vI

Q2

+

-

+vX

RB

Ad

-VCC

Also, for the same vO(t),

For a given set of values for Vmand V, the value of can be computed using (6.3.11). We can then find the

values of Vm1and the square-bracketed term in (6.3.16) using (6.3.17) and (6.3.18) respectively. Knowing

these values, the value of THD can be calculated. As an example, if Vm= 5 V and V= 0.7 V, = 0.1405

radians. Using this value of , we find that

Using these values in (6.3.16), THD = 8.9%. In an inexpensive audio power amplifier, this may be tolerable.

However, in a good high-fidelity system, the THD should be less than 1%, and the crossover distortion in the

Class-B power amplifier may be unacceptably high.

The zero crossover distortion can be reduced significantly using an op amp with negative feedback

as shown in Fig. 6.3.6. In this circuit, the output signal is compared with the input signal in the same way as

in the voltage follower circuit of Fig. P1.43. The operation of this circuit is similar to the regular Class-B

amplifier except that the dead zone is greatly reduced. LetAdbe the difference-mode gain of the difference

amplifier. If vI= 0, then vO = 0, and vX= 0. Neither Q1nor Q2conducts. If vIincreases positively, vXincreases

positively; Q1starts to conduct when vX= Vor vI= (V/Ad), and vOstarts to increase thereafter. Similarly, if

vIgoes negative, vOalso goes negative except when vI = (V/Ad). Clearly, the dead zone is now limited to

time intervals during which vI = (V/Ad), rather than vI = Vif the op amp is not used. Let us now relate


19/48


497

vO

vX

V,

vO

Ad

(vI

vO

) V.

vO

Ad

1 Ad

vI

V

1 Ad

. (6.3.19)

vO

vI

70 V .

vOand vIwhen either Q1or Q2conducts Neglecting the base-bias currents of Q1and Q2and the voltage-drop

acrossRB,

where Vis the cut-in voltage of the base-emitter junctions of Q1and Q2. The "-" sign holds, if vOis positive,

and the "+" holds, if vO

is negative. Since vX

=Ad

(vI

- vO

),

Solving the above equation, the output voltage is

IfAd= 10,000 and V= 0.7 V,

Clearly, the op amp works in the buffer mode of Fig. P1.43, and the dead zone becomes insignificant in the

transfer characteristic. Therefore, the crossover distortion is almost be eliminated at the output. However, such

an elaborate arrangement is not a practical solution to reduce the distortion. A better solution is to use the

Class-AB operation, where a small nonzero bias current is used.

6.4: CLASS-AB AMPLIFIERS

By operating the transistors in the push-pull amplifier with a small dc bias collector currentICQ, the

distortion caused by the dead-zone can be eliminated. Therefore, the Class-AB operation is very popular in

both IC and discrete designs.

A Class-AB Power Amplifier using a Diode-scheme

A Class-AB amplifier and its transfer characteristic are shown in Fig. 6.4.1. The two diode-connected

transistorsD1andD2are biased by a constant-current sourceIBIAS. Even if vI= 0, a part of the currentIBIAS

flows through the diodes generating the bias voltage VBB. This bias voltage keeps Q1and Q2on. Therefore,

there is no "dead zone" in this characteristic; the crossover distortion will be absent. The various current

waveforms are shown in Fig. 6.4.2. There is an important advantage in this scheme. An increase in the

collector current increases the power dissipation, which, in turn, increases the junction temperature of the

output BJTs. Any increase in the temperature causes a decrease in the diode voltage and a decrease in VBB,

since the diode-connected transistors are in the same neighborhood in an IC. A decrease in VBBcauses a

reduction in the collector currents of the power transistors. Thus, there is a thermal tracking, and the output

transistors are protected from the thermal runaway.

Assume that both Q1and Q2have the same junction areas, and the junction areas ofD1andD2are also


20/48


498

Fig. 6.4.1: A class-AB power amplifier using a diode scheme, and (b) transfer characteristic.(a)

RL

iL

Q1

+VCC

-VCC

+vO

vI

Q2

+

vBB

-

+-

D1

D2

IBIAS

(b)

vO

-V

vI

VCC

-VCC

slope 1

Fig. 6.4.2: Waveforms of collector and load currents in a class-AB power amplifier. The

collector currents and the load current are concident except near the zero

crossing. Observe that the load current is not distorted as in class-B operation.

0

ICQ1

iCQ2 I

CQ2

t

Amplitude of the current

iL

iCQ1

2

equal. However, the junction areas of the diodes need not be as large as the junction areas of the output

transistors because the diode-connected transistors need to carry only a low bias current in the order of base-

bias current of Q1. Let the junction area of the power transistors be n-times the junction area of the diode-

connected transistors. If so, the saturation current of the output transistors will be n-times the saturation

current of the diodes. The voltage VBBprovides the bias for the output transistors. The dc component of vIis

usually such that the dc component of vOis zero. Therefore, under the quiescent conditions, assume that vO


21/48


499

VBB

2VTln [I

BI AS(I

CQ/

dc1) ] /I

S2V

Tln[I

CQ/ (nI

S) ], (6.4.1)

ICQI

BI AS1/n 1/

dc1

n IBI AS, if dc1 n . (6.4.2)

PS

2VCC

[Vm

/ (RL

) ICQ

] . (6.4.3)

PD1 PD2 12

(PS PL ) VCCV

mR

L

ICQ 14

V2

mR

L

. (6.4.4)

PDm ax

VCC

VCC

2RL

ICQ

. (6.4.5)

= 0. There is a collector bias current ICQin Q1and Q2, and the current through the diodes will be [IBIAS-

(ICQ/dc1)]. Therefore,

whereISis the saturation current of the diodes. Solving the above, the value ofICQis

For a given value ofICQ, which is usually less than 10% of the maximum load current, the value of

IBIAScan be made as small possible (not zero, of course) by choosing a large value for n. However, there is

a limit to the minimum value ofIBIAS, which limits the maximum value of n. If the base-bias current in Q1

becomes a substantial portion ofIBIAS, the diode current will reduce. This, in turn, will reduce the value of

VBB. There should be a minimum diode current to maintain the output transistors in the active-mode.

Therefore, there is a need for a minimum value forIBIAS. For a givenICQ, the value of ncannot therefore be

arbitrarily large, and the junction area of the diode-connected transistors cannot be too low.

Because of the collector-bias current in Q1 and Q2, there is a quiescent power dissipation. The

equations derived in Section 6.3 for the total power drawn form the power sources and the collector-

dissipation must be modified to account for the quiescent power dissipation. The equation (6.3.5) for PS

should be modified to

The power dissipation in each transistor also increases to

The maximum power dissipation in the output transistors will be


In the Class-AB power amplifier of Fig. 6.4.1, VCC= 12 V,RL= 100 , and vO(t) = 10sin(t) V. The

input bias voltage is such that the dc output offset is zero. The power transistors haveIS= 0.1 pA, Q1= 100,

and VA1= 100 V. The diode-connected transistors have athe junction area of the power transistors. If a

minimum diode current of 1 mA is required, find the minimum value for the bias currentIBIAS. Find the value

ofICQthrough the transistors. Also, calculate the efficiency of the power amplifier and the required power

rating for the power transistors. Find the harmonic components in vO(t) up to 10thharmonic using PSPICE


22/48


500

ICmax ILm ax (12 / 0.1) 120 mA .

IBIAS

(ICmax

/dc1

) 1 2.071 mA .

ICQ

IBIAS

1/3 1 /1126.051 mA .

PL

V2

m

2RL

102

21000.5 W .

PS

2 12 ( 31.83 6.051 ) 909.1 m W.

simulation. The transient analysis is required for this purpose. Find the percentage of THD assuming that the

amplitudes of components beyond 10thharmonic are insignificant.

SOLUTION

Under the quiescent conditions, VO= 0, and dc1= 112. The maximum collector current in Q1is

Since the minimum diode current should be 1 mA, the value ofIBIASshould be at least

Then,

In this scheme, once the value ofIBIASis chosen, there is no control onICQexcept through the value of n. To

lower the value ofICQ, we have to lower the value of n. This emphasizes the point that we cannot increase

nto a high value.

The power absorbed by the load is

Using (6.4.3), we find that

Therefore, the efficiency is Using (6.4.5), we find that the maximum power dissipation in the output55%.

power transistors is 0.219 W. Therefore, a transistor should be adequate in this application.1/4 W

The transient analysis was carried out with a sinusoidal input signal with an arbitrarily chosen

amplitude of 10 V and a frequency of 1000 Hz. The plot of the output signal is shown in Fig. 6.4.3. There

was an output offset voltage of about 6.299 mV. Otherwise, the output is very close to a sinusoidal signal.

The Fourier analysis was also carried out, and the amplitudes of the harmonics up to the 10thwere obtained.

These values are available in the output file along with the value of THD and are listed here in Table 6.1. The

THD is about 0.15%. The total harmonic distortion is indeed very small as anticipated in a Class-AB

amplifier.


23/48


501

IBIAS

IC3

IR

. (6.4.6)

VBB VBE3 ( 1 R1 /R2 ) , (6.4.7)

VBE3

VT

ln (IC3

/IS3

) . (6.4.8)

Fig. 6.4.3: The waveform of the output signal in Design Example 6.5

Time in ms

OutputvoltagevO

0 0.5 1.0 1.5 2.0 2.5 3.0-10.0 V

-5.0 V

0 V

5.0 V

10.0 V

Table 6.1: The amplitudes of the fundamental and the other harmonics in Example 6.5.

NORMALIZEDPHASENORMALIZEDFOURIERFREQUENCYHARMONIC

PHASE (DEG)(DEG)COMPONENTCOMPONENT(HZ)NO

0.000E+008.178E-041.000E+009.903E+001.000E+031

9.275E+019.276E+017.756E-047.682E-032.000E+032

-1.791E+02-1.790E+021.194E-031.183E-023.000E+033

7.911E+017.912E+016.955E-056.888E-044.000E+034

1.789E+021.789E+024.474E-044.430E-035.000E+035

9.919E+019.920E+013.279E-053.247E-046.000E+036

-1.790E+02-1.790E+022.069E-042.049E-037.000E+037

8.094E+018.094E+011.784E-051.767E-048.000E+038

1.792E+021.792E+021.108E-041.098E-039.000E+039

9.125E+019.125E+016.666E-066.602E-051.000E+0410

TOTAL HARMONIC DISTORTION = 1.512880E-01 PERCENT

A Class-AB Power Amplifier using a VBE

-multiplier Circuit

To keep the value of VBBrelatively constant, aVBE-multipliercircuit may be used instead of thediodes. This scheme is shown in Fig. 6.4.4, which is more flexible than the diode scheme and is also popular

in IC amplifiers. Q3has relatively a smaller area because its collector current needs to be in the order of the

maximum value of the base-bias current of the output transistor Q1. For a given value of the bias currentIBIAS,

the ratio (R1 /R2) can be adjusted to produce the required value of VBBthat sets a specified value ofICQin the

output transistors. Under the quiescent conditions, neglecting the base-bias current of Q1,

whereIRis the current throughR1. Neglecting the base-bias current of Q3, we find that

where

Since VBBis obtained by multiplying VBE3with a factor, this scheme is called the VBE-multiplier scheme. The

advantage of the scheme is that a specific value ofICQcan be set by controlling the resistance ratio. Besides,


24/48


502

VBB

2VT

ln ( 10 mA / 0.1 pA ) 1.317 V .

VBB

(1 R1/R

2)V

BE3(1 R

1/R

2)V

Tln

IBIAS

VBB

/ (R1

R2) I

CQ/115

IS3

.

Fig. 6.4.4: A class-AB power amplifier using a VBE

- multiplier sheme.

Q1

+VCC

+vO

vI

+

+

-

IBIAS

RL

iL

-VCC

Q2

vBB

-

IR

IC3Q

3

R1

R2

the change in VBBwill be very small even if there is a large increase in the collector current of Q1. An increase

in the collector current of Q1causes an increase in the base-bias current of Q1. Then, the collector current of

Q3decreases. However, if Q3remains in the active-mode, a large change in IC3causes only a very small

change in the value of VBE3keeping the value of VBBrelatively constant.

Example 6.6 (Design)In the Class-AB amplifier of Fig. 6.4.4, VCC= 15 V, andRL= 100 . The saturation current of the

power transistors is 0.1 pA and that of the small-signal transistor Q3is 0.01 pA. It is required to establishICQ

= 10 mA. The maximum amplitude of the output signal is expected to be 15 V. VA= 100 V and = 100 for

Q1. Design the circuit.

SOLUTION

dc1= 115. The maximum expected collector current of Q1is 150 mA, and the maximum base current

of Q1will be approximately 1.3 mA. Therefore,IBIASshould be more than 1.3 mA. The value of VBBrequired

under the quiescent condition is

Under the quiescent conditions, we also find that


25/48


503

R1

R2

( 1.317 / 0.5 ) 2.634 k .

1R

1

R2

1.317

0.026 ln (2mA / 0.01 pA )1.947.

R2

1.353 k , and R1

1.281 k .

IC3

IBIAS

IC1

dc1

VBB

R1

R2

2.5150

115

1.317

2.6340.7 mA .

VBB 1.9470.026 ln(0.7 mA/0.01 pA ) 1.282 V.

There is only one equation with three unknowns, R1, R2, and IBIAS. Therefore, some unknowns can be

arbitrarily selected. We can choose which is greater than 1.3 mA, the maximum baseIBIAS

2.5 mA ,

current of Q1. This allows us to provide a minimum 1.2 mA for (IC3+IR). AllowingIR= 0.5 mA and noting

that VBBis relatively constant,

Neglecting the base-bias current of Q1under the quiescent conditions,IC3will be 2 mA. Therefore, using

(6.4.7) and (6.4.8),

Solving forR1andR2from the above two equations, the values ofR1andR2can be found to be

The closest standard values forR1andR2may be picked in a discrete design. However, using a variable

resistor, the value of VBBcan be adjusted for a specific value ofICQ. In an IC, the initial design can be set for

the required values. This completes the design. If the load current reaches the maximum of 150 mA,

We have used an approximate value for VBBin the above equation. However, using the new possible value

ofIC3, a correct estimate for the value of VBBis

Clearly, the value of VBBremains relatively constant in this scheme, as the collector current of the output

transistor changes.

Small-Signal Analysis of Class-AB Amplifiers

Under the Class-AB operation, the power amplifier becomes almost a linear amplifier. Since the

Class-AB power amplifier is also the output stage of a multi-stage amplifier (for example, an op amp), it is

also necessary to know how to estimate its primary parameters, such as the voltage gain. During this analysis,

we assume that the input source is a voltage source vswith a source impedanceRs. While the input signal is

directly fed to the base-node of Q2, the signal path to the base-node of Q1has an additional resistance of the

base-bias circuits for small signals in both configurations of Figs. 6.4.1 and 6.4.4. Fortunately, this additional

resistance is very small in comparison to the input resistance looking into the base-node of Q1and can be

neglected. This is essentially equivalent to the assumption that the biasing part of the amplifier can be short-


26/48


504

ree (re1 re2 ) , re (r1 r2 ) , kbe (ree /re ) , and roe (ro1 ro2 ) . (6.4.9)

io

vi

ree

(RL

roe

)

vi

100.7.

vs

kbe

ioR

s v

i, v

i0.8029v

s.

vo

0.8029vs

98.51

100.7

0.7854vs

, Avs

vo

vs

0.7854 V/V.

Ri

Rs

(vs

/vi) 1

8.147 k .

Fig. 6.4.5: The small-signal equivalent circuit of class-AB amplifier. The boxed-part shows the

model of the composite (parallel combination of Q1and Q

2) BJT in a power

amplifier. The parameters are defined in (6.4.9).

+-

vs

Rs

kbe

io

+

-

+

-

vi

1vi

ree

io

roe RL

+vo

Ro

Ri ii

circuited for small-signals. With this excellent approximation, the amplifier becomes a parallel connection

of the two output transistors, and one can obtain the small-signal equivalent in the form of Fig. 3.5.3(b) to

represent this circuit as shown 6.4.5, where the small-signal parameters of the composite BJT are

The small-signal parameters of the individual transistor can be easily calculated using the usual

formulas at the corresponding collector-bias currents (ICQ1andICQ2for Q1and Q2respectively). Using the

equivalent circuit of Fig. 6.4.5, one can easily find the amplifiers primary parameters. As an example,

consider the situation in Example 6.5. Assume that the input source has an internal resistance of 2 k. In

addition to the parameters given in Example 6.5, assume that VA1= 100 V, and VA2= 50 V, and Q2= 50. Since

VCE1= VCE2= 12 V, dc1= 112, and dc1= 62. SinceIEQ1= IEQ2 ICQ1= 6.501 mA, re1= re2= 4.3 , and ree=

2.15. r1= 485.9 , r2= 270.9 , and re= 173.9. Therefore, kbe= (2.15/173.9) = 0.01236. Furthermore,

ro1= 18.51 k, ro2= 10.25 k, and roe= 6.6 k. This leads to (RLroe) = 98.51 . Using these parameters,

Using KVL,

Clearly then,

The input resistance is

Since the load resistance is relatively small, input resistance is also relatively small. Clearly, most of the

attenuation of the signal occurs at the input of the amplifier. Of course, the output resistance of the amplifier


27/48


505

Ro

ree

kbe

Rs

26.87 .

Fig. 6.4.6: A class-AB power amplifier using the compound transistors.

Q1

+VCC

+vO

RL

iL

-VCC

Q2

vI

+

-

IBIAS

Q3

R1

R2

Q4

Q5

Q6

is

Clearly, it is very simple to evaluate the amplifiers parameters using the equivalent circuit of Fig. 6.4.5.

Class-AB Amplifier using Darlington Pairs

To reduce the base-bias currents of the power transistors, the Darlington pair and composite

transistors may be used for Q1and Q2in the circuits of Figs. 6.4.1 and 6.4.4. An example circuit is shown in

Fig. 6.4.6. In this circuit, the base-bias current of Q1will be approximately (iL/12). The compound transistor,

formed by Q4, Q5, and Q6, behaves as a pnp transistor with an effective value of (456). In IC

technology, the pnp transistor is usually a lateral pnp transistor having a low -value ( 5 to 10) (see

Appendix-A). Since (12) is likely to be very high, the use of twonpntransistors Q5and Q6in conjunction

with Q4permits a similar effective current gain to be achieved. This is necessary to keep the positive and

negative signal-swings approximately equal. The lateralpnptransistors also have poor frequency response.

If this scheme is used in a discrete circuit design, it may be sufficient to use only one npntransistor in the

compoundpnptransistor. In the recent past, verticalpnptransistors have been realized in IC technology (see

Fig. A.8(b) in Appendix-A), and they may also be used to realize current mirror circuits. Vertical pnp

transistors, with high frequency responses closely matching those of npntransistors, may also be used in the

IC designs. There is an inherent stability problem in the circuit of Fig. 6.4.6. Because of the internal feedback


28/48


506

Fig. 6.5.1: A class-AB MOSFET output amplifier.

iL

iD2

RL

+vO

-VSS

+VDD

M1

M2

+vI

M4

M3

IBIAS iD1

+

-

VGG

Fig. 6.4.7: A class-AB power amplifier with short-circuit protection.

Q1

+VCC

+vO

RL

iL

-VCC

Q2

Q4

Q5

vI

+

-

IBIAS

Q3

R1

R2

R3

R4

in the composite connection of Q4and Q5, there could be high frequency oscillations. This problem can be

handled with a proper frequency compensation (Chapter 9).

Short-circuit Protection

If there is an accidental short-circuit (RL= 0), the collector current in the output transistors can

become excessively high causing a thermal runaway. If the junction temperature increases beyond TJmax, the

transistors will be damaged. Therefore, it is critical to provide the output transistors with a short-circuit

protection. A modification of the Class-AB power amplifier of Fig. 6.4.4 with a short-circuit protection is

shown in Fig. 6.4.7. Besides the usual components as in the circuit of Fig. 6.4.4, this circuit has four

additional components, namely Q3-R3and Q4-R4combinations. These combinations provide the short-circuit

protection to the amplifier. The transistors,Q3and Q4, need only be small-size transistors as they are expected

to carry collector currents in the order of the base-bias currents of the power transistors.

The resistance values of R3andR4are small (usually a fraction of an ohm to a few tens of ohms

depending upon the maximum collector current). Under the normal operating conditions, the voltage drops

across these resistances are adjusted to be less than V(about 0.5 V), and therefore, Q3and Q4will be under


29/48


507

vOmax

VDD

Vtn

(2

n /2 ) n VDD VSS Vtn (2

n / 4 ) . (6.5.1)

vOmin

VSS

Vtp

(2

p /2) p VDD VSS Vtp (2

p / 4 ) . (6.5.2)

iOmax

(vOmax

/RL

) , and iOmin

(vOmin

/RL

) . (6.5.6)

iOmax

K1

(VDD

vOmax

Vt1

)2 , and iOmin

K2

(VSS

vOmin

Vt2

)2 , (6.5.7)

the cutoff conditions normally. However, if the collector currents in Q1and Q2become excessively large due

to accidental short-circuits, the voltage drops across these resistors turn on the transistors Q3and Q4starving

the bases of Q1 and Q2. This process, in turn, virtually shuts the collector currents through the power

transistors protecting them from the thermal runaway.

6.5: MOSFET CONFIGURATIONS

A Class-AB MOSFET output amplifier is shown in Fig. 6.5.1. This configuration is very similar to

that of the BJT amplifier of Fig. 6.4.1. The diode-connected MOSFETsM3andM4provide the bias voltages

forM1andM2. The operation of this circuit is also very similar to that of its BJT counterpart, and indeed this

circuit can be operated either as a Class-B or a Class-AB amplifier. However, the signal-swing and biasing

considerations are different because MOSFETs suffer from body effects. When the gate-node potential ofM1

can be taken to the level of VDD, the output signal reaches the maximum positive signal vOmax. Let the

corresponding drain current ofM1be (vOmax/RL). We can find the value of vOmaxusing (4.7.11). Typically, (VDD

+ VSS- Vt1) Neglecting this excess gate voltage( iOmax /K1 ) . ( iOmax /K1 ) ,

Following similar steps, assuming that the gate-node potential ofM2can be lowered to the level of -VSSand

that onlyM2conducts under this condition, we can show that the minimum possible output signal (negative

value) is

The maximum and minimum possible output currents are

However, these currents are also given by

where Vt2is the threshold voltage ofM2corrected for its body effect.


The fundamental parameters of the n-channel MOSFETs in the circuit of Fig. 6.4.6 are: KP =

Vtn= 0.7339 V, n= 0.03122 V-1, n= 0.4823 V

1/2, and (2f) = 0.7 V. The parameters of thep-51.17 A/V2,

channel MOSFETs are: KP= 16.53 A/V2, Vtp= -0.7776 V, p= 0.04349 V-1, p= 0.6727 V

1/2, and (2f) =


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508

vOmax 5 0.7339

0.48232

2 0.4823 5 5 0.7339 (0.48232

/4) 2.91 V,

vOmin

5 0.77760.67272

20.6727 5 5 0.7776 (0.67272 /4 ) 2.393 V.

iOmax

vOmax

RL

2.91 mA , and iOmin

vOmin

RL

2.393 mA.

Vt2

0.7776 0.6727 5.7 2 0.7 2.081 V.

2 mA K2

( 5 2 2.081)2 .

W

L2

574

2.

W

L1

16.53

51.17

574

2

186

2.

0.7 V. Assume that VDD= VSS= 5 V,IBIAS= 10 A, andRL= 1 k. Assuming that the gate-node potentials of

M1andM2can be taken to VDDand -VSSrespectively, find the possible output voltages and the corresponding

output currents. Since p > n, by comparing (6.4.12) and (6.4.13), it may be noted that

Assume that the load current is limited to when the gate-node potential of M2vOmin


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509

K1

51.17

2

186

22379.4 A/V 2 , and K

2

16.53

2

574

22372.1 A/V 2 .

Vt2

0.7776 0.6727 5.7 0 0.7 1.821 V.

VSG2

Vt2

100

2372.12.026 V.

W

L3

1

10 W

L1

19

2, and W

L4

1

10 W

L2

58

2.

Fig. 6.5.2: The transfer characteristic of the class-AB amplifier designed in Example 5.7

Input in V

OutputinV

-4

-2

0

2

4

-6 -4 -2 0 2 4 6

At vO= 0,

SinceID2

= 100 A under this condition,

Therefore, the dc input bias voltage should be At the zero output bias voltage,VI

VSG2

2.026 V.

the bias currents ofM1andM3are in the ratio of (1/10) and those ofM2andM4are also in the ratio of (1/10).

Besides, the same gate-to-source voltages of M1andM3and those of M2andM4are equal. Therefore, the

aspect ratios ofM3andM4can be found to be

The circuit was simulated in PSPICE, and the transfer characteristic is shown in Fig. 6.5.2 with a dc

input bias voltage of VI= -2.026 V. From this characteristic, the output offset was found to be which-6.7 mV,

is indeed very small. Besides, at vI= -2.026, VGG= 3.7 V. When the gate-node potential ofM1becomes 5.72V, the output voltage reached a level of approximately equal to +2.91 V. In our original design, we calculated

this output level at the gate-node potential ofM1at +5 V. However, in this calculation, we ignored the excess

gate-to-source voltage. Similarly, when the gate-node potential ofM2 reached a level of -5.48 V, the output

reached the level of -2.39 V. Again, in our original calculation, at the output level of -2.39 V, the gate-node

potential of M2should be at -5 V. The error is again due to the excess gate-to-source voltage. From the


32/48


510

Fig. 6.5.3: The waveform of the output signal in the Design Example 6.7.

OutputvoltagevO

Time in ms0 0.5 1.0 1.5 2.0 2.5 3.0

-2.5V

-2.0V

-1.5V

-1.0V

-0.5V

0V

0.5V

1.0V

1.5V

2.0V

PSPICE simulation, we found that, at the output levels of +2 V and -2 V, the inputs were required to be

+1.144 V and -5.021 V respectively. With an input of 0 V, the output offset voltage was 1.2806 V, and an

input voltage of -2.1174 V was required to offset this and bring the output to zero. Finally, it should be noted

that the nonlinear transfer characteristic is not only due to the square-law characteristic of the MOSFETs but

also because of the nonlinear body effect which depends on the output voltage.

A sinusoidal signal with an amplitude of 3 V and a frequency of 1000 Hz was applied at the input.

The input offset was set to -2.1174 V. The transient response, obtained from the PSPICE, is shown in Fig.

6.5.3. Even though the input offset was set to be the required value, one can observe the fact that the positive

and negative peaks are not identical. The Fourier analysis showed that the fundamental component was

The second harmonic, as was pointed out in Chapter 4, was the next dominant term with an1.939 V.

amplitude of 55.86 mV. The third and fourth harmonics were respectively 13.17 mV and 9.753 mV. We

found the amplitudes of the harmonics up to 10thharmonic. The THD was found to be 3.01%. Clearly, a

Class-AB MOSFET power amplifier suffers from considerably more distortion than its BJT counterpart.

Although the output amplifier of Fig. 6.5.1 has a low output impedance, since the MOSFETsM1and

M2suffer from body effects, the signal-swings of the output are severely limited. The gate-node potentials

ofM1andM2can not even reach the levels of +VDDand -VSSin a practical realization of circuit shown in Fig.

6.5.1. An alternate scheme is to use the inverter configuration of Fig. 6.5.4, which can source current from

a high output impedance node without wasting any current. This circuit can also be operated either in Class-B

or Class-AB by adjusting the gate voltages ofM3andM4. If it operates in Class-B, as the input goes positive,


33/48


511

Fig. 6.5.4: Push-pull inverting CMOS output amplifier with a high impedance output.

io

RL

+vO

-VSS

+VDD

+vI

+VG1

+VG2

M1

M2

M4

M5

M3

M6

M7

M8

+VT2

-VT1

iD7

iD8

the current inM1increases, andM2is turned off. This current inM1is reflected as the drain current inM8,

which is the load current because the current inM7should be zero. Similarly, if vIgoes negative, the current

inM2increases and is reflected as the current inM7, which will be load current becauseM8is now cutoff. It

can be noted that the output voltage can swing almost to the supply voltages. However, the circuit constitutes

a voltage-controlled current source because the output resistance, at the quiescent conditions, is (ro7ro8),

which is relatively high. Such an output stage can be used in an operational transconductance amplifier

(OTA). This circuit is very attractive from all points of view except possibly the output resistance. Consider

a design example on the sizing of the MOSFETs and the calculation of the required bias voltages VG1and VG2.


The process parameters of the MOSFETs in the circuit of Fig. 6.5.4 are the same as those in Example

6.7. Assume that VDD= VSS= 5 V, andRL= 1 k. The load current is limited to It is also required4 mA.

to have vO= 0, andID1=ID2= 0.4 mA, if vI= 0. Obtain the sizes for all MOSFETs. Choose the minimum

length ofL= 2 m for all the MOSFETs. Verify the signal-swings using PSPICE simulation.

SOLUTION

At the maximum possible output current of +4 mA, the output voltage should be +4 V. The MOSFET

M7should remain in the pinch-off mode at least until this level. Therefore, it is required that


34/48


512

VDD

vO

vO

K7R

L

K7

4000 A/V 2 .

KP

2

W

L7

4000 A/V 2 W

L7

484.

W

L7

970

2.

W

L8

16.53

51.17

970

2

313.4

2,

W

L8

314

2.

K7

16.53

2

970

24008.5 A/V 2 , and K

8

51.17

2

314

24016.8 A/V 2 .

VGS6

VGS8

0.7339400

4016.8( 1 0.031225)1.0274 V.

40A51.17

2

W

L6

(VGS6

Vtn

)2 ( 1 0.03122 VGS6

) W

L6

36

2.

VSG5

VSG7

0.7776400

4008.5( 1 0.043495)1.0639 V,

40 A16.53

2

W

L5

(VSG5

Vtp

)2 ( 1 0.04349 VSG5

) W

L5

113

2.

Therefore, the aspect ratio ofM7must satisfy the condition of

We choose

The size ofM8is given by

and we choose

With these aspect ratios, we find that

At any output current level, the current throughM3andM5(similarly inM4andM6) need not be that

high. We choose a current scaling ratio of 10 in the current mirrors formed byM5-M7andM6-M8pairs and

design the circuit to operate as a Class-AB amplifier with the drain currentsID7=ID8= 0.1 4 mA = 400 A,

if vI= vO= 0. If the current scaling ratio of 10 is used, then the current throughM5andM6should be 40 A,

when vI= vO= 0. WithID8= 400 A, the required bias voltage VGS6= VGS8can be calculated to be

Next,

Proceeding in the same way, we find that

and


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513

Vt1

Vtn

n( V

T1 V

SS0.7 0.7) V

tn

n V

T1 V

SS.

VT1

Vt1

ID1

/K1.

VT1

Vtn

n V

T1 V

SS.

VT1

Vtn

2

n / 2 n VSS Vtn 2

n / 4 1.6205 V.

Vt1

Vtn

n V

T1 V

SS0.7 0.7 1.3045 V.

ID1

40 A KP

2

W

L1

VT1

Vt1

2 1 0.0312VDS1

W

L1

26

2.

VT1

Vtn

ID1

/K1

2

n / 2 n 0.7 n VSS Vtn ID1 /K1 0.7 n 0.7 2

n / 4 1.648 V,

Vt1

Vtn

n( V

T1 V

SS0.7 0.7) 1.3012 V.

Vt4

Vtp

p

( 6.648 0.7 0.7) 2.0383 V.

VT1and VT2depend on the threshold voltages of M1and M2, which, in turn, depend VT1and VT2

because of the body effect. We do not know the sizes ofM1andM2yet, and therefore, we can only evaluate

the approximate values of VT1and VT2. First, considerM1with vI= 0. Its threshold voltage is

and the equation for VT1

is

Since Vt1 as first order approximation, we can neglect the second term in the above equation andID1 /K1 ,

get the following approximate equation for VT1:

Solving the above equation, we obtain

Using the above value of VT1, an approximate value of Vt1is

Then,

With the above choice of the aspect ratio forM1, Since we now know the values forK1 332.6 A/V2 .

drain current ofM1and its conductivity parameter, we can find the accurate value of VT1and its threshold

voltage using

and

The approximate values found earlier and the above accurate values agree very well. Proceeding further, we

find that VBS4= 6.648 V, VSD4= 2.3246 V, and

The value of VG2should be less than and we choose Next using the drain(VT1 Vt4 ) , VG2 4 V.

bias current of 40 A inM4, we find the size ofM4using


36/48


514

ID4

40 A KP

2

W

L4

( VG2

VT1

Vt4

)2 ( 1 0.04349VSD4

) W

L4

90

2.

VT2 Vtp 2

p / 2 p VDD Vtp 2

p /4 1.952 V.

Vt2

Vtp

p

( VDD

VT2

0.7 0.7 ) 1.5159 V.

ID2

40 A KP

2

W

L2

VT2

Vt2

2 1 0.04349VSD2

W

L2

36

2.

VT2

Vtp

ID2

/K2

2

p /2 p 0.7 p VDD Vtp ID2 /K2 0.7 p 0.7 2

p /4 2.023 V.

Vt3

Vtn

n( V

T2 V

SS0.7 0.7 ) 1.6707 V.

ID3

40 A KP

2

W

L3

(VG1

VT2

Vt3

)2 ( 1 0.03122VDS3

) W

L3

32

2.

W

L2

34

2, and

W

L3

29

2,

Proceeding further to find the required sizes ofM2andM3, we first find the approximate value of VT2

using

Next, the threshold voltage ofM2can be found to be

Also, VSD2= 6.952 V. SinceID2= 40 A,

With the above choice of the aspect ratio ofM2, We can refine the value of VT2usingK2 148.75 A/V2 .

Therefore,

VG1should be greater than (VT2+ Vt3), and we can choose We also find that VDS3= 1.913 V.VG1 4 V.

Finally, we find the size ofM3using

The above design was simulated in PSPICE. The transfer characteristics are shown in Fig. 6.5.5.

From these characteristics, at vI= 0, the output current was found to be 37.5 A (the output offset). The drain

currents ofM7andM8were 469.9 A and 432.4 A respectively. Besides, the bias voltages VT1and VT2were

1.635 V and 2.002 V respectively, which are very close to the predicted values. The drain bias currents ofM1

andM3were 44.23 A and 47.16 A respectively. This imbalance causes the differences in the drain currents

of output MOSFETs and hence the offset voltage. By scalingM2andM3to

the imbalances can be reduced considerably reducing the output offset current to 4.9 A.


37/48


515

iD1 vO 0 IDQ 1 , and iD2 vO 0 IDQ 2 ,

vSG 1

VDD

A (vO

vI

) , and vGS2

A (vO

vI

) VSS

.

Fig. 6.5.6: Push-pull inverting CMOS output amplifier with feedback to reduce the output

impedance and the transfer characteristics of a typical design.

Input voltage vI

in V

currentsinmA

-4.0 -2.0 0 2.0 4.0-40

-20

0

20

40

iD2

iD1

iO

io

RL

+vO

-VSS

+VDD

+vI

M1

M2

iD1

iD2

+-A

+-

A

Fig. 6.5.5: The transfer characteristics of the output stage designed in Example 6.8.

Input voltage vI

in V

current

sinmA

-2.5 -2.0 -1.5 -1.0 -0.5 0 1.0 1.5 2.0 2.5-5.0

-2.5

2.5

5.0

0.5

0

iD7

iD8

iO

One can increase the output resistance of the circuit of Fig. 6.5.4 using the cascode mirror at the

expense of decreased signal-swing for the output voltage. Feedback can be employed to the circuit of Fig.

6.5.4 to decrease the output resistance (Chapter 7). A circuit arrangement using such feedback is shown in

Fig. 6.5.6.

Assume that the output MOSFETs are biased with anIQsuch that

whereIDQ1andIDQ2are the quiescent bias currents, which are usually a fraction of the maximum load current.

From the circuit, it can be found that

Since vOis expected to be less than vIin the circuit, the MOSFETs never reach ohmic mode but they may


38/48


516

iD1

K1 V

DD A (v

O v

I) V

t12 , and i

D2 K

2V

SS A (v

O v

I) V

t22 .

K1 VDD A (vO vI) Vt1 2 K2 VSS A (vO vI) Vt2 2 v

OR

L

0 .

vO

2A K RL

2VDD

Vt1

Vt2

2A K RL

2VDD

Vt1

Vt2

1vI

K RL

2VDD

Vt1

Vt2

Vt2

Vt1

2A K RL

2VDD

Vt1

Vt2

1. (6.5.8)

IDQ 1

K1 V

DD V

t12 , and I

DQ 2 K

2V

DD V

t22 .

vO

2A RL

K IDQ 1

KIDQ 2

2A RL

K IDQ 1

KIDQ 2

1vI

(IDQ 1

IDQ 2

)RL

2A RL

K IDQ 1

KIDQ 2

1,

A (gm1

gm2

)RL

A (gm1

gm2

)RL

1vI

IOR

L

A (gm1

gm2

)RL

1,

(6.5.9)

Ro

vO

iO Q

1

A (gm1

gm2

), (6.5.10)

reach cutoff depending the bias currents and the gate-to-source voltages. When the MOSFETs operate in the

pinch-off mode, the drain currents are given by

Since iD1= iD2+iOand iO= (vO/RL), we get

Assume that we choose the aspect ratios of the MOSFETs such thatK1=K2=Kand the supply voltages such

that VSS= VDD. Then, using these equalities in the above equation and solving for vO,

It is clear that vOhas a linear relationship with vIexcept for the unavoidable but a small output offset due to

the difference in the threshold voltages of the MOSFETs. Since at vI= 0, vOis nearly zero, the zero-input bias

currents are

Using the above in (6.5.8),

wheregm1andgm2are the small-signal transconductances of the MOSFETs. If [A(gm1+gm2)RL] 1, it is clear

that vOclosely follows vI. Furthermore, we can show that, for small-signals, the output resistance of the circuit

is

which will be much lower than the output resistance without feedback.

As vIincreases to a sufficiently large positive or negative value, one of these MOSFETs enters the

cutoff mode. For example, if vI> vO+ (VSS- Vt2)/A,M2enters the cutoff, and iO= iD1. For such values of input,

the output current has square law characteristic, which increases the harmonic distortion. Furthermore, as vO

increases to a large positive value, vSD1falls below the value to keepM1in the pinch-off mode, and M1may

enter the cut-off mode. Therefore, the increase in the value of iOis reduced. A similar situation occurs for the

negative inputs also, andM2may enter the cut-off mode for large negative inputs. However, we can choose

a larger value ofIDQto increase the linear range and reduce the distortion but at the risk of lower efficiency.


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517

6.6: IC POWER OPERATIONAL AMPLIFIERS

IC op amps are versatile and find a very wide range of applications. This is the most important reason

for their popularity. Their output current, however, is limited to a few tens of mA, and their maximum power

output is also limited. For example, if an op amp, energized with a 15 V dc source, can supply a maximum

output current of 50 mA and the output is sinusoidal, the maximum output power is limited to 375 mW. This

amount of power is sufficient in most small-signal applications but it is quite low in power applications.

Current boost transistors are therefore added to increase their power handling capability, and they are then

called power operational amplifiers. There is a wide range of commercial IC power amplifiers. These

amplifiers essentially consist of a preamplifier with a Class-AB output stage or a simplified form of an op

amp with an internal feedback. The main difference between a normal op amp and a power operational

amplifier is in the power handling capability of the output power transistors. The IC power amplifiers

typically have a voltage gain of 30-50 dB with moderately high (but not as much as in a regular op amp) input

impedance. They can usually handle power output of 5-20 W without any current boost. Their current

handling capability can be increased by adding Class-AB power stages externally. IC power amplifiers can

be used for most audio and video power applications and are also available in the dual-in-line packages for

stereo systems. The application areas of the IC power op amps include phonographs, intercoms, alarms, AM-

FM radios, TV, etc.

An example of the IC power amplifier is LM384 from National Semiconductor corporation. This is

a 5-W audio power amplifier whose schematic is shown in Fig. 6.6.1. The input stage is a difference amplifier

(Chapter 6) with Darlington pairs at the input. The difference amplifier is biased by (R1+R

2) andR

3. Q

2is

a high gain CE-amplifier. The 10-pF capacitor provides frequency compensation to achieve adequate stability

margins (Chapter 9). The output of the CE-amplifier is fed to a Class-AB power amplifier with short-circuit

protection.R3also provides feedback, which reduces the closed-loop gain to about 50. LM384 can be used

with a maximum supply voltage of 28 V. It can be noted that Therefore, the[R3

/ (R1

R2) ] 0.5 .

approximate value of the dc output voltage is about (Vs /2), and there is a maximum symmetrical swing at the

output. If the amplifier is used with a single-ended supply, a coupling capacitor is required to remove the dc

at the output. One end of the input may be left open in the circuit because there is a dc path for the base-biascurrents through R5 and R6. This power amplifier comes in a dual-in-line package. The total harmonic

distortion is only 0.25% when an output power of 4 W is delivered to an 8-load. If a 5-W power is drawn,

the THD increases to 10% because of the saturation of the output transistors.

The junction-to-ambient thermal resistance of LM384 is 85 C/W, and the maximum junction

temperature should be limited to 150 C. Therefore, if it is operated without a heat sink at a room temperature


40/48


518

Fig. 6.6.2: A typical application of the IC power amplifier LM384. (Courtesy of National

Semiconductor Corporation)

+

-

3,4,5,7,1

0,11,12

16

5F

0.1 F

+22 V

8

0.1 F

2.7

500 FV

I

N

10k8

Fig. 6.6.1: The schematic of the IC power amplifier LM384 (Courtesy of National

semiconductor Corporation)

R5= 150k R

6= 150k

1kR

2= 25k

R1= 25k R3= 25k

+IN (2)-IN (6)

GND (7)

BYPASS (1)

GND

(3,4,5,10,11,12)

Vs(14)

Output

(8)

0.5

0.5

10 pF

Q2

of 25 C, the internal power dissipation of the IC should be limited to 1.5 W. With a maximum efficiency of

about 70%, the output power should be limited to 1 W. With all the ground points soldered to a total copper

foil area of 6 in2on a printed circuit board, the thermal resistance can be reduced to 35 C/W, which increases

the maximum power output capability to 2.5 W. However, with a larger heat-sink, the output power can be

as high as 5 W. The type of heat sink to be used is suggested by the manufacturer in the application notes.

A typical audio application of LM384 is shown in Fig. 6.6.2.


41/48


519

Current Boosting

The power output from IC power amplifiers may not be sufficient in some applications. Greater

output power can be obtained with the use of external power transistors in Class-AB operation driven by IC

power amplifiers or operational amplifiers with feedback similar to the circuit shown in Fig. 6.3.6 or a

modification of this scheme. This is effectively achieved by increasing the maximum current that can be

drawn from the power supply, and this is why the process is called current boosting.

LM391 from National Semiconductor is an audio power driver, which is an example of this type of

amplifier. It can drive a Class-AB power stage in 10-100 W power amplifier circuits. Its supply voltage can

be as high as 50 V (100 V with a single ended supply). This also comes in dual-in-line package for stereo

applications. It has many applications, and the interested readers can find its applications from the

manufacturer's data book.

6.7: POWER MOSFETS

Power MOSFETs are available from several manufacturers, and they have distinct advantages over

the BJTs. Some of them are:

1. The transfer characteristic in the pinch-off mode is linear for currents over a small current range

(usually a fracti

chap6 adobe

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