cc415 chapter 2 signal conditioning

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Prof Fawzy IbrahimCC415 Ch.2 S. Conditioning1 of 39

CC 415 Data Acquisition System

CHAPTER 2

Signal ConditioningAmplification and Filtering

Prof. Fawzy IbrahimElectronics and Communication Department

Arab Academy for Science and Technology (AAST)




Chapter Contents

2.1 Ideal Operational Amplifiers

2.2 The Inverting Configuration

2.3 The Noninverting Configuration

2.4 Difference Amplifiers

2.5 The Instrumentation Amplifier

2.6 Active Filters




2.1 Ideal Operational Amplifier (op–Amp)

Introduction:• OP–Amps are utilized in hundreds of application. One can do almost

anything with op–Amps. Therefore, op – amps are produced on IC’s.• An IC op–amp is made of a large number of transistors (tens),

resistors and usually one capacitor.

2.1.1 The op–Amp Terminals

• From signal point of view op–Amp has three terminals as shown inFig. 2.1: – Two input terminals (Terminal 1 and Terminal 2 ) – One output terminal (Terminal 3)

• From operational point of view op–Amp has five terminals as shown inFig. 2.2:

– Two terminals for the inputs and one for the output. – Two terminals for dc power supplies: (Terminal 4 for the positive

voltage VCC and Terminal 5 for the negative voltage – VEE)




2.1.1 The op–Amp Terminals (Continued)

• Other terminals are induced for frequency compensation and terminals foroffset nulling.

Fig. 2.1 Circuit symbol for the op amp.

Fig. 2.2 The op amp shown connected to dc power supplies.




2.1.2 Function and characteristics of the ideal op–Amp

Refer to Fig. 2.3:1. V3 = Vo = A (V2 – V1) where A is the amplifier gain (open-loop gain)2. The ideal op – amp is not supposed to draw any input current:

i1 = 0 and i2 = 0, therefore, the input impedance Zin = ∞

3. V3 = A (V2 – V1) independent of the current that may be drawn fromterminal 3 into the load impedance, therefore the out impedanceZout = 0.

4. V3 is in phase with V2 and out of phase with V1. For this reasonTerminal 1 is called the inverting input terminal and is distinguishedby “–” sign, while terminal 2 is called the noninverting input terminaland is distinguished by a “+” sign.

Fig. 2.3 Equivalent circuit

of the ideal op amp.




2.1.2 characteristics of the ideal op–Amp (Continued)

5. V3 = A (V2 – V1), the op–amp respond only to the difference signal (V2 –

V1) and hence ignore any signal common to both inputs. This is calledcommon – mode rejection (zero common mode gain or infinite commonmode rejection)

6. Op–amps are direct–coupled or dc amplifiers that amplify signal whosefrequency is low or zero.

7. The ideal op–amp has a very large gain and ideally A ∞. These

characteristics are summarized in Table 2.1.

Table 2.1 characteristics of ideal Op – Amp.

DescriptionCharacteristic#

Infinite input impedanceZin = ∞1

Zero output impedanceZout = 02

Infinite common mode rejectionZero common mode gain3

Infinite open – loop gainA ≈ ∞4

Infinite bandwidthBW = ∞5




2.2 The Inverting Configuration

Refer to Fig. 2.4• R2 is connected from the output terminal of the op–amp (Terminal 3)

back to the inverting or negative input terminal (Terminal 1) R2 applya negative feedback.

• Input signal is connected terminal 1 through a Resistance R1

• Terminal 2 is grounded

Fig. 2.4 The inverting closed-loop configuration.




2.2 The inverting configuration (Continued)

Refer to Fig. 2.5• The closed – loop gain G is defined as G = Vo /V1

Since Vo = (V2 – V1) A yields V2 – V1 = Vo /A = 0 (A ∞)

V2 = V1 or V1 = V2

• This is called a virtual short circuit means that whatever voltage at

2 will automatically appears at 1 because A ∞

Fig. 2.5 The inverting closed-loop configuration.

2.2.1 The Closed – Loop Gain




2.2.1 The Closed – Loop Gain (Continued)

Apply Ohm’s law we have:

V V V V i I I I

111

11

0

For ideal op–amp Zin = ∞ No current go into the op –amp thereforeVo is given by:

R

RV R

R

V RiV V I

I I o

1

22

1

21 0

R

RG R

R

V

V

I

o

1

2

1

2

• The closed–loop gain is the simply the ratio of the two resistor R2

and R1.

• The minus sign (–) means that the closed–loop gain amplifiesprovides a signal inversion (or the output signal is 180°phase– shifted with respect to the input. Therefore, this is called invertingconfiguration).




• It is required that the input resistance must be high, we have to selecta high value of R1. However if the required gain R2 /R1 is also high,then R2 could became impractically large.

• We may conclude that the inverting configuration suffers from a lowinput resistance.

• Refer to fig.2.6 (a) Vo = A (V2 – V1) ideal voltage source, it follows thatthe output resistance of the closed–loop amplifier Ro = 0

• A solution to compromise between the requirement high Ri and highgain consider the following example:

R RV

V

i

V R

I

I I i 1

11 / Fig.2.6 The inverting

closed-loop configuration

2.2.2 Input and Output Resistances

• Assume ideal op–amp with infinite

open–loop gain.• The input resistance of the closed – loopinverting amplifier of Fig.2.6 is given by:




Example 2.1

Assuming ideal op–amp, consider the amplifier circuit shown inFig.2.7. Assume also that for practical reasons it is required not touse resistors greater than 1 MΩ. For this circuit do the following:

a) Derive an expression for the closed–loop gain Vo /VI.

b) Design this circuit to have a gain of G = 100 and Ri = 1 MΩ.

c) Compare your design with that based on the inverting configurationof fig.2.5

Solution:

V2 – V1 = Vo /A = -Vo/∞ = 0

V1 = V2 = 0 virtual ground

Determination of the current i1

R

V

R

V V i

I I

11

11

Figure 2.7 Circuit for Example 2.1 the circled numbersindicate the sequence of the steps in the analysis





Example 2.1 (Continued)

Determination of i2

i1 = i2 Since zero current flows into the inverting terminal

i2 = i1 = VI /R1

The voltage at node x is given by:

Determination of i3:

Determination of i4:

V R

R R R

V RiV V I I

x

1

22

1

221 0

V R

RV i I

x

31

2

3

3

0

V R R

R

R

V iii I

I

31

2

1

324






Determination of Vo:

a) The closed – loop voltage gain is given by:

b) Since the input resistance of 1 MΩ is required.

Ri = R1 = 1 MΩ.

From the gain equation G, the maximum possible value for the firstfactor R2 /R1 = 1, thus select R2 = 1 MΩ

To obtain G = -100, the second factor of the gain expression is 100,

we select maximum allowed value of resistance to R4 = 1 MΩThe value of R3 is calculated as

RV R R

R

R

V V R

R RiV V I

I I xo 4

31

2

11

244 )(

)1(3

4

2

4

1

2

R

R

R

R

R

R

V

V G I

o

100)1

1

11(

3

R

M

M

M

R3 = 10.2 KΩ






c) In comparison with inverting configuration shown in Fig. 2.8,use input resistance:Ri = R1 = 1 MΩ

For G = -R2 /R1 R2 = 100 MΩ

Which is impractically large value.

Current Amplifier:Refer to Fig. 2.9, marking R3 < R2, if

(R3 = R2 /K, where K > 1)i2 = i1 and i3 = K i1 i4 = (K+1) i1

• The circuit can be used as a current amplifier• The current i4 is independent of R4.

The current amplifier of Fig. 2.9 delivers its outputcurrent to R4. It has a current gain of (1+R2 /R3), a zeroinput resistance, and an infinite output resistance. Theload(R4), however, must be floating (i.e., neither of itstwo terminal can be connected to ground). Figure 2.9 a current amplifier

Figure 2.8 The inverting configuration





• A very important application of the

inverting configuration is the weightedsummer amplifier as shown in Fig. 2.10.

• V2 – V1 = Vo /A = Vo/∞ = 0

V2 = V1 = 0 Virtual Ground

• Apply ohm’s law to have:

i1 = V1 /R1, i2 = V2 /R2, …… in = Vn /Rn

i = i1 + i2 + i3 +……+in since op–amp input current = 0

• The output voltage is a weighted sum of the input signals V1, V2, …

• Each summing coefficient can be independently adjusted by thecorresponding feed in resistors (R1, R2, … or Rn).

)....(0 2

2

1

1

V

R

RV

R

RV

R

R Ri RiV n

n

f f f f f o

2.2.3 The Weighted Summer Amplifier

Figure 2.10 weighted summer amplifier




• For summing signals with opposite signs, two ideal op–amps can be

used as shown is Fig.2.11 and is given by:

)()())(())((4

4

3

3

2

2

1

1 R

RV

R

RV

R

R

R

RV

R

R

R

RV V

cc

b

ca

b

cao

Figure 2.11 A weighted summer capable of implementing summing coefficients of both signs.

2.2.3 The Weighted Summer Amplifier (Continued)




2.3 The Noninverting Op Amp Configuration

As shown in Fig.2.12, the input is

connected to input (+ve) terminalof the op-amp and one terminal ofR1 is connected to the ground.

2.3.1 Closed – loop Gain

Refer to Fig. 2.13

• The closed loop – gain

• G = Vo /V1

Fig.2.12 The Noninverting configuration

Fig.3.13 Analysis of the noninverting circuit. The sequence of the steps inthe analysis is indicated by the circled numbers.




• Assuming that the op-amp is ideal A ∞

• VId = V2 – V1 = Vo /A = 0 V 1 = V2 = VI

i R

V

R

V i

I I 2

11

1

0

)1(. 1

2

21

22 R

R

V R R

V

V RiV V I

I

I I o

R

R

V

V G I

o

1

21

The gain G is positive

• The input impedance Zin = ∞ VI /I = VI /0 = ∞

• The output impedance Zout = 0 ideal voltage source

which yields:

2.3.1 Closed – loop Gain (Continued)

2.3.2 Characteristics of the Noninverting Configuration




• Fig.2.13 can be utilized as voltage follower by making R2 = 0 and R1

= ∞ as shown in Fig. 2.14.

Fig. 2.14 (a) The unity-gain buffer or follower amplifier. (b) Its equivalent circuit model.

2.3.4 The Voltage Follower

• In many applications, a buffer amplifier is needed as an impedance

transformer or power amplifier that has Rin = ∞, Rout = 0 and G = 1 orthe output just follow the input which is called voltage follower.




2.4 Difference Amplifiers

• Difference amplifier is one thatresponds to the difference between thetwo signals applied at its input andideally rejects signals that are commonto the two inputs.

• As discussed before, the representation

of signals in terms of their differentialand common – mode components asshown in Fig. 2.15

• The output voltage V0 is given by:

V0 = Ad VId + ACm VICm

Where

Ad denotes the amplifier differential amplifier gain.

ACm denotes the common – mode gain.

Fig. 2.15 Representing the input

signals to a differential amplifier

in terms of their differential and

common-mode components.




• The efficiency of a differential amplifier is measured by the degree of

its rejection of the common–mode signals in preference todifferential signal which is referred to as Common – Mode RejectionRatio (CMRR) and is defined as:

A

ACMRR

Cm

d log20

• The gain of the noninverting Configuration (1+ R2 /R1) and the gain ofinverting configuration (-R2 /R1).

• To get the difference between the two inputs, we have to make thetwo gain magnitudes equal in order to reject the common modesignals. Fig.2.16 is used to alternate (1+ R2 /R1) to (R2 /R1).

• The proper ratio of the voltage divider can be determined by:

R

R

R R

1

2

1

2

34

4 )1( R R

R

R R

R

12

2

34

4

or

2.4 Difference Amplifiers (Continued)




• This condition is satisfied

• The output can be determined by superposition as shown in Fig.2.17

• Refer to Fig.2.17 (a)

• Refer to Fig.2.17 (b)

• The output voltage, by applying the superposition principle

• The difference amplifier gain

• We can select R3 = R1 and R4 = R2

R

R

R

R

1

2

3

4

V R

RV V I o I 1

1

212

.0

V R R

R R

R R RV V V I I o I 2

1

2

1

2

34

4221 )1(0

Id I I oooV

R

RV V

R

RV V V

1

212

1

221

)(

R

R A d

1

2





Fig. 2.16 A difference amplifier.

Fig. 2.17 Application of superposition to the analysis of the circuit of Fig. 2.16.





• Refer to Fig.2.18 the common – mode gain ACm can be calculated

as follows:

i R R R

RV V

R R

RV Ri ICm ICm ICm 2

134

3

34

4

11

1][

1

V

R

R

R

R

R R

RV

R R

R

R

RV

R R

R RiV

R R

RV ICm ICm ICm ICmo ).1(.

4

3

1

2

34

4

34

3

1

2

34

422

34

4

0).1)((4

3

1

2

34

4

R

R

R

R

R R

R

V

V A

ICm

oCm

R

R

R

R

4

3

1

2

CMRR ICm 0

Thus

When





• Refer to Fig. 2.19 the input resistance

• R1 is required to be large and R2 /R1 is desired to be large

• This configuration has two disadvantages:

1. Low input resistance 2. It is difficult to vary Ad

i

V R

Id id

1

R Ri Ri RV Id id 11111 20

Fig. 2.18 Analysis of the

difference amplifier

Fig. 2.19 Finding the input resistance of

the difference amplifier.





2.5 The Instrumentation Amplifier

• The low input resistance problem of the difference amplifier can besolved by using two voltage followers with gain as shown in Fig.2.20(a) A1 and A2 which connected as noninverting configurationwith gain

• The difference amplifier A3 operates on the difference signal

and provides the output

Therefore, the differential gain

)1(1

2

R

R

V R R

R RV V Id I I )1()1)((

1

2

1

212

V R

R

R

RV Id o )1(

1

2

3

4

)1(1

2

3

4

R

R

R

R A d




• ACm = 0 and high differential gain

• The disadvantages of 2.20 (a) are:1. VICm is amplified in the first stage and may saturate the 2nd state

2. A1 and A2 must be matched to have the same gain.

3. To vary Ad, we have to change R1 (up with A1) and R1 (with A2)and have to be perfectly matched (very difficult).

• Disconnect the node X between the two resistors R1 and R1 as shownin Fig.2.20.(b) will solve the three problems.

- Refer to Fig.2.20 (b) assuming ideal op–amps as shown in Fig.2.20 (c)

R

V iV V V Id

Id I I

2 1

12

V R

RV V Id o o

)2

21(1

22 1

2.5 The instrumentation Amplifier (Continued)




Fig. 2.20 A popular circuit for an instrumentation amplifier: (a) Initial approach to the

circuit; (b) The circuit in (a) with the connection between node X and ground removed and

the two resistors R1 and R1 lumped together. This simple wiring change dramatically

improves performance; (c) Analysis of the circuit in (b) assuming ideal op amps.

2.5 The Instrumentation Amplifier (Continued)




• The overall difference voltage gain is given by:

Example 2.3:

Design an instrumentation amplifier circuit (Fig.3.20(b)) to provide again that can be varied over a range of 2 to 1000 utilizing 100 KΩ

variable resistances or potentiometer (pot).

Solution:

• The first stage is used as gain stage.

• The second stage is used as a difference stage

of gain 1 therefore select R3 = R4 = 10 KΩ.

• Choose 2R1

as a series of two resistors R1f

(fixed)

and R1V = 100KΩ pot. as shown in Fig.2.21

• difference voltage gain is

)1(1

2

3

4

R R R

V V A Id

od

)2

21(1

2

3

4

R

R

R

R A d

Fig. 2.21 Choice of 2R1





Example 2.3: (Continued)

• To realize an adjustable gain over a range of 2 to 100, we can write:

)21(11

2

R R

R

V f = 2 to 1000

2)

2

1( 11

2

R R

R

V f 1000)

21(

11

2

R R

R

V f and

• Solve these two equations gives

R1f = 100.2 Ω and R2 = 50.05 KΩ

We can choose the standard resistors R1f = 100 KΩ and R2 = 49.9 KΩ





2.6 Active Filters• A Filter circuit can be constructed using passive components:

resistors and capacitors. An active filter additionally uses an amplifier

to provide voltage amplification and signal isolation or buffering.

)1

1).(1)(()1).(

/ 1

/ 1)(()(

1111

1

RSc R

RsV

R

R

RSc

ScsV sV

G

f

i

G

f

io

2.6.1 Low-Pass FilterAn ideal low-pass filter provides a contentoutput from the dc up to cutoff frequency

fOH and then passes no signal above thatfrequency. The ideal response of low-passfilter is shown in Fig.2.22.

• The first order low-pass filter using asignal resistor and capacitor is shown inFig.2.23 (a). The output voltage is given

by:

Fig.2.22 The idea response of LPF




) / 1

1()

/ 1

1)(1(

)(

)()(

oH

v

oH G

f

i

o

j j R

R

jV

jV j H A

• The filter transfer function is defined as H(s) = Vo(s) / Vi (s) and is

given by:

Where Av is the filter voltage gain and OH is the cutoff frequency which

calculated as:

)1

1)(1(

)(

)()(

11C Rs R

R

sV

sV s H

G

f

i

o

• The filter frequency response is determined by replacing s by j inthe filter transfer function H(s) which leads to H( j) = Vo( j) / Vi ( j) andis given by:

1111 2

112

C R f

RC f w oH oH oH

2.6.1 Low-Pass Filter (Continue)




• The Bode-plot of H(j) is shown in Fig.2.23 (b)

Example:

• Calculate the cutoff frequency of a first order low-pass filter when

G

f

V R

R

A 11111 2

112 C R f RC f w oH oH oH

kHz f oH 63.6)1002.0)(102.1(2

1 µF0.02C

63

K1.2R1 and

Fig.2.23 First-order low-pass active filter (a) the circuit; (b) the Bode plot.

2.6.1 Low-pass Filter (Continued)




2.6.2 High–Pass Filter• A filter that provides or passes

signals above cutoff frequency FOL

is high-pass filter The idealresponse of this filter is shown inFig.2.24.

• The first-order high-pass filtercircuit is shown in Fig.2.25 (a).The output voltage is given by:

)1).( / 1

)(()(11

1

G

f io R

R

Sc R

RsV sV

)1()

1)(1(

)(

)()(

11

11

11

11

RSC

RSC

RSC

RSC

R

R

sV

sV s H Av

G

f

i

o

G

f

V R

R A 1

1111 2

112

C R f

RC f w oLoH oL

and

• The Bode-plot of H(j) is given in Fig.3.25 (b)

Fig.2.24 The idea response of HPF

)

/ 1

/ (

)(

)()(

OL

OL

v

i

o

j

j

jV

jV j H

A

The filter transfer function

The filter frequency response




Example:

• Calculate the voltage gain and the cutoff frequency of a high-passfilter shown in Fig.2.25 for R1 = 2.1 KΩ, C1 = 0.05 µF and RG=10KΩ

and RF = 50 KΩ

Solution:

The cutoff Frequency:

610

50

11 G

f

V R

R

A (The voltage gain)

KHzC R f oL 5.1)1005.0)(101.2(2

1

2

163

11

2.6.2 High–Pass Filter (Continued)




Fig. 2.25 High-pass filter: (a) the circuit; (c) response Bode plot.

2.6.2 High–Pass Filter (Continued)

(a)(b)




2.6.3 Band-Pass Filter

• The Band-pass filter circuit passessignals above one ideal cutofffrequency fOL and below a secondcutoff frequency fOH as shown inFig.2.26.

• Fig.2.27 shows a band-pass filter usingtwo stages, the first a high-pass filterand the second a low-pass filter. The

combined response represent the filter.

)1)(1

)(()1).( / 1

)(()(11

11

11

11

G

f

i

G

f

io R

R

C SR

C SRsV

R

R

Sc R

RsV sV

)1).(1

1)(()1).(

/ 1

/ 1)(()(

221

22

2

1G

f

oG

f

oo R

R

cSRsV

R

R

Sc R

SC sV sV

)()(

)()

1

1)(

1()1).(()(

2211

112

1 s H sV

sV

cSRC SR

C SR

R

RsV sV

i

o

G

f

o

• Combine the above equations we get the filter transfer function as:

Fig.2.26 The idea response of BPF




2.6.3 Band-Pass Filter (Continued)

• The Bode-plot is shown in Fig.2.27 (b).Example:

• Calculate the cutoff frequencies of the band-pass filter if R1 = R2 =10kΩ,C1 = 0.1 µF and C2 = 0.002 µF

Solution:

2)1(G

f

V R

R A

112

1

C RF oL

22

2

1

C RF oH

and

HzC RF oL 15.159)10)(1010(2

1

2

173

11

KHzC R

F oH 96.7102102

1

2

154

22

OH OL

OL

v j x

j

j j H A

/ 1

1

/ 1

/ )(

• The filter frequency response is determined by replacing s by j inthe filter transfer function H(s) which leads to H( j) = Vo( j) / Vi ( j) and

is given by:




Fig. 2.27 Bandpass active filter (a) the circuit; (b) response Bode plot.

2.6.3 Band-Pass Filter (Continued)

cc415 chapter 2 signal conditioning

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