ALUALU(Continued)(Continued)

ALUALU(Continued)(Continued)

Computer ArchitectureComputer Architecture(Fall 2006)(Fall 2006)

ALU Notation• An ALU is denoted using the following graphical

notation.

ALU

Operand1 (A)

Operand2(B)

Result

8 8

9

Operation

Indicates number of bits on each line

4

Operation Result

010 A•B

110 A+B

210 A

Selecting 2 Registers

• ALU needs 2 operands to work!– How to select 2 registers from a Register File?

008

01

10

11

2

MUX1

Register Select 1

8

8

8

8

00

01

10

11

2

MUX2

Register Select 2

8

8

8

8

8

Register

File

Operand1 Operand2

ALU with Inputs

ALU

8 8

8

Operation

4M

ux1

Mu

x2

Register

File

(4)

8

Operand1

2

Operand2

2

Results

What do we do with results or output from the

ALU?

ALU Output

• Solution: Put it into a register!

• OK, so do we do that?– That is, Given 1 input how to route it on n

different paths?

8

8

8

8

8

Result from ALU

Select Inputs2

DeM

ux

00

01

10

11

Register 1

Register 2

Register 3

Register 4

Handling ALU Output

ALU

8 8

8

Operation

4

Mu

x1M

ux2

Register

File

(4)

Flags

DeM

ux32

Operand1

2

Operand2

2

Destination

2

A

B

Each device has its own selection logic typically

specified using a truth table! (Note that this is not a single

Mux but 8, 4x1 Muxs)

Clock

Operation Result

010 A•B

110 A+B

210 A

Data path

• The ALU and associated components constitute the Data Path– Includes Registers, Multiplexers and any other

device associated with ALU operations– All operands are typically the same size

• Register sizes match with size of operand

– Size of operands are associated with CPU• 32-bit processor (ALU uses 32-bit operands) • 64-bit processor (ALU uses 64-bit operands)

Handling Constant Values

• Earlier data path did not permit initialization of registers with constant values– Limited constant values could be achieved using

operations supported by ALU.• Even that was pretty convoluted!

• Solution: Add instruction to initialize register– With a constant value– Typically, the constant value is embedded as a

part of the instruction.• By reusing as many bits as possible for this task

Implementation Strategy

• Fix code for constant value initialization– Have to use a code that is not already used by

ALU• In our case, let’s set it to 1111 for our ALU

– If initialization is detected, use constant bits in instruction to initialize a register.

• Need 8-bits to hold constant value for 8-bit CPU– For this we can reuse register selection input bits to double

up as constant bits in this instruction as we are not using registers for any operation.

• Need 2-bits to select 1 of 4 destination registers

Handling Constants

Operation

ALU

8

8

8

4

Mu

x1M

ux2

Register

File

(4)

Flags

DeM

ux8

Operand1

4

Operand2

4

Destination

4

A

BMux

8

0 1

8

4

Where do these bits actually come from?4

This Mux chooses between data from registers or the 8 bits from the instruction depending on the operation. If the operation is to store a constant then the ALU simply passes the constant bits as its output. The constant bits are then pushed to the DeMux and are finally stored in the register indicated by destination

This is not a special device but just a notation to show the lines are being combined

Where do instructions come from?

• The data path uses a set of bits that constitute an instruction– Where do these instruction bits come from?

• Solution: Memory– A large collection of words

• Each word consists of 1 or more bytes (8-bits)• Similar in philosophy as a Register File

– Manufactured using different technology• Makes it slower• But a whole lot cheaper!

Memory Organization Revisited

Memory Slot 0

Memory Slot 1

Memory Slot n

• • •

M

U

X

Bi-directional Data lines

DE

MUX

16

16

Read (RD)

Selection Lines

8

Tri-state Buffer: Special device that disables the line so that the same wire can be used for reading or

writing (bi-directional)!

Note that any memory slot can be read or written to by providing suitable bit patterns (or Addresses) for the selection lines to the Mux and De-Mux. In other words, memory slots can be Randomly accessed. Consequently,

such memory organizations are called Random Access Memory (RAM)

Memory-ALU Interconnection

• Typically memory is large in size• Gigabytes in size these days

– Cannot be packed into the CPU• Cost prohibitive

– Memory is manufactured separately – Interconnected with the CPU using Buses

• Buses are long wires interconnecting devices– Particularly ALU Data Path & Memory

• Buses for memory– Address Bus: Selection lines for Mux and De-Mux– Data Bus: Bits to be written into memory locations.

Abstract Notation for Memory

Memory(RAM)

Size of each SlotX

Number of Slots

(16 x 256)

Uni-directional Address Bus

Bi-directional Data Bus

Read/Write (RD) Logic

Enable (EN)

16

8 Note the relationship between the Memory configuration and the number of lines in the

Address and Data Buses.

Address Bus carries bits for Selection lines (Mux & De-Mux). These bits are

called Addresses!

Using Memory

• Memory has 3 primary inputs• Address Bus carrying address of memory slot

– Indicates which memory slot to read or write

• Data Bus (The actual data bits to be stored or read)• Control signals (Read/Write & Enable)

– How to wire these inputs & outputs to the ALU data path?

• Design requirements– Need to store output from ALU– Need to load data from memory into ALU– Need to load instructions from memory into ALU

We need go provide Addresses to the Memory unit in order to

do these operations!

Tackling Addresses

• Address is used to select a memory slot– For fetching instructions

• In an repetitive manner• Typically from consecutive locations

– Think of it as an Array in Java!

• Need to somehow generate the addresses– Typically done using some register in the ALU to store

intermediate results

– For reading/writing data at random addresses• Address depends on the instruction at hand

– The instruction typically needs to identify the address to read or write.

// Assume each instruction is 16-bits longshort memory[256];for (int address = 0; (address < 256); address++) {

instruction = memory[address];process(instruction);

}

Address Generation Logic Circuit

• Issues to consider & solutions– Address needs to be generated by adding 1

• Use a ripple carry adder to add

– Addresses need to be stored before/after add• Use a register

– Need alternate between address for instructions and address for storing/reading data

• Use a multiplexer for choosing• Use a Clock to drive the selection lines of this

multiplexer– Select address for instruction first (Clock = 0).– Select address for reading/writing data next (Clock = 1).

Catch!

• Our data path is not symmetric– Instructions are 16-bits wide– Data or Registers are 8-bits wide– How do we design a memory module that can

• Provide 16-bits first• Provide 8-bits next

• It is going to take some work– Use the lowest denominator memory module

• One than can provide 1 byte at a time• Assemble bytes together to make instructions

Working with Bytes…

Memory

(8 x 256)

Address Bus

8

ChipEnable RD

Data Bus

Byte 1 Byte 2

Instruction

Byte 3

Data

De-Mux

00 01 1X

S1 S0

Byte Select

Instruction / Data

When the clock is low (S1=0) the De-Mux places the bytes read from Memory into Byte1 and Byte2 depending on S0 (so S0, the least significant bit from the address bus) which switches between 0 and 1 when clock is low to fetch two bytes from memory.. When the clock is high (S1=1), the De-Mux ignores s0 and places the data read from memory into Byte 3.

8

1

Least significant address bit changes between 0 and 1 for each consecutive address.

Design Considerations• Address needs to be generated to fetch

instructions from memory– Typically one of the registers hardwired to the data

path is reused for this purpose• This register is typically called

– Program Counter– Instruction Pointer

• In the sample data path Reg3 is being used as the instruction pointer

– Using a register eases handling conditional and unconditional branching in programs

• These are used to achieve if and looping constructs in high level languages

• Also used for managing subprograms/methods/functions in a high level languages

Adding Memory to Data path

ALU

8

86

Mu

x2

Register File (3)

Reg3Flags

DeMux

Operand1

2

A

Mux

8

0 1

8

Mu

x1

8

32

2

Operand2OP Code Destination

42

B

8

+

8110

Latch

Mux0 1

DeMux00 0111

Data Latch

Mux0 1

Memory

(8 X 256)

8

Data Bus

8

Address Bus

*

*R W

RDEN

8

8

*R

*W

Delay to generate 2 clock pulses from 1. This causes 110 to be added to Reg3 two times for each clock pulse.

Branching

• Branching is achieved by simply resetting value in Register R3 with a suitable address– Note that R3 ultimately determines address from

where next instruction is fetched for processing.

• Can be achieved in two ways– Load a constant in to R3– Add a different constant (other than 1) in the

address generation circuit.• Assign a new OPCode for this operation, say: 110000

Branching Circuit

Reg3Temp Reg

8-bit Adder

110

Address Bus

Clock Input

8

8

88

Mux70

1 88-bit Constant from Instruction

8

Sel.2

2OpCode (1100)

Select to add constant address

only when clock is 1 because until such time, the constant

value is not yet sable!

Clock Multiplier

This circuit adds 110 to the address of next instruction stored in Reg3 normally. However, in a branch instruction, rather than adding 110 this logic circuits adds a constant value specified in the instruction causing the address for the next instruction to change. The constant can be positive or negative (2’s comp). Similar approach is used for conditional branching as well!

Conditional Branching

• Branching based on conditions – Used to implement if..then constructs– Constant branch address is added only if some

condition is true• In our case let’s do a simple example involving the

carry flag generated by the ALU

– Introduce new OPCode (say 1110) • Change address (in Reg3) only if Carry Flag is 12.

Conditional Branching Circuit

Reg3Temp Reg

8-bit Adder

110

Address Bus

Clock Input

8

8

88

Mux70

1 88-bit Constant from Instruction

8

Sel.

2

2

OpCode (1100)

OpCode (1110)31

Carry Flag (1 bit)+

Generates a 1 when OPCode=1110 and

CarryFlag = 1Only when Clock is 1

Clock Multiplier