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    UNIT 3 ALU AND CONTROL UNITORGANISATIONStructure3.0 Inuoduction3.1 Objectives3.2 ALU Organisation3.2.1 A imple ALU Organisation

    3.2.2 Floa~ing oint ALU3.2.3 ArithmeticProcessors3.3 Control Unit Organization3.3.1 Functional Requirements of a Control Unit3.3.2 Structure of Control Unit3.3.3 An Illustration of Control3.3.4 Hardwired Control Unit

    3.4 Summary3.5 Model Answers

    3.0 INTRODUCTIONBy now we have discussed about the instruction sets and register organisation followed by adiscussion on the micro-operations and a simple arithmetic logic unit circuit. Inall thej previous Units, we have used a term conuol signals, without any definition. In this unit fmtwe will discuss about the ALU organisation. We will also discuss about the floating pointALU and arithmetic co-processors whichare commonly used for floating pointcomputations. This discussion will be followed by the discussions on the confrol unit, acomponent which causes all the components of computer to behave effectivelyto achieve thebasic objective i.e. program execution. The control unit causes all the thingsto happen in thecomputer.We will discuss about the functions of a conuol unit, its structure followed by the hardwiredtype of control unit. We will introduce the micro-programmed based conml unit in the nextUnit. The details provided in Unit 3 and4 about confrol units can be supplemented by thedetails given in the further readings of the block.

    OBJECTIVESAt the end of this unit, you will be able to

    discuss the &sic organisation ofALUdiscuss the requirements of a floating pointALUdefine the term arithmetic coprocessordefine what is a control unit and its functionsdescribe a simple conuol unit organisationdefnine a hardwired conuol unit

    3.2 ALU ORGANISATION-

    As discussed earlier, an ALU performs the simple arithmetic-logic and shift operations.Thecomplexity of an ALU depends on the type of instruction set which has been realised for it.The simple ALUs can be constructed for fixed point numbers, on the other handthe floatingp,oint arithmetic implementation require more complex control logic anddataprocessingcapabilities, i.e. the hardware. Several micro-processor families utilizes only fixed pointarithmetic capabilities in the ALUs and for floating point arithmetic or other complexfunctions they may utilise an auxiliary special purpose unit. This unit is called arithmeticco-processor. Let us discuss all these in greater details in this section.

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    CPUOrganisation 3.2.1 A Simple A L U OrganisationAn ALU cons ist of various circuits which arc uscd for excculion of data processingmicro-operations. But how these ALU circu its are used in conjunctio n of other registers andcontrol unit. The sim plest organisation in this respect for fixed poin t ALU w as sugge sted byJohn von N eumann in his IAS comp uter design. The structure of this simple organisation isgiven in figure 1.

    Register QuotientRegister (MQ) Register (DR)Q.) .) -arallelAdder and , Control : Controlother Logic Unit - ignalsCircuits Flags -

    Figure 1:Structure&a fixed point Arithmetic logic unitThe organisation have three onc word registers AC, MQ and DR which are used for datastorage. Pleas e noLe that the arithmetic , logic circuits have two inp uts and only one ou tput.In the prese nt case the two inputs are AC and DR reg isters, while output is AC register. ACand M Q are generally organiscd as a single AC.MQ register. This register is capable of left orright sh ift operations. Som c of thc micro-operations which can be define d on this unit are :

    Addition : A C t A C + D RSubtraction : A C t A C - D RAN D : A C ~ A C A D ROR : A C c A C v D RExclusive OR : AC t AC @ DRNOT : A C t X

    In this ALU organisation the multiplication and division are implemen ted using shift-add/subtract operations. The M Q (Multiplier-Quotient register) is a special register used forimpleme ntation of multiplication and divisio n. We are no1 giving the detai ls of how thisregister can be used for implementing m ultiplication and d ivision algorithms. For moredetails on these a lgorithms please refer to further readings. The M Q register stores themultiplier if multiplication is to be performcd o r the quo tient if ,&vision is to be performed.For m ultiplication o r division operations DR register stores the multiplicand or divisorrespectively. The resu lt of multiplication or division on apply ing certain algo rithm canfinally be obtained in AC.MQ register combination. These ope rations can be represented as:Multiplication : AC.MQ c DR x MQDivision : AC.MQ t MQ + DRDR i s another important registcr which is used for storing second operand. In fact it acts as abuffer register which stores the data brought from the memory for an instruction. Inmachines where we have general purpose registers, for example m otorola 68020, any of theregister can be utilised as AC. MQ and DR.Bit sliceALUsIt was feaqible te m anufacture smaller sue4 as 4 or 8 bits f i c d point ALUs on a s ingle ICchip. If these chips are designed as expandab le types then using these 4 or 8 bit ALU chipswe can make 16.32.64bit array like circuits. There are called bit- slice ALUs. The basicadvantage of such ALUs is that these ALUs can be constructed for a desired word size. M oredetails on bit- s l~ c e LUs can be obtained from further readings.

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    Alu rnd C'untml UnltOrgrnlmtlonheck Your Progress IState true or falsc1. A multiplication opcration can be implementedas a logical operation.

    True) alse 12. The multiplier-quotient register stores the remainder for a division operation

    True 1 False 13. A word is processed sequentially on a bit slice ALU

    True ( False1.2.2 Floating Point ALUA floating point ALU can implement floating point operations. But before discussing such aunit, let us first discuss briefly about the floating point operations to get an idea of therequirements of such a unit.

    Floating Point ArithmeticLet us give you a brief introduction to floating point arithmetic and floating point numberrepresen ration.A binary floating point number is represented in a normalised form, that is, the number is ofthe form +0. (significand starting with non-zero bit)x 2' (Ex-'VduC). Figure 2 shows aformat of a 32 bit iloating point number.

    8 9 31Sign Biased Exponent = 8 bits Significand = 23 bits

    Sign bit is for the significand.Flgure 2 : loating Pdnt Number Representation

    The characteristics of a typical floating point represencation of 32bit in the above figure are:- Left-most bit is the sign bit of the number- Mantissa or significand should be m nonrialiscd lorm- The base of the number is 2- A value of 128 is added to the exponent. (why ?) This is called a bias.A normal exponent of 8 bit normally can represent exponent values as0 to 255. However,as we are adding 128 in the biased exponent, thus, the actual exponent values representedwill be - 128 to 127.Now, let us define the range which a normalised mantissa can represent. As for a normalisedmantissa the left most bit can not be zero, therefore, it has to be 1.Thus, t is not necessary tostore this first bit and it is assumed implicitly for the number. Therefore, a 23 bit mantissacan represent 23+ 1=24 bit significand.Minimum value of the significand:

    The implicit first bit as 1 followed by 23 zero's0.1000 0000 0000 0000 0000 0000Decimal equivalent = 1x2.' = 0.5

    Maximum value of the significand:The implicit first bit 1 followed by 23 one's0.1111 1111 1111 1111 1111 1111

    Decimal equivalent:Binary: 0.1111 1111 1111 1111 1111 1111+ 0.0000 0000 0000 0000 0000 OOO1 = 2-"I.oooo m oooo m oooo ooou = 1

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    CPU Orpnirrthm So decimal equivalent of mantissa= (1-2-%)Therefore, in normalised mantissa and biased exponent form, the format of figure 2 canrepresent binary floating point number in the range:Lowest negative number : Maximum significand and maximum exponent

    = - ( I - 2 - 9 ~ 2 ~ ~Highest negative number :Minimum significand and Minimum exponent

    = -0.5 x 2-128Lowest positive number : 0.5xHighest positive number : (1-2-%)x 10ln

    -. !!- '3.-

    ~ e ~ r t i v d , ~umbers - I Positiveoverflow numbers Positiveexpressible expressible overflow

    - (1-2-9 2lZ1 -,,.I 2-lZ8 I +o.s 2-lZ8 ( 1 . 2 - 9 x 2lZ7Z em

    Flpre 3 : inary floating pdnt number range for 32 bit formatIn floating point numbers, the basic trade off is between the range of the numbers andaccuracy or precision of numbers. If in32 bit format we increase the exponent bits, therange can be increased, however the accuracy of numbers will go down as significand willbecome smaller. Let us give an example which will clarify the term precision. Suppose wehave one bit binary significand then wecan represent only 0.10 and 0.11 in a normalisedform. Thevalues such as 0.101,0.1011 andsoon can not be represented as a completenumbers. Either they have to be approximated or truncated and will be represented as either0.10 or 0.11. Thus, it will create an error. The higher the number of bits in significand betterwill be precision.In floating point numbers for increasingboth precision and range more number of bitsareneeded. This can be achieved by using double precision numbers. A double precision formatis normally of 64 bits.Institute of Electrical and Electronics Engineers (IEEE) a society which has created lot ofstandards regarding various aspects of computer have created IEEE standard 754 for floatingpoint representation and arithmetic. The basic objective of developing this stan-dard was tofacilitate the portability of programs from one to another computer. This standard hasresulted in development of some standard numerical capabilities in various micro-processors.This representation is shown in figure 4.

    I m ~ l i e dbase = 2

    Single precesion = 32 bits S is sign bit

    0 1 8 9 3 1 ~ign ifican d s in

    Double precision = 64 bitsFlgure 4 :IEEEStandard 754 format

    Figure 5 gives the floating point numbersspecified by theIEEE tandard754.Single Precision Numbers (32 bits)Exponent (E) Signijlcand(N) Value l Comments255 Not equal to 0 Do not represent a number

    normalired form i.e.the first bit isimplied and is 1BiasedExponent (E)

    tS

    Significand

    Biased Expanent(E l Significrrndm)

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    255 0 - or+ od de nding on sign bitO

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    CPU Organhtion The two units can be termed asexponent unit and mantissa unit. The mantissa unit has toperform all the four arilhmcbc operaboos on the mantissa. Therefore.a general purposefuted- point mantissa unlt may be used for this purpose. However, for exponent unit we onlyneed circuits to add, subtractand compare the exgonenu. Thus. a simple circuitcontainingthese functions willbe sufficicnt. The compiison can be pcrforincd by a comparator or bysimple subtraction operation.The implementation details of floating point arithmetic on floating point ALUs canbe seenfrom the further readings.1.23 Arithmetic ProcessorsThe very first question in this regard is : What is an arithmetic processor?" and, "What istheneed for arithmetic processors". A typical CPU needs most of the control anddataprocessing hardware for implementing non-arithmetic functions. As the hardware costs aredirectly related to chiparea,a floating point circuit being complex in nature are costlytoimplement. They are normally not included in the instruction set of a CPU. In such systems,floating point operations are implcrnented by using software routines. This implementationof floating point arithmetic is definitely slower than the hardware implementation. Now, thequestion is whether a processor canbe constructed only for arithmetic operations? Aprocessor if devoted exclusively to arithmetic functions; canbe used to implement a fullrange of arithmetic functions in the hardware at a relatively low cost. This canbe done in asingle IC. Thus, a special purpose arithmetic processor, for performing only the arithmeticoperations, can be constructed. Although this processor physically is separate, yet willbeutilised by the CPU to execute a class of arithmetic instructions. Please notein theabsenceof arithmetic processors, these instructions may be exccuted using the slower softwareroutines by the CPU itself. Thus, this auxiliary processor enhances thespeed of execution ofprograms having lot of complcx arithmetic computations. In addition, italso helps inreducing program complexity,as it provides more instructionsto a machine. Some of theinstructions which can be assigned to arithmetic processorscan be: add, subtract, multiplyand divide fixed and floating point numbers of various lengths; exponentiation; logarithmsand trignometric functions.How can.thisarithmetic processor be connectedto the CPU? Two mechanismsare used forconnecting arithmetic processor to the CPU.If an arithmetic processor is treated as one of theYO or peripheral unit then it is termedasperipheral processor. The CPU sendsdata and instructionsto the peripheral processor whichperforms the required operations on thedata and communicates the results back to theCPU.A peripheral processor have several registersto communicate with theCPU. These registersmay be addressed by the CPUas Inputt'Output register addresses. The CPU and peripheralprocessors are normally quite independent and communicate with each other by exchange ofinformation using data transfer instructions. Thisdata transfer instructions mustbe specific .instructions in the CPU. This type of connection is called loosely coupled.On theother hand if the arithmetic processor has register and instruction set which can beconsidered extension of the CPU registers and ins~ruction et then it is called tightly coupledprocessor. Here the CPU reserves a special subset of code for arithmetic processor. In sucha system the insuuctions meant for arithmetic processor are fetched by CPU and decodedjointly by CPU and the arithmetic processor, and finally executed by arithmktic procqsor.Thus, these processors can be considered logical extension of the CPU. Such attachedarithmetic processorsare termed as Co-processors. Let us discuss them in more details.Peripheral ProcessorAn example of one such arithmetic processor is the AM D 9511/12 one chip floating pointprocessor. The advantage of this processor is that they canbe utilised with any CPU, whilethe disadvantagesare that thcy need explicitly programmed and slow communication linkswith the CPU. These processors can be utiliscd as given in the following figure:Performer Instructions executed Processing details1) CPU Data-transferinstructions

    These instructions help in sending aset input operandsand commands, e.g.arithmetic operations, to the peripheralprocessor.

    2) Peripheral Decode&Execute Results are generated and placed in

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    Processor the cornrnar~d eceived registers directly access,( e to the CPU Alu and Control UnitOrgrnlsatlonfrom CPU asing i h c opcrs;:,or;.-3) CPU Checks status by polling It determines whether the peripherala status register or by processor has completed the task.receiving interrupt from

    the peripheral processor.4) CPU Data transfer instruction is CPU obrains the results from the

    executed peripheral processor by executing thisdata transrer instruction.Figure 7 :Communication between the CPU and Peripheral Rucesror

    In certain implementations CPLT has to wait for peripheral processor to finish, therefore,remains idle for that time.CoprocessorsCoprocessors, unlike peripheral processors, are tailor made for a parlicular family of CPUs.Normally, each CPU is designed to have a coprocessor interface. The control signal circuitsof the CPU is designed for the interface beforehand. Special instructions are earmarked forexecution by the coprocessors. These coprocessor instructions can appear in any assemblyor machine language program similar to any other instruction. The CPU hardware takes careof the instruction execution by the coprocessors. The coprocessor instructions can beexecuted even if a coprocessor is not present, by already stored software routines atpre-determined memory locations. If a coprocessor is not attached, then the CPU issues asoftwarc (coprocessor) trap which executes a desired sortware localion routine for theinstruction, Thus, without changing the source or object code we can execute thecoprocessor instructions by the CPU even if the coprocessor is not present. Figure8 showsageneral structure, along with some of the conuol lines between the CPU and the coprocessor.

    System Bu sFigure 8 :General Structure of CPU-Coprc~essor

    As both the processors are directly linked, therefore, they canbe synchronised easily. Thecontrol lines between them are few. The data transfer between the processors can take placethrough the system bus. The CPU may act as the master of coprocessor. The registers ofcoprocessor can be written into or read by the CPU directly as it do for the main memory.Sometimes it is useful to allow the coprocessor to control the bus as in such cases it canconuol data transfer from memory or can initiate data transfer to the CPU.In case coprocessor can control the system bus then it is allowed to decode and identifytheinstructions at the same time CPU is doing. The coprocessor then can execute theinstructions meant for it directly. This type of approach is Collowed in8087 arithmeticcoprocessor of 8086. While in some CPUs, only the CPU can decode the coprocessorinstructions. This is the case for the 68881 floating point coprocessor of Motorola68000series. A CPU can employ more than one different coprocessors if desired.Check Your Progress 21. Find out the range of a number for the following floating point representation:

    Base + 2Sign + 1 bitExponent + 4 bits. Bias of 8 is used

    55

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    CPU OrynbaUon Significand + 3 bitsAssume the normalised mantissa representation

    ......................................................................................................................2. State true or false

    (a) A double precision number is used when accuracy requirements are higher.True False11

    (b) A zero can not be represented in IEEE standard 754 format.True- Falsen

    (c) On multiplication of floating point numbers, the value of bias need to be subtractedafter adding the two exponents.

    True False(d) The exponent unit of floating point ALU must perform all the four arithmetic

    operations.True False

    3. What is an arithmetic processor? Compare the co-processor with peripheral processor.

    ......................................................................................................................e!3.3 CONTROL UNIT ORGANISATIONAfter discussing about the ALU, let us now discussabut a very important component of theCPU i.e. the control unit.The basic responsibilities of the control unit is to control:

    data exchange of CPU with the memory or ID modulesinternal operations in the CPU such as:- moving data between registers (register transfer operations)- making ALU o perform a particular operation on the data.- egulating other internal operations.

    But how does a control unit controls the above operations? What are the functionalrequirements of the control unit? What is its structure? Let us explore answer to thesequestions in the subsequent sub-sections.3.3.1 Functional Requirements of a C ontrol UnitLet us first tr y to define the functions which a control unit must perform in order to get thethings to happen. But in order to define the functions of a control unit, one must know whatresources and means it have at its disposal. A control unit must know about the:(a) basic componentsof the CPU(b) micro-operation this CPU performsCPU of a computer consist of the following basic functional components:

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    The Arithmetic - Logic Unit (ALU): which performs the basic arithmetic andlogical operations.Registers: which are used for information storage within the CPU.Internal data paths: These paths are useful for moving the data between tworegisters or between a register and ALU.External data paths: The role of these data paths are normally to link the CPUregisters with the memory or I/O modules. This role is normally fulfilled by thesystem bus.The control unit: which causes all the operations to happen in the CPU.

    The micro-operations performed by the CPU can be classified as:Micro-operations for register to register data transferMicro-operations for register to external interface (i.e.in most cases system busdata transfer)Micro-operatioqs for external interface to registerdata transferMicro-operations for performing arithmetic and logic operations. Thesemicro-operations involve use of registers for inputand output

    The basic responsibility of the control unit lies in the fact that the controlunit must be able toguide the various components of CPU to perform a specific sequence of micro- operations toachieve the execution ofan instruction.What are the functions which a control unit performs to makean instruction executionfeasible? The instruction execution is achieved by executing micro-operations in a specificsequence. For different instructions this sequence maybe different. Thus. the control unitmust perform two basic functions:

    cause the execution of a micro-operation.enable the CPU to execute a proper sequence of micro-operation which isdetermined by the instruction to be executed.

    But how does these two tasks achieved? The control unit generates control signals which inturn are responsible for achieving the above two tasks.But, how are these control signalsgenerated? We will answer this question in the later sections. But first let us discuss asimple structure of a control unit.3.3.2 Structure of Control UnitA control unit have a set of input values on the basis of which it producesan output controlsignal which in turn perform micro-operations. These output signals controls the executionof a program. A general model of a control unit is shown in Figure9.

    VariousFlagsof ALUopeation

    Master clock

    InstructionRegister

    ControlControl Signals with inthe CPW for:- /Register to Reg~sterALU operation-Control Signals to ControlControl Bus Bu s

    signals from the control bus

    Figure 9 :A general model &Control UnitIn the model given above the control unit is a black box which has certain inputs and outputs.

    Al u and Control UnitOrganisation

    The inpurs to the control unit are:57

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    The Master Clock Signal: This signal causes micro-operations to beperformed. Ina single clock cycle either a single or a set of.simultaneous micro-operations canbeperformed. The time taken in performing a single micro-operation is also termed asprocessor cycle time in some machines. However, some micro-operations, suchasmemory read,may require more than one clock cycle ifkmb,,s greater thanone.The Instruction Register: The operation code (opcode) which normally includeaddressing mode bits of the instruction, help in determining the various cycles tobeperformed and hence determines the related micro-operations which are needed tobe performed.Flags: Flags areused by the control unit for determining the status of the CPU.The outcomes of a previous operation on ALU can also be detected using flags. Forexample, a zero flag will help the control unit while executing an instruction 1SZ(skip the next instruction if zero flag is set). In case the zero flag is s t hen controlunit will issue control signals which will cause Program Counter (PC) to beincremented by 1. In effect skipping the instruction. which CPU was supposed toexecute next.Control Signals &om Control Bus: Some of the control signals are provided tothe control unit through the control bus. These signalsare issued from outside theCPU. Some of these signals are interrupt signals and acknowledgment signals.

    On the basis of the input signals the control unit activates certain output control signalswhich in turn are responsible for the execution of an instruction. These output controlsignalsare:Control signals which are required within the CPU : These control signals cau&two types of micro-operahbns,viz. fordata uansfer from one register to another,and for performing an ALU operation using input and output registers.

    Control signals to control bus :The basic purpose of these control signalsare to.bring or to transfer data from CPU register to memory or VO modules. Thesecontrol signalsare issued on the control bus to activate a data path.Now, let us discuss about the requirements from such a unit. A prime requirement for controlunit is that it must know all the instructions to be executed and also the nature of the resultsalong with the indication of possible errors. All this is achieved with the help of flags.op-codes, clock and some control signals to itself.A control unit contain a clock portion, whose job is to provide clock pulses. This clocksignal of control unit isused for measuring the timing of the micro-operations. In general,the timing signals from control unit are kept sufficiently long keeping in mind thepropogational delays of signals within the CPU along various data paths. Aswithin the sameinstruction cycle, different control signals aregenerated at different times for performingdifferent micro-operations, therefore, a counter can be utilised with the clock to keep thecount. However, at the end of each insliuction cycle the counter should be reset to the initialcondition. Thus, the clock to the control unit must provide counted timing signals.Examples, of the functionality of control units along with timing diagrams are given in thefurther readings. We will not discuss about the timing diagrams in this block.How are these control signals applied to achieve the particular operation? The controlsignals are applied directly as the binary inputs to the logic gates of the logic circuits. Doyou remember the Enable input defined in Unit 2 of Block-1 or the select inputs ofmultiplexers. All these inputs are the control signals which are applied to select a circuit (incase of enable) or a path (in case ofMUX) r any other operation in the logical circuits.As one of the responsibilities of the control unit is to keep track on the instruction cycle.Therefore, the control unit can determine when which micro-operation is to be performed.Let usdiscuss this with the help of an example in the following subsection.3.3.3 An Illustration of ControlSuppose we have an accumulator machines with the following registers (in the usualfunctions they do)

    Accumulator (AC)Instruction Register(IR)

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    The Program Counter (PC) Alu and Control UnltOrganlsrtlonMemory Address Register (MAR)Data Register (DR)

    Figure 10 is a simple representation of such a machine with the requirements of controlsignals.

    Flgure 10:A ypical CP U wlth some Control slgnalsThe register transfers for this machine are:Register Input from Output to CommentsAC ALU, DR DR. ALU AC receives and sends data to DR or

    to ALU.IR DR CU Instruction register receives instructionfetched in DR. The op-code of the instruction

    is used by the control unit for generatingcontrol signals for instruction execution.r C DR MAR, DR Program counter is loaded by the addresssupplied by DR. however, it can send nextinstruction address to MAR; or can send thecurrent address for storage, through DR inthe case of a subroutine call.MAR DR. PC System Bus MAR stores the address of the memory unitor the I/O module which is in turn passed onto the system bus. It can be loaded by PC or DR

    DR System Bus, System Bus, DR can receive data on system bus fromAC ALU,AC, R, memory unit or VO module or data for storage

    MAR, PC from AC. However, it can output data tosystem bus for storage or toALU assecondoperand or to AC as first operand or MARin case of address, or to the program counterwhen it contains the address of a 'called subroutine.

    ControlData path SignalAC -' ALUAC -' DRDR -' ACAL U -' ACIR -' CUDR -'IRPC -' MA RPC -' DRDR +PCMAR-' BUSDR -' M A RDR -' BU SDR + ALUBU S + DR

    Thus, the various sets of data transfer for the machine in figure 10are: (Source+Destination)

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    CP U Organisation AC + ALU ; AC -+ DR ; DR + AC ; ALU + AC;IR + CU ; DR + IRPC + M A R ; P C + D R ; D R + P C ;MAR + (BUS) ; - (PC+ MAR) ; DR + MAR ;DR + (BUS) ; DR + ALU ; (DR + AC) ; (DR + IR);(DR + MAR) ; (DR+ PC) ; BUS + DR ; (AC + DR).Each of'the above transfer require a control signal, however, the data transfer entries given inbrackets are occurring again. Thus, we require 14 control signals as shown in figure 10. Aconnection line in this figure does not indicate a control signal but it indicates data pathwhich exist between the two components. The direction of arrow indicates the direction ofdata transfer. All the keys on the data transfer paths are triggered by a control signal which ismarked there. Please note that for simplicity of diagram we have not shown how thesecontrol signals comes from control unit. However, you must keep in mind that all thesefourteen control signals are only a subset of control signals generated by the control unit.These control signals can go to their separate destinations. The control signals which arenormally needed for different destinations can be categorised as :

    Control signals activating a data path: These control signals opens a gatetemporarily. This allows flow of data on the path controlled by that gate. Some ofthese control signals are shown in the figure given above.Control signals activating a functiodoperation of ALU: These signals open variouslogic devices and gates inside the ALU. These signals are shown as a group ofsignals in the figure 10.Control signals activating the system bus: These control signals may activate acontrol line on system bus. Examples of such a signal can be memory or 110 reador write.

    Now, let us seewhat control signals shown in the figure get activated during an instructioncycie for a simple add instruction, where indirect addressing has been used.Fetch CycleTiming Micro-operation Comment Control signals neededt1 W t PC Memory address c6register is assignedthe content of Program

    Count.er.t2 DR t BUS) Read the contents. CI3 nd control signal for memoAdditional control read. MAR address input is

    signal (not shown applied on the system bus.here) is needed to activememory read.

    PC+ P C - + I Increment program Control signal for incrementingcounter PC.t3 I R t D R Transfer the fetched c sinstruction into

    instruction register.Indirect Cyclet1 MAR+ Assign address from cloIR (ADDRESS) the instruction registerto MAR. This content can

    be acquired from DR as itstores same contents as ofIR at present.

    t2 DR t BUS) - CI3and control signal formemory read. MAR addressinput is applied on the systembus.

    t3 IR (ADDRESS) t DR (ADDRESS) cs

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    CPUOrganisation

    - -

    Micro-programmed Control UnitWe will give only a very brief account of hardwired control units in this unit. Themicro-programmed control unit is discussed in details in the next unit of thisblock.3.3.4 Hardw ired Control UnitA hardwired control unit is implemented as a logic circuits in the hardware. The inputs tocontrol unit are: the instruction register, flags, timing signals and control bus sigilals. On thebasis of these inputs the output signal sequences are generated. Thus, output control signalsa n unctions of inputs. Thus, we can derive a logical function for each control signal. This,however, will be very complicated if we have a large control unit. The implementation of allthe combinational circuits may be very difficult. Therefore, a new approachmicroprogramming was used. This approach will be discussed in the next unit.Check Your Progress 31. What are the inputs to control unit?

    ....................................................................................................................

    2. How does a control unit control the instruction cycle?..........................................................................................................................................................................................................................................

    3. What is the importance of an internaldata bus?......................................................................................................................

    ................................................................................................................

    4. What is a hardwired control unit?....................................................................................................................

    ....................................................................................................................

    3.4 SUMMARYIn this unit, we have discussed about two main components of the CPU, the ALU and thecontml unit. We have explained the concepts of the basic ALU structure, floating pointALUs and coprocessors. Coprocessors, in today's computers,are used widely and help inimplementing graphical and other computation intensive applications. As far as control unitis concerned, we have discussed about a simple structure of a control unit along with anexample. More details on these aspects with examples canbe seen from the further readings.In this unit we have also introduced the concept of a hardwired control unit.Amicroprogrammed control unit which is more commonly used is the topic of the next unit.

    3.5 MODEL ANSWERSCheck Your Progress 11. False2. False3. FalseCheck Your Progress 21 . The maximum significand = 0.1 111Decimal equivalent = (1-2'4

    Minimum significand = 0.1000

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    = 0.5Exponent is = - 8 t 0 + 8Minimum negative number = - 1 - 2 9 5 2'Maximum negative number = - 0.5x f 'Minimum positive number = 0.5 x 2-Maximum positive number = ( 1 - 2 3x 2'2. (a) True (b)False (c) True (d) False3. N o model answer. Refer to section 3 .2.3

    Alu andControlUnitOrganlsation

    Check Your Progress31 . Refer to section 3.3.22. Refer to section 3.3.33. Refer to section 3.3.34. Refer to section 3.3.4