a silicon vertex tracker prototype for cbm material for the fp6 design application
TRANSCRIPT
A Silicon vertex tracker prototypefor CBM
Material for the FP6 Design application
Compact tracking with Si-Sensors in CBM
Geometry of the SVT section 2 planes at 5 and 10 cm from the
target inner diameter 11 mm only
109 beam particles per second
Single event track densities up to 50 cm-2
SVT in vacuum
CBM-STS
CBM-SVT 100 cm2
Tasks of the tracking system
Momentum measurement for charged tracks with momentum resolution of O(1%)
Material budget
Track matching in high track density environment
Single track vertex resolution better 30 m High resolution tracking stations close to the target
Efficient recognition of electron pairs from 0 decays (Conversion, Dalitz)
reconstruction of incomplete tracks
highly efficient matching with PID detectors
Technical challenge
High track density close to the target and at small angles Mainly affects the pixel sensors
Fast readout Event pile-up in case of MAPS
Radiation tolerance Possibly high level of slow neutrons
Low mass design and mechanics efficient cooling of sensors detectors need to be moved during the runs
Objective of the Design Proposal
Design and build a Silicon Vertex Tracker of geometry anticipated for the CBM with MAPS technology achievable in 2 years from now.
Study all aspects of such compact high resolution tracking devices with a full size prototype.
Aim at a fully operational device with a self triggered readout.
Relax conditions on radiation hardness and read-out speed.
Work out a detailed design for the complete tracking station of the CBM detector.
Optimize design with respect to: vertex resolution track finding efficiency momentum resolution material budget
Substantial R&D already done
Taken from Mark Winteri, IReS"DESY PRC proposal"
MAPS for Upgrades & Future Projects
Taken from Woijech Dulinski, LEPSI"Frontier Detectors for Frontier Physics"
Project structure
CoordinationGSI
Chip designIRES/LEPSI Strasbourg
QualificationGSI
Darmstadt
DAQ ,Construction
IKFDarmstadt
Design studiesMSIP
Cracow
Space frameKRI/CDBM
St. Petersburg
Project planning
Cost
WorkPackage
IReS/LEPSI
GSI IKF MSIP EU Sum
Chip design
k€ 30 230 260
FTE 2 - 2
Chipqualification
k€ 30 60 90
FTE 1 1 2
DAQk€ 300 70 370
FTE 1,5 0,65 2,15
STS designStudies
k€ - 40 40
FTE 2,8 0,5 3,3
Overhead k€ 30 30
Sumk€ 30 30 300 - 360 790
FTE 2 1 1,5 2,8 2,15 9,45