fast detectors fp6
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FAST DETECTORS AND CAMERAS ---
PHILIPPE FEAUTRIER, JEAN-LUC GACH, PHILIPPE BALARD, CHRISTIAN GUILLAUME, MARK DOWNING, ERIC STADLER, YVES MAGNARD, SANDY
DENNEY, WOLFGANG SUSKE, PAUL JORDEN, PATRICK WHEELER, MICHAEL SKEGG, PETER POOL, RAY BELL, DAVID BURT, JAVIER REYES, MANFRED MEYER, NORBERT HUBIN, DIETRICH BAADE, MARKUS KASPER, ROBIN
ARSENAULT, THIERRY FUSCO
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Fast detectors FP6
The conclusion of FP6
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Demonstration of the e2v CCD220 AO detector with OCam Thursday at Coffee/Lunch breaksESO council room
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StoreArea
Image Area
240x12024 µm
StoreArea
Image Area
240x12024 µm
OP 1
OP 2 GainRegisters
OP 3
OP 4 GainRegisters
OP 8GainRegisters
OP 7
OP 6GainRegisters
OP 5
StoreAreaStoreArea
Image Area
240x12024 µm
StoreArea
Image Area
240x12024 µm
OP 1OP 1
OP 2 GainRegisters
OP 2 GainRegisters
OP 3OP 3
OP 4 GainRegisters
OP 4 GainRegisters
OP 8GainRegisters
OP 8GainRegisters
OP 7OP 7
OP 6GainRegisters
OP 6GainRegisters
OP 5OP 5
Split frame transfer 8-output back-illuminated e2v-L3Vision CCD.
240 x 240 pixels 8 EMCCD ouputs Frame rate: 1300 frames/sec Noise ~ 0.5 e Peltier cooled @ - 45 °C
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JRA2 FP6
Multiplication gain and Dark
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HV (Volt) Multiplication Gain
Dark (e/pixel/frame) Noise (e-)
Input referred
noise (e-)Amp 0
43.51474 0.013 827 0.56
Amp 1 1459 0.012 460 0.32Amp 2
43.41351 0.011 416 0.31
Amp 3 1406 0.010 663 0.47Amp 4
44.91204 0.008 944 0.78
Amp 5 1165 0.009 419 0.36Amp 6
43.9909 0.008 498 0.55
Amp 7 963 0.004 821 0.85Mean 43.9 1240 0.010 630 0.52
0 1 2 3
7 6 5 4
Standard siliconTemperature: -40°CFrame rate: 1360 fps
Dark events Amp 5
Single dark + CIC events CCD temperature: -40°C Standard Si One of the 8 outputs Frame rate: 1360 fps Multiplication gain: x 1150 65 dark events / output (120 x 60 pixels)
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Typical Dark Signals for ESO-WFS. Operation at 1500fps.
0.0001
0.001
0.01
0.1
1
-50 -40 -30 -20 -10 0 10 20
Temperature (°C)
Dar
k Sig
nal (
e/pi
x/fram
e)
gain = 1000
gain = 100
gain = 10
Gain=1000
Gain=10
- 45°C
Minimum specification
Temperature (°C)
Dark Current(e/pixel/frame)
CCD220 results with Ocam, T=-40°C
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Test Result SpecRead noise (@gain 1000 1500 fps) 0.26 – 0.9 e
(0.5 e mean)< 1 e
Read noise (@gain 1000 25 fps) 0.38 – 0.97 < 1 e
Dark signal @ 1500 fps 0.004 – 0.01 e/s/frame
< 0.01 e/s/frame
Dark signal @ 25 fps 0.04 e/s/frame <0.04 e/s/frame
Parallel CTE 0.999959 >0.99995
Serial CTE 0.99996 >0.9998
Image Full Well 292000 e > 5000
Traps, dark and bright defects 0 0
CCD220 measured QE (standard Si)
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0
20
40
60
80
100
500 550 600 650 700 750 800 850 900
QE measuredQE spec
QE
mea
sure
d (%
)
Wavelength (nm)
OCam technology in Europe
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ESO WFS camera based on the Ocam technology.
Ocam : WFS camera for GrantecanDelivery of 2 systems Sept 2010
Creation of a startup company
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OCam I Ocam II is the commercial version of Ocam I Improved reliability Improved performances Improved environmental conditions (can work with
air and water temperature up to 40°C) Detector safety (over-illumination) More compact for integration on telescope
FAST DETECTORS FOR LGSThe beginning of FP7
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LGSD specificationsLGSD = Laser Guide Star Detector
• 24 µm pixels, 100% fill-factor• 84 x 84 sub-apertures (goal 126 x
126)• 20 x 20 pixels per sub-aperture
(to cover spot elongation) 1680x1680 pixels
• 400-800 Hz (for various AO modules)
• RON < 3e- (goal 1 e-), QE > 85%• Good image lag, charge diffusion,
PRNU, cross-talk, non-linearity, cosmetics, RON and dark current variations, stability w.r.t. environment (for centroiding quality)
• Low latency, fully packaged• Goal: Possible re-use for NGSs
WF Sensing
LLT
Sodium layer
Detector plane
Pupil plane
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Previous ESO developments 2007: 4 Feasibility studies for EELT LGS WFS detector, 50 k€ each, 2 of
them funded by FP6-ELT Design Study “Market survey”
2008-2009: 3 Technology Demonstrator contracts, 400 k€ each, 2 of them funded by FP6-ELT Design Study “Manufacture of a small array of pixels to prove noise performance”
E2v (UK)
Teledyne (USA)
Sarnoff (USA)
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The current FP7 phase : NGSDNatural Guide Star Detector = Scaled Down Demonstrator for the LGSD.
Its purpose is :1) To develop a detector that can be used for first light NGS application for the EELT2) To demonstrate the feasibility of the LGSD, without the high costs associated with more engineering tasks such as:
Integral Peltier package, and/or Extension of the dimensions of the device such that stitching is
required.
Specifications are identical to the LGSD ones, except for: 672 x 672 pixels instead of 1680 x1680 4 e- RON instead of 3 e- Relaxed image lag (5 % instead of 2 %) Manufacturers standard package (simple packaging to keep costs down) No Peltier cooler
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NGSD Call for TendersFollowing ESO procurement rules: December ‘09: CfT sent to 34 companies/institutes in Member states and
USA February ‘10: 2 Tenders received 10th March ’10: Technical, Managerial and Contractual evaluations
provided to a Contract Awarding Committee May 5th : recommendation from the Contract Awarding Committee to ESO
Finance Committee to award one NGSD contract to e2v (UK). Approval by ESO FC.
May XXth: contract signed with e2v
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Stabilize the World leadership of Europe on Fast Detectors and Cameras
Plans for the future
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Firsts of this technology:
- Visible CMOS detector for the first time in astronomy- Back-side illuminated CMOS- Build-in Digital Outputs
But no real testing possibility of this detector outside e2v and production camera not planned, just prototypes .
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XAO detectors for 3rd generation of instruments and ELT À compléter….
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Opticon FP7 call 2 detector proposal : beyond what was already developped (à revoir…).
Same philosophy as previous successful detector activities : few goals, few partners with world class know how …
1. WP1 Upgrade of OCam to operate the CCD220 at 2.5-3 kHz frame rate for XAO instruments such as SPHERE and EPICS (following FP6 activities), improve noise (<< 1e), and characterize the system. Industrialize it.
2. WP2 Develop a production camera system for LGS CMOS detectors to test the detector in the labs and that will be used afterward on the VLT and E-ELT (following FP7 call 1 activities). Develop interface with Sparta RTC. Industrialize it.
Actors (preliminary):- LAOG: management/system, camera head, detector/system characterization- LAM : camera controllers, interface with Sparta.- ESO (interface CMOS controller/Sparta, specifications, end user on telescope)- Industrial partners
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WP description for FP7 Phase 2 Fast Dectors and cameras
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WP2 Organization
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WP 2.1 ManagementCNRS/LAOG (P. Feautrier)
WP2.2CCD220/Ocam 2.5 kHz
LAM (JL Gach)
Front endOHP
Digital electronics
LAM
SoftwareLAM
Camera headLAOG
WP2.3Full digital CMOS
controller
Controller prototype
LAM
FPGA controllerIndustrial partner
WP2.1 Management Scope : management of the WP Fast
Detectors and Cameras. Lead : CNRS (LAOG – P. Feautrier) CNRS/LAOG will coordinate the WP2
activity, prepare the key specifications for the other WPs, monitor the WPs, organize study and design reviews, prepare the regular reports and detailed work plans for the OPTICON management.
Funding: 50 K€.
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WP2.2 CCD220/Ocam 2.5 kHz Scope: upgrade 3rd gen VLT Instruments and prepare XAO for
ELT (EPICS) Goal: decrease Ocam current noise down to 0.1-0.2 e and
increase speed to 2.5 kHz (goal 3 kHz) with redesign of the controller. Prepare industrialization.
New generation of amplifiers and gained experience during FP6 allows to increase speed and noise performances of Ocam allowing to use the CCD220 for the third generation of XAO system and prepare XAO for ELT.
This means a complete redesign of Ocam for this goal.
Partners:LAM (lead), controller.LAOG : camera head, camera testing
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Type To For 2012 2013 2014 EC MatchHW CNRS/LAM CCD220 detector
(engineering, science grades)
100k 100k --
HW CNRS/LAM Controller 80k 80k 80k 160k 80kFTE CNRS/LAOG Design/Testing 80k 80k 80k 160k 80kTotal cost = 580 k - EC contribution : 420 k
WP2.3 All-Digital C-MOS Controller Scope: upgrade for 3rd gen VLT Instruments.
Goal of the WP: create a flexible architecture by combining the new technology CMOS controller with an FPGA and fast programmable I/O.
- The new CMOS detector developed in the framework of the FP7 WP2 allows for an all-digital controller. A very high miniaturization can be achieved by companies operating in the high-end embedded computing that are able to pack the detector with a powerful FPGA in the same PCB and equipping it with programmable fast I/O. - The presence of the FPGA allows for intelligent fast on-the-fly processing as well as allowing for different protocols and interfaces to be used for different applications. - The primary goal of this WP is to integrate the CMOS detector and controller , an FPGA and several fast I/O ports industrializing the prototype under development at LAM. - Secondary goal: implement SPARTA+ interfaces and prototype advanced features like pixel multiplexing and switching, while allowing LAM interfaces to be implemented.
Partners: ESO: partner, lead LAM: partner, owner of prototype implementation to be industrialized
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WP 2.3 All-Digital C-MOS Controller Partners: ESO: partner, lead LAM: partner, owner of prototype implementation to be industrialised Nallatech: partner, industrial partner
Plan
Type To For 2012 2013 2014FTE Nallatech NRE 0.5 0.5FTE LAM Follow-up/TestingFTE ESO Follow-up /Testing 0.1 0.1
Type To For 2012 2013 2014 EC MatchHW ESO CMOS detector 100k 100k ?HW Nallatech HW to be delivered to ESO 40k 30k 10kFTE Nallatech NRE 50k 50k 75k 25kFTE LAM Follow-up/TestingFTE ESO Follow-up /Testing 10k 10k 15k 5kTotal = xx k + detector