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This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 318240. PhoxTroT - 4th Symposium on Optical Interconnect in Data Centers, ECOC 2016, Düsseldorf, Germany, 18. September 2016 WELCOME 4th Optical Interconnect in Data Centers EU-Symposium Tolga Tekin , Fraunhofer IZM / TU Berlin, Germany Richard Pitwon , Seagate, United Kingdom Nikos Pleros , AUTH, Greece Emmanouel Varvarigos , CTI ‘Diophantus’, Greece Dimitris Apostolopoulos , ICCS / NTUA, Greece

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Page 1: WELCOME 4th Optical Interconnect in Data Centers EU …€¦ · Executed 3 HPC applications on HellasGrid cluster. ... Clockless feedforward equalizer ... router chips communicating

This project has received funding from the European Union’s Seventh Framework Programme for research, technological development and demonstration under grant agreement no 318240.

PhoxTroT - 4th Symposium on Optical Interconnect in Data Centers, ECOC 2016, Düsseldorf, Germany, 18. September 2016

WELCOME 4th Optical Interconnect in Data Centers EU-Symposium

Tolga Tekin, Fraunhofer IZM / TU Berlin, Germany

Richard Pitwon, Seagate, United Kingdom

Nikos Pleros , AUTH, Greece

Emmanouel Varvarigos , CTI ‘Diophantus’, Greece

Dimitris Apostolopoulos , ICCS / NTUA, Greece

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Thanks to

ECOC 2016 General Chairs Ronald Freund, Fraunhofer Heinrich Hertz Institute, Berlin Matthias Berger, Alcatel-Lucent, Nürnberg

ECOC 2016 Technical Program Chairs Peter Krummrich, Technische Universität Dortmund Christian Schaeffer, Helmut Schmidt Universität

ECOC 2016 Local Organis ing Committee Volker Schanz, VDE ITG, Frankfurt Hatice Altintas, VDE Conference Services, Frankfurt

for their kind support!

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4th Optical Interconnect in Data Centers EU-Symposium

09:10 WELCOME by PhoxTroT

09:30 - 11:10 Session 1: THE END-USER PERSPECTIVE

11:30 - 13:30 Session 2: BRINGING TECHNOLOGY TO MARKET - I

14:30 - 16:30 Session 3: BRINGING TECHNOLOGY TO MARKET - II

16:50 - 18:30 Session 4: WHAT COMES NEXT?

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Revolutionizing the Data Centers and HPCs - Optical Interconnects

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PhoxTroT - A Large-Scale Integrating Project

PhoxTroT is a large-scale European research effort focusing on

high-performance,

low-energy,

low-cost,

small-size

optical interconnects across the different hierarchy levels in Data Center and High-Performance Computing Systems:

on-board,

board-to-board and

rack-to-rack.

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PhoxTroT brings together the major European industrial and research players in the field.

Fraunhofer IZM (DE)

Fraunhofer HHI (DE)

Vertilas GmbH (DE)

Seagate (UK)

ams AG (AT)

TTM Technologies (HK)

AMO GmbH (DE)

ICCS/NTUA (EL)

DAS Photonics SL (ES)

Phoenix BV (NL)

CERTH (EL)

Compass EOS Ltd (IL)

Bright Photonics BV (NL)

CTI (EL)

CNRS-UB (FR)

CNRS-LPN (FR)

KIT (DE)

SDU (DK)

UPVLC (ES)

IMEC (BE)

TE Connectivity (NL)

AUTH (EL)

Mellanox (IL)

PhoxTroT - Consortium

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PhoxTroT‘s Mission

To streamline the synergistic evolution of the entire technology portfolio towards cost‐ and energy‐efficient Tb/s‐scale chip‐to‐chip, board‐to‐board and rack‐to‐rack level device development. PhoxTroT aims to generate the necessary energy and cost‐efficiency factors through breakthrough component level advances and through mastering the different technology platform design- and process-level requirements into a coherent methodology for optochip, optical PCB and Active Optical Cable fabrication.

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PhoxTroT’s Holistic Approach

PhoxTroT tackles optical interconnects in a holistic way, synergizing the different technology platforms in order to deploy the optimal "mix & match" technology and tailor this to each interconnect layer.

Plasmonics

Si Photonics

III-V CMOS

electronics

Glass

PICs

Transceivers

Switches & Routers

PCBs

Interfaces

Polymers

Glass

Si Photonics

CMOS electronics

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PhoxTroT’s Ecosystem

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Architecture

Architectural studies for on-board, board-to-board, and system-level hierarchies, based on specifications of the building-blocks developed in PhoxTroT.

Development of Automatic Topology Design tool to aid architecture design.

Layouts of interconnection network topologies on OPCBs.

Calculations of required area, worst case losses.

Executed 3 HPC applications on HellasGrid cluster. Traffic monitored and analyzed.

Collected traffic patterns of HPC and Data Centers applications (literature review).

To Backplane

Backplane

Waveguides

AOC

Backplane slot

Board

System

Processor chip

Router

CTI, CERTH

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Mask Generator

Designer

Design Kit

Foundry

Circuit Simulator Physical Simulations

Design Kits for Optical Interconnects PHOENIX, BP

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90-deg bends

Splitters Over crossings

Straight lines Cascaded

bends Straight lines

Multi-Mode Optical/Electrical PCB Development

Multimode polymer waveguide process compatible with panel-scale HLC PCBs developed and demonstrated – TTM

Process for single-layer polymer WG PCBs supporting 300x350mm form factor on rigid MLB PCBs established. Scaling to dual-optical layer construction on going

Multimode O/E PCB test bed (4L+1Opt) with multiple passive components completed.– SEA, CEOS, TTM

Optical mid-board interface by 90° MLA (micro lenses) for chip-to-board I/O and board-edge connectors for WG-to-MMF

Demonstrator 1 (16L+ 1Opt w/ CMOS) CEOS, TTM

Multimode PCB @ 16” 20”Panel Product form factor test bed

Coupling interface verification

Demonstrator 1

TTM, CEOS, SEA

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Single-Mode Optical PCB Development

SM optical PCB process flow

Laser dicing & optical cut-outs

Two step ion-exchange process

Thin film mask on glass

PCB embedding

Propagation loss = 0.1dB/cm

SM chip-to-board coupling interface

IZM

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Electronic VCSEL Driver and TIA Circuits Development

IMEC

40Gb/s NRZ VCSEL driver

Optimized for Vertilas’ single-mode VCSELs

Clockless feedforward equalizer

40Gb/s NRZ Transimpedance Amplifier

Compatible with HHI’s photodiodes

Gain control and limiting output

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VCSEL Development VERTILAS

Short-cavity VCSELs with 1550 nm wavelength developed and manufactured

Optical output power up to 4mW (20°C) and >1.5 mW (80°C)

Modulation bandwidth up to 14 GHz (20°C) and >10 GHz (80°C)

Limited by parasitic capacitance – intrinsic bandwidth >25 GHz (@ 20°C)

25 Gb/s eye (100 Gigabit Ethernet) with 4.5 dB extinction ratio

Optimization of capacitance/bandwidth for next device generation

56 GHz operation

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Two EO switch. mechanisms: Carrier Depletion Silicon Organic Hybrid

Two fundamental 2x2 switches

Add/Drop Rings MZIs Circuit level simulation tool confirmed with passive rings

4x4 non-blocking matrix Design optimization on circuit level

DAS, CERTH, UPVLC EO Router: SOI based 4x4 Non-Blocking Switching Matrix

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Hybrid active high-Q cavities by nanostructuring SOI and exploiting III-V gain

Hybrid InP on SOI Electrically-Pumped Nanolasers for AOC

LPN, AMO

Hybrid cavity with Q>105

Design, III-V growth & processing and optical characterization @LPN

SOI Nanobeam cavity fabricated @AMO

1540 1550 1560 1570 1580-30

-20

-10

0

Emission spectra at 150 µA

Norm

aliz

ed I

nte

nsity (

dB

)

Wavelength (nm)

CW - RT

I = 150 µA

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16QAM at 40 GBd

Korn, D., et al., Optics Express 21, 2013

Silicon-Organic Hybrid (SOH) Modulators

High-speed electro-optic modulators: SOI slot waveguide + EO organic material

Enabling complex modulation formats

Further Application:

SOH modulator-based flat comb generation

Spectral flatness of 7 lines within 2 dB

Transmission of an aggregate data rate >1Tbs of 784 Gbit/s

KIT, AMO

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Optical TSVs Electrical TSV

TSV serve as enabler for interposers with data exchange between backside and frontside

AMS, IZM Optical Interposer & Through Vias

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TSV as enabler for interposers with data exchange between backside and frontside

Electrical TSV: R= 0.43 Ohm / C= 3.5 pF

Cut off frequency fc = 1/2PRC = 100GHz

Optical TSV: parallel processing of electrical and optical

TSVs: differentiation by metal mask

Removal of TSV bottom metallization

80µm TSV technology

TSV depth:

200µm

TSV depth:

50µm

Further improvement by

reducing the TSV depth

to 100µm and 50µm

AMS, IZM Optical Interposer & Through Vias

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Plasmonic Arc Waveguide based Chip-to-Board Interconnect

FOWG polymer cladding

100 µm pitch

Au strips (15nm x 10µm)

Cross-section of a plasmonic arc waveguide

The plasmonic arc waveguide is based on a long-range surface plasmon polariton propagation mode

FABRICATION CHARACTERIZATION

Flexibility of the plasmonic arc

waveguide

Insertion loss 0.4dB/mm

UB, SDU

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Fiber-to-fiber coupling set-up

~ 2mm

LR-SPP waveguide

Bending loss calculations

Out of plane 90 degree bend

Light coupled to the waveguide

Simulation performed at 1550 nm wavelength

UB, SDU Development of Flexible Long-Range Plasmonic Waveguide for Chip Interconnects

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A Technology Demonstration of the First Fully Optically Interconnected 2U24 OneStor™ Data Storage Platform

XR

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Demonstrator board with 2 optical router chips communicating via WG arrays

WG automated scans

CEOS, TTM, IZM Technology Demonstration with Router

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Rx

Tx

Rx Tx

Active Optical Cable TE, IZM

Demonstration of Active Optical Cable 1.28Tb/s 16QAM modulation format

Integration and packaging of Tx and Rx 40Gbaud chips into zQSFP connector format

Demonstrator concepts identified, 1st demonstrator uses 4PAM modulation, 2nd demonstrator uses 16QAM modulation

Roadmap and timeline defined for active optical cable demonstrators

Concept for power budget and power consumption defined

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4th Optical Interconnect in Data Centers EU-Symposium

SESSION 1: THE END-USER PERSPECTIVE

Chair: Dimitris Apostolopoulos

09:30 Richard Pitwon, Seagate Advances in photonic interconnect for data centre subsystems

09:50 Katharine Schmidtke, Facebook ….

10:10 Elad Mentovich, Mellanox PIC Technologies for Intra- and Inter- Distributed DC and Cloud-Access Ultra-High Capacity Flex OTN

10:30 Bert Offrein, IBM Research System and Device-level Integration Trends of Optical Interconnects in Data Centres

10:50 ROUND TABLE DISCUSSION

11:10 – 11:30 COFFEE BREAK

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4th Optical Interconnect in Data Centers EU-Symposium

SESSION 2: BRINGING TECHNOLOGY TO MARKET - I

Chair: Richard Pitwon

11:30 Marika Immonen, TTM Technologies Optical PCB Technology for In-Chassis Interconnects – H-V Fabricator’s View

11:50 Joni Mellin, ams ams and Silicon Photonics - From Research to Business

12:10 Susannah Heck, Kaiam Embracing diversity: hybrid integration for data center optics

12:30 Kazuhiko Kurata, PETRA Chip scale optical transceiver "optical I/O core" based on silicon photonics platform

12:50 Lê Nguyên Bình, Huawei Technologies Düsseldorf PIC Technologies for Intra- and Inter- Distributed DC and Cloud-Access

Ultra- High Capacity Flex OTN

13:10 ROUND TABLE DISCUSSION

13:30 – 14:30 LUNCH BREAK

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4th Optical Interconnect in Data Centers EU-Symposium

SESSION 3: BRINGING TECHNOLOGY TO MARKET - II

Chair: Nikos Pleros

14:30 Hideyuki Nasu, Furukawa VCSEL based solderable optical modules

14:50 Charles Baudot, ST Micro Addressing future trends in integrated silicon photonics

15:10 Felix Betschon, Variooptics Bringing EOCB’s to the market - what’s missing?

15:30 Peter De Dobbelaere, Luxtera Silicon photonics transceivers for hyper-scale datacenters: Deployment and roadmap

15:50 Takaaki Ishigure, Keio University High bandwidth density 3-D optical wiring realized with the Mosquito method

16:10 ROUND TABLE DISCUSSION

16:30 – 16:50 COFFEE BREAK

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4th Optical Interconnect in Data Centers EU-Symposium

SESSION 4: WHAT COMES NEXT?

Chair: Andreas Hakansson

16:50 Paraskevas Bakopoulos , National TU Athens Optical switching for scalable and programmable data center networks

17:10 Huiyun Liu, UCL First practical III-V quantum-dot lasers monolithically grown on silicon

for silicon photonics

17:30 Mohamed Sufyan Is lim, University of Edinburgh LiFi: Making Fiber Wireless

17:50 Anna Lena Giesecke, AMO GmbH Photonic Integrated Circuits for PhoxTroT: Advances in Lithographic Fabrication Techniques

18:10 ROUND TABLE DISCUSSION

18:30 END of Symposium

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4th Optical Interconnect in Data Centers EU-Symposium

09:10 WELCOME by PhoxTroT Tolga Tekin

09:30 - 11:10 Session 1: THE END-USER PERSPECTIVE

Chair: Dimitris Apostolopoulos Speakers: Richard Pitwon, Katharine Schmidtke, Elad Mentovich, Bert Offrein

11:30 - 13:30 Session 2: BRINGING TECHNOLOGY TO MARKET – I

Chair: Richard Pitwon Speakers: Marika Immonen, Joni Mellin, Susannah Heck, Kazuhiko Kurata, Lê Nguyên Bình

14:30 - 16:30 Session 3: BRINGING TECHNOLOGY TO MARKET - II

Chair: Nikos Pleros Speakers: Hideyuki Nasu, Charles Baudot, Felix Betschon, Peter De Dobbelaere, Takaaki Ishigure

16:50 - 18:30 Session 4: WHAT COMES NEXT?

Chair: Andreas Hakansson Speakers: Paraskevas Bakopoulos, Huiyun Liu, Mohamed Sufyan Islim, Anna Lena Giesecke,