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Page 1: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Clockless ChipsClockless Chips

www.fakengineer.com

Page 2: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 2

Presentation flow:Presentation flow:

Introduction. Problems with synchronous circuits. Clockless / Asynchronous circuits. How clockless chips work? Simplicity in design. Applications. Applications (technical perspective). Challenges.

Page 3: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 3

Introduction.Introduction.

Struggle for the improvement in the microprocessor’s

performance/functioning.

– Pipelining

– (Simultaneous) Multi-threading

– Clockless / Asynchronous logic

}Synchronous

Page 4: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 4

Problems with Synchronous ApproachProblems with Synchronous Approach

Distributing the clock globally.

Wastage of energy.

Traverse the chip’s longest wires in one clock cycle.

Order of arrival of the signals is unimportant.

Clocks themselves consume lot of energy (~30%).

Page 5: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 5

Synchronous circuitSynchronous circuit

Longest path determines

the minimum clock

period.

Dissipation of energy for

each clock cycle.

EMI is more in

synchronous elements.

Page 6: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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Clockless chips (Asynchronous logic circuits)Clockless chips (Asynchronous logic circuits)

Colckless chips/Asynchronous/self-timed circuits.

Functions away from the clock.

Different parts work at different speeds.

Hand-off the result immediately.

Page 7: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 7

Clock time cycle vs. clockless time cycleClock time cycle vs. clockless time cycle

Courtesy:Courtesy: Fulcrum Microsystems. Fulcrum Microsystems.

Page 8: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 8

Courtesy:Courtesy: Computers without clocks – Ivan E Sutherland and Jo Ebergen Computers without clocks – Ivan E Sutherland and Jo Ebergen

Page 9: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 9

How do they work?How do they work?

No pure asynchronous chips are available.

Uses handshake signals for the data exchange.

Data moves only when required, not always.

– Minimizes power consumption.

– Less EMI less noise more applications.

– Stream data applications.

Page 10: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 10

Simple and efficient designSimple and efficient design

No centralized clock required.

Standardized components can be used.

Page 11: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 11

Some featuresSome features

Integrated pipelining mode.

– Domino logic.

– Delay – insensitive.

Two different implementation details

– Dual rail.

– Bundled data.

Page 12: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 12

AdvantagesAdvantages

Works at its average speed. Low power consumption.

Twice life-time.

Less heat generated. Good to mobile devices.

Less EMI less noise more applications. Smart cards (due to asynchronous nature).

Page 13: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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Advantages (technical look)Advantages (technical look)

Asynchronous for higher

performance:

– Data-dependent delays.

– All carry bits need to be

computed.

Page 14: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 14

Advantages (technical look)…Advantages (technical look)…

Asynchronous for low power:

– Consumes power only when

and where active.

– Rest of the time returns to a

non-dissipating state, until next

activation.

– Illustrated through frequency

divider

Page 15: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 15

Advantages (technical look)…Advantages (technical look)…

Asynchronous for low power:

– Almost fixed power dissipation is achieved.

– Many applications such as:

• Infrared communication receiver.

• Filter bank for digital hearing.

• In pagers.

• Double battery life.

Page 16: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

Presentation on Clockless Chips 16

Advantages (technical look)…Advantages (technical look)…

Asynchronous for low noise and low emission:

– Digital sub-circuits

• Generates voltage noise (on power lines)

• Induces current on silicon substrate.

• Emits electromagnetic radiation at its clock frequency or its

harmonics.

Page 17: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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Advantages (technical look)…Advantages (technical look)…

Heterogeneous Timing:

– Gate delays.

– Interconnection delays.

– Heterogeneous systems

would increase the delays in

the circuits.

Page 18: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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ChallengesChallenges

Interfacing between synchronous and asynchronous– Many devices available now are synchronous in nature.

– Special circuits are needed to align them.

Lack of expertise. Lack of tools. Engineers are not trained in these fields. Academically, no courses available.

Page 19: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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ReferencesReferences

Scanning the Technology: Applications of Asynchronous Circuits – C.

H. (Kees) van Berkel, Mark B. Josephs, and Steven M. Nowick

Computers without clocks – Ivan E Sutherland and Jo Ebergen.

http://ieeexplore.ieee.org/iel5/2/30617/01413111.pdf (October 2001)

http://csdl2.computer.org/comp/mags/dt/2003/06/d6005.pdf

http://www1.cs.columbia.edu/async/misc/

technologyreview_oct_01_2001.html

http://www.technologyreview.com/articles/01/10/tristram1001.asp

http://www1.cs.columbia.edu/async/misc/economist/

Economist_com.htm

Page 20: Clockless Chips . Presentation on Clockless Chips2 Presentation flow: Introduction. Problems with synchronous circuits. Clockless

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Thank youThank you