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  • 7/27/2019 Using Xilinx to Use VHDL as Design Entry

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    ECE 561 Project 4 - 1 -

    Using Xilinx ISE for VHDL Based DesignIn this project you will learn to create a design module from VHDL code. With Xilinx

    ISE , you can easily create modules from VHDL code using the ISE Text Editor tool. This project

    consists of 2 parts.

    PART I : Using Xilinx with VHDL as design entry.

    A. Create new project

    1. Select File New Project . A New Project Wizard window opens; you can name your project (i.e. 561proj4). Select HDL as the Top-level source type . Click Next .

    2. Select Spatan3 in the Family field; and VHDL in the Preferred Language field.

  • 7/27/2019 Using Xilinx to Use VHDL as Design Entry

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  • 7/27/2019 Using Xilinx to Use VHDL as Design Entry

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    ECE 561 Project 4 - 3 -

    ELSIF (x/=y) THEN next_state IF (x='1' AND y='1') THEN next_state

  • 7/27/2019 Using Xilinx to Use VHDL as Design Entry

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    ECE 561 Project 4 - 4 -

    3. Now double click on this figure to expand what is in it and you should see the following:

    You will notice there are 2 flip-flops, a couple of gates, and a few other units.

  • 7/27/2019 Using Xilinx to Use VHDL as Design Entry

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